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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ppc64/] [elf.h] - Blame information for rev 1765

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1 1275 phoenix
#ifndef __PPC64_ELF_H
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#define __PPC64_ELF_H
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/*
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 * ELF register definitions..
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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#include <asm/types.h>
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#include <asm/ptrace.h>
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#include <asm/cputable.h>
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#define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
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#define ELF_NFPREG      33      /* includes fpscr */
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#define ELF_NVRREG      33      /* includes vscr */
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typedef unsigned long elf_greg_t64;
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typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
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typedef unsigned int elf_greg_t32;
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typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
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/*
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 * These are used to set parameters in the core dumps.
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 */
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#ifndef ELF_ARCH
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# define ELF_ARCH       EM_PPC64
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# define ELF_CLASS      ELFCLASS64
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# define ELF_DATA       ELFDATA2MSB
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  typedef elf_greg_t64 elf_greg_t;
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  typedef elf_gregset_t64 elf_gregset_t;
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# define elf_addr_t unsigned long
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# define elf_caddr_t char *
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#else
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  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
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  typedef elf_greg_t32 elf_greg_t;
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  typedef elf_gregset_t32 elf_gregset_t;
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# define elf_addr_t u32
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# define elf_caddr_t u32
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#endif
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/* Floating point registers */
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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/* Altivec registers */
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typedef __vector128 elf_vrreg_t;
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typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
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#ifdef __KERNEL__
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/*
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 * This is used to ensure we don't load something for the wrong architecture.
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 */
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#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE       4096
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/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
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   use of this is to invoke "./ld.so someprog" to test out a new version of
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   the loader.  We need to make sure that it is out of the way of the program
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   that it will "exec", and that there is sufficient room for the brk.  */
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#define ELF_ET_DYN_BASE         (0x08000000)
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/* Common routine for both 32-bit and 64-bit processes */
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#define ELF_CORE_COPY_REGS(gregs, regs) elf_core_copy_regs(gregs, regs);
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static inline void
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elf_core_copy_regs(elf_gregset_t dstRegs, struct pt_regs* srcRegs)
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{
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        int i;
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        int numGPRS = ((sizeof(struct pt_regs)/sizeof(elf_greg_t64)) < ELF_NGREG) ? (sizeof(struct pt_regs)/sizeof(elf_greg_t64)) : ELF_NGREG;
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        for (i=0; i < numGPRS; i++)
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                dstRegs[i] = (elf_greg_t)((elf_greg_t64 *)srcRegs)[i];
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}
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/* This yields a mask that user programs can use to figure out what
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   instruction set this cpu supports.  This could be done in userspace,
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   but it's not easy, and we've already done it here.  */
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#define ELF_HWCAP       (cur_cpu_spec->cpu_user_features)
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/* This yields a string that ld.so will use to load implementation
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   specific libraries for optimization.  This is more specific in
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   intent than poking at uname or /proc/cpuinfo.
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   For the moment, we have only optimizations for the Intel generations,
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   but that could change... */
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#define ELF_PLATFORM    (NULL)
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#define ELF_PLAT_INIT(_r, interp_load_addr)     do { \
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        memset(_r->gpr, 0, sizeof(_r->gpr)); \
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        _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
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        _r->gpr[2] = interp_load_addr; \
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} while (0)
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#define SET_PERSONALITY(ex, ibcs2)                              \
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do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)               \
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                current->thread.flags |= PPC_FLAG_32BIT;        \
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        else                                                    \
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                current->thread.flags &= ~PPC_FLAG_32BIT;       \
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        if (ibcs2)                                              \
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                set_personality(PER_SVR4);                      \
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        else if (current->personality != PER_LINUX32)           \
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                set_personality(PER_LINUX);                     \
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} while (0)
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/*
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 * We need to put in some extra aux table entries to tell glibc what
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 * the cache block size is, so it can use the dcbz instruction safely.
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 */
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#define AT_DCACHEBSIZE          19
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#define AT_ICACHEBSIZE          20
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#define AT_UCACHEBSIZE          21
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/* A special ignored type value for PPC, for glibc compatibility.  */
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#define AT_IGNOREPPC            22
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extern int dcache_bsize;
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extern int icache_bsize;
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extern int ucache_bsize;
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/*
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 * The requirements here are:
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 * - keep the final alignment of sp (sp & 0xf)
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 * - make sure the 32-bit value at the first 16 byte aligned position of
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 *   AUXV is greater than 16 for glibc compatibility.
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 *   AT_IGNOREPPC is used for that.
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 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
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 *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
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 */
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#define DLINFO_ARCH_ITEMS       3
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#define ARCH_DLINFO                                                     \
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do {                                                                    \
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        sp -= DLINFO_ARCH_ITEMS * 2;                                    \
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        NEW_AUX_ENT(0, AT_DCACHEBSIZE, dcache_bsize);                    \
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        NEW_AUX_ENT(1, AT_ICACHEBSIZE, icache_bsize);                   \
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        NEW_AUX_ENT(2, AT_UCACHEBSIZE, ucache_bsize);                   \
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        /*                                                              \
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         * Now handle glibc compatibility.                              \
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         */                                                             \
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        sp -= 2*2;                                                      \
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        NEW_AUX_ENT(0, AT_IGNOREPPC, AT_IGNOREPPC);                      \
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        NEW_AUX_ENT(1, AT_IGNOREPPC, AT_IGNOREPPC);                     \
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 } while (0)
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#endif /* __KERNEL__ */
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#endif /* __PPC64_ELF_H */

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