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phoenix |
/************************************************************************/
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/* Provides the Hypervisor PCI calls for iSeries Linux Parition. */
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/* Copyright (C) 20yy <Wayne G Holm> <IBM Corporation> */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the: */
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/* Free Software Foundation, Inc., */
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/* 59 Temple Place, Suite 330, */
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/* Boston, MA 02111-1307 USA */
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/************************************************************************/
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/* Change Activity: */
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/* Created, Jan 9, 2001 */
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/************************************************************************/
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//============================================================================
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// Header File Id
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// Name______________: HvCallPci.H
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//
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// Description_______:
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//
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// This file contains the "hypervisor call" interface which is used to
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// drive the hypervisor from SLIC.
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//
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//============================================================================
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//-------------------------------------------------------------------
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// Forward declarations
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//-------------------------------------------------------------------
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//-------------------------------------------------------------------
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// Standard Includes
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//-------------------------------------------------------------------
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#ifndef _HVCALLSC_H
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#include "HvCallSc.h"
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#endif
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#ifndef _HVTYPES_H
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#include <asm/iSeries/HvTypes.h>
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#endif
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//-------------------------------------------------------------------
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// Other Includes
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//-------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Constants
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//-----------------------------------------------------------------------------
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#ifndef _HVCALLPCI_H
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#define _HVCALLPCI_H
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struct HvCallPci_DsaAddr { // make sure this struct size is 64-bits total
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u16 busNumber;
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u8 subBusNumber;
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u8 deviceId;
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u8 barNumber;
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u8 reserved[3];
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};
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union HvDsaMap {
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u64 DsaAddr;
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struct HvCallPci_DsaAddr Dsa;
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};
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struct HvCallPci_LoadReturn {
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u64 rc;
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u64 value;
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};
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enum HvCallPci_DeviceType {HvCallPci_NodeDevice = 1,
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HvCallPci_SpDevice = 2,
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HvCallPci_IopDevice = 3,
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HvCallPci_BridgeDevice = 4,
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HvCallPci_MultiFunctionDevice = 5,
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HvCallPci_IoaDevice = 6
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};
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struct HvCallPci_DeviceInfo {
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u32 deviceType; // See DeviceType enum for values
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};
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struct HvCallPci_BusUnitInfo {
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u32 sizeReturned; // length of data returned
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u32 deviceType; // see DeviceType enum for values
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};
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struct HvCallPci_BridgeInfo {
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struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info
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u8 subBusNumber; // Bus number of secondary bus
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u8 maxAgents; // Max idsels on secondary bus
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u8 maxSubBusNumber; // Max Sub Bus
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u8 logicalSlotNumber; // Logical Slot Number for IOA
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};
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// Maximum BusUnitInfo buffer size. Provided for clients so they can allocate
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// a buffer big enough for any type of bus unit. Increase as needed.
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enum {HvCallPci_MaxBusUnitInfoSize = 128};
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struct HvCallPci_BarParms {
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u64 vaddr;
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u64 raddr;
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u64 size;
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u64 protectStart;
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u64 protectEnd;
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u64 relocationOffset;
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u64 pciAddress;
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u64 reserved[3];
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};
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enum HvCallPci_VpdType {
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HvCallPci_BusVpd = 1,
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HvCallPci_BusAdapterVpd = 2
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};
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#define HvCallPciConfigLoad8 HvCallPci + 0
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#define HvCallPciConfigLoad16 HvCallPci + 1
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#define HvCallPciConfigLoad32 HvCallPci + 2
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#define HvCallPciConfigStore8 HvCallPci + 3
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#define HvCallPciConfigStore16 HvCallPci + 4
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#define HvCallPciConfigStore32 HvCallPci + 5
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#define HvCallPciEoi HvCallPci + 16
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#define HvCallPciGetBarParms HvCallPci + 18
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#define HvCallPciMaskFisr HvCallPci + 20
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#define HvCallPciUnmaskFisr HvCallPci + 21
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#define HvCallPciSetSlotReset HvCallPci + 25
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#define HvCallPciGetDeviceInfo HvCallPci + 27
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#define HvCallPciGetCardVpd HvCallPci + 28
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#define HvCallPciBarLoad8 HvCallPci + 40
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#define HvCallPciBarLoad16 HvCallPci + 41
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#define HvCallPciBarLoad32 HvCallPci + 42
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#define HvCallPciBarLoad64 HvCallPci + 43
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#define HvCallPciBarStore8 HvCallPci + 44
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#define HvCallPciBarStore16 HvCallPci + 45
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#define HvCallPciBarStore32 HvCallPci + 46
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#define HvCallPciBarStore64 HvCallPci + 47
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#define HvCallPciMaskInterrupts HvCallPci + 48
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#define HvCallPciUnmaskInterrupts HvCallPci + 49
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#define HvCallPciGetBusUnitInfo HvCallPci + 50
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//============================================================================
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static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u8 *value)
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{
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struct HvCallPci_DsaAddr dsa;
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struct HvCallPci_LoadReturn retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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*value = retVal.value;
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return retVal.rc;
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}
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//============================================================================
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static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u16 *value)
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{
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struct HvCallPci_DsaAddr dsa;
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struct HvCallPci_LoadReturn retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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*value = retVal.value;
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return retVal.rc;
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}
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//============================================================================
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static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u32 *value)
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{
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struct HvCallPci_DsaAddr dsa;
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struct HvCallPci_LoadReturn retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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*value = retVal.value;
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return retVal.rc;
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}
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//============================================================================
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static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u8 value)
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{
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struct HvCallPci_DsaAddr dsa;
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u64 retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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return retVal;
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}
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//============================================================================
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static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u16 value)
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{
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struct HvCallPci_DsaAddr dsa;
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u64 retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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return retVal;
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}
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//============================================================================
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static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
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u8 deviceId, u32 offset,
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u32 value)
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{
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struct HvCallPci_DsaAddr dsa;
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u64 retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumber;
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dsa.subBusNumber = subBusNumber;
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dsa.deviceId = deviceId;
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retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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return retVal;
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}
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//============================================================================
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static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
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u8 subBusParm,
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u8 deviceIdParm,
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u8 barNumberParm,
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u64 offsetParm,
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u8* valueParm)
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{
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struct HvCallPci_DsaAddr dsa;
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struct HvCallPci_LoadReturn retVal;
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumberParm;
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dsa.subBusNumber = subBusParm;
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dsa.deviceId = deviceIdParm;
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dsa.barNumber = barNumberParm;
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HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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*valueParm = retVal.value;
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return retVal.rc;
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}
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//============================================================================
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static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
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u8 subBusParm,
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u8 deviceIdParm,
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u8 barNumberParm,
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u64 offsetParm,
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u16* valueParm)
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309 |
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{
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310 |
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struct HvCallPci_DsaAddr dsa;
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311 |
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struct HvCallPci_LoadReturn retVal;
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312 |
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*((u64*)&dsa) = 0;
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dsa.busNumber = busNumberParm;
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dsa.subBusNumber = subBusParm;
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dsa.deviceId = deviceIdParm;
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dsa.barNumber = barNumberParm;
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HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
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321 |
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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*valueParm = retVal.value;
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325 |
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return retVal.rc;
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327 |
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}
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328 |
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//============================================================================
|
329 |
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static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
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330 |
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u8 subBusParm,
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u8 deviceIdParm,
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u8 barNumberParm,
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333 |
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u64 offsetParm,
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334 |
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u32* valueParm)
|
335 |
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{
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336 |
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struct HvCallPci_DsaAddr dsa;
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337 |
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struct HvCallPci_LoadReturn retVal;
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338 |
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339 |
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*((u64*)&dsa) = 0;
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340 |
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341 |
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dsa.busNumber = busNumberParm;
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dsa.subBusNumber = subBusParm;
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dsa.deviceId = deviceIdParm;
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344 |
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dsa.barNumber = barNumberParm;
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345 |
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HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
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347 |
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348 |
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// getPaca()->adjustHmtForNoOfSpinLocksHeld();
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349 |
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350 |
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*valueParm = retVal.value;
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351 |
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352 |
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return retVal.rc;
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353 |
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}
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354 |
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//============================================================================
|
355 |
|
|
static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
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356 |
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u8 subBusParm,
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357 |
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u8 deviceIdParm,
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358 |
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u8 barNumberParm,
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359 |
|
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u64 offsetParm,
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360 |
|
|
u64* valueParm)
|
361 |
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|
{
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362 |
|
|
struct HvCallPci_DsaAddr dsa;
|
363 |
|
|
struct HvCallPci_LoadReturn retVal;
|
364 |
|
|
|
365 |
|
|
*((u64*)&dsa) = 0;
|
366 |
|
|
|
367 |
|
|
dsa.busNumber = busNumberParm;
|
368 |
|
|
dsa.subBusNumber = subBusParm;
|
369 |
|
|
dsa.deviceId = deviceIdParm;
|
370 |
|
|
dsa.barNumber = barNumberParm;
|
371 |
|
|
|
372 |
|
|
HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
|
373 |
|
|
|
374 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
375 |
|
|
|
376 |
|
|
*valueParm = retVal.value;
|
377 |
|
|
|
378 |
|
|
return retVal.rc;
|
379 |
|
|
}
|
380 |
|
|
//============================================================================
|
381 |
|
|
static inline u64 HvCallPci_barStore8(u16 busNumberParm,
|
382 |
|
|
u8 subBusParm,
|
383 |
|
|
u8 deviceIdParm,
|
384 |
|
|
u8 barNumberParm,
|
385 |
|
|
u64 offsetParm,
|
386 |
|
|
u8 valueParm)
|
387 |
|
|
{
|
388 |
|
|
struct HvCallPci_DsaAddr dsa;
|
389 |
|
|
u64 retVal;
|
390 |
|
|
|
391 |
|
|
*((u64*)&dsa) = 0;
|
392 |
|
|
|
393 |
|
|
dsa.busNumber = busNumberParm;
|
394 |
|
|
dsa.subBusNumber = subBusParm;
|
395 |
|
|
dsa.deviceId = deviceIdParm;
|
396 |
|
|
dsa.barNumber = barNumberParm;
|
397 |
|
|
|
398 |
|
|
retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
|
399 |
|
|
|
400 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
401 |
|
|
|
402 |
|
|
return retVal;
|
403 |
|
|
}
|
404 |
|
|
//============================================================================
|
405 |
|
|
static inline u64 HvCallPci_barStore16(u16 busNumberParm,
|
406 |
|
|
u8 subBusParm,
|
407 |
|
|
u8 deviceIdParm,
|
408 |
|
|
u8 barNumberParm,
|
409 |
|
|
u64 offsetParm,
|
410 |
|
|
u16 valueParm)
|
411 |
|
|
{
|
412 |
|
|
struct HvCallPci_DsaAddr dsa;
|
413 |
|
|
u64 retVal;
|
414 |
|
|
|
415 |
|
|
*((u64*)&dsa) = 0;
|
416 |
|
|
|
417 |
|
|
dsa.busNumber = busNumberParm;
|
418 |
|
|
dsa.subBusNumber = subBusParm;
|
419 |
|
|
dsa.deviceId = deviceIdParm;
|
420 |
|
|
dsa.barNumber = barNumberParm;
|
421 |
|
|
|
422 |
|
|
retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
|
423 |
|
|
|
424 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
425 |
|
|
|
426 |
|
|
return retVal;
|
427 |
|
|
}
|
428 |
|
|
//============================================================================
|
429 |
|
|
static inline u64 HvCallPci_barStore32(u16 busNumberParm,
|
430 |
|
|
u8 subBusParm,
|
431 |
|
|
u8 deviceIdParm,
|
432 |
|
|
u8 barNumberParm,
|
433 |
|
|
u64 offsetParm,
|
434 |
|
|
u32 valueParm)
|
435 |
|
|
{
|
436 |
|
|
struct HvCallPci_DsaAddr dsa;
|
437 |
|
|
u64 retVal;
|
438 |
|
|
|
439 |
|
|
*((u64*)&dsa) = 0;
|
440 |
|
|
|
441 |
|
|
dsa.busNumber = busNumberParm;
|
442 |
|
|
dsa.subBusNumber = subBusParm;
|
443 |
|
|
dsa.deviceId = deviceIdParm;
|
444 |
|
|
dsa.barNumber = barNumberParm;
|
445 |
|
|
|
446 |
|
|
retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
|
447 |
|
|
|
448 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
449 |
|
|
|
450 |
|
|
return retVal;
|
451 |
|
|
}
|
452 |
|
|
//============================================================================
|
453 |
|
|
static inline u64 HvCallPci_barStore64(u16 busNumberParm,
|
454 |
|
|
u8 subBusParm,
|
455 |
|
|
u8 deviceIdParm,
|
456 |
|
|
u8 barNumberParm,
|
457 |
|
|
u64 offsetParm,
|
458 |
|
|
u64 valueParm)
|
459 |
|
|
{
|
460 |
|
|
struct HvCallPci_DsaAddr dsa;
|
461 |
|
|
u64 retVal;
|
462 |
|
|
|
463 |
|
|
*((u64*)&dsa) = 0;
|
464 |
|
|
|
465 |
|
|
dsa.busNumber = busNumberParm;
|
466 |
|
|
dsa.subBusNumber = subBusParm;
|
467 |
|
|
dsa.deviceId = deviceIdParm;
|
468 |
|
|
dsa.barNumber = barNumberParm;
|
469 |
|
|
|
470 |
|
|
retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
|
471 |
|
|
|
472 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
473 |
|
|
|
474 |
|
|
return retVal;
|
475 |
|
|
}
|
476 |
|
|
//============================================================================
|
477 |
|
|
static inline u64 HvCallPci_eoi(u16 busNumberParm,
|
478 |
|
|
u8 subBusParm,
|
479 |
|
|
u8 deviceIdParm)
|
480 |
|
|
{
|
481 |
|
|
struct HvCallPci_DsaAddr dsa;
|
482 |
|
|
struct HvCallPci_LoadReturn retVal;
|
483 |
|
|
|
484 |
|
|
*((u64*)&dsa) = 0;
|
485 |
|
|
|
486 |
|
|
dsa.busNumber = busNumberParm;
|
487 |
|
|
dsa.subBusNumber = subBusParm;
|
488 |
|
|
dsa.deviceId = deviceIdParm;
|
489 |
|
|
|
490 |
|
|
HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
|
491 |
|
|
|
492 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
493 |
|
|
|
494 |
|
|
return retVal.rc;
|
495 |
|
|
}
|
496 |
|
|
//============================================================================
|
497 |
|
|
static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
|
498 |
|
|
u8 subBusParm,
|
499 |
|
|
u8 deviceIdParm,
|
500 |
|
|
u8 barNumberParm,
|
501 |
|
|
u64 parms,
|
502 |
|
|
u32 sizeofParms)
|
503 |
|
|
{
|
504 |
|
|
struct HvCallPci_DsaAddr dsa;
|
505 |
|
|
u64 retVal;
|
506 |
|
|
|
507 |
|
|
*((u64*)&dsa) = 0;
|
508 |
|
|
|
509 |
|
|
dsa.busNumber = busNumberParm;
|
510 |
|
|
dsa.subBusNumber = subBusParm;
|
511 |
|
|
dsa.deviceId = deviceIdParm;
|
512 |
|
|
dsa.barNumber = barNumberParm;
|
513 |
|
|
|
514 |
|
|
retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
|
515 |
|
|
|
516 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
517 |
|
|
|
518 |
|
|
return retVal;
|
519 |
|
|
}
|
520 |
|
|
//============================================================================
|
521 |
|
|
static inline u64 HvCallPci_maskFisr(u16 busNumberParm,
|
522 |
|
|
u8 subBusParm,
|
523 |
|
|
u8 deviceIdParm,
|
524 |
|
|
u64 fisrMask)
|
525 |
|
|
{
|
526 |
|
|
struct HvCallPci_DsaAddr dsa;
|
527 |
|
|
u64 retVal;
|
528 |
|
|
|
529 |
|
|
*((u64*)&dsa) = 0;
|
530 |
|
|
|
531 |
|
|
dsa.busNumber = busNumberParm;
|
532 |
|
|
dsa.subBusNumber = subBusParm;
|
533 |
|
|
dsa.deviceId = deviceIdParm;
|
534 |
|
|
|
535 |
|
|
retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
|
536 |
|
|
|
537 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
538 |
|
|
|
539 |
|
|
return retVal;
|
540 |
|
|
}
|
541 |
|
|
//============================================================================
|
542 |
|
|
static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm,
|
543 |
|
|
u8 subBusParm,
|
544 |
|
|
u8 deviceIdParm,
|
545 |
|
|
u64 fisrMask)
|
546 |
|
|
{
|
547 |
|
|
struct HvCallPci_DsaAddr dsa;
|
548 |
|
|
u64 retVal;
|
549 |
|
|
|
550 |
|
|
*((u64*)&dsa) = 0;
|
551 |
|
|
|
552 |
|
|
dsa.busNumber = busNumberParm;
|
553 |
|
|
dsa.subBusNumber = subBusParm;
|
554 |
|
|
dsa.deviceId = deviceIdParm;
|
555 |
|
|
|
556 |
|
|
retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
|
557 |
|
|
|
558 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
559 |
|
|
|
560 |
|
|
return retVal;
|
561 |
|
|
}
|
562 |
|
|
//============================================================================
|
563 |
|
|
static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
|
564 |
|
|
u8 subBusParm,
|
565 |
|
|
u8 deviceIdParm,
|
566 |
|
|
u64 onNotOff)
|
567 |
|
|
{
|
568 |
|
|
struct HvCallPci_DsaAddr dsa;
|
569 |
|
|
u64 retVal;
|
570 |
|
|
|
571 |
|
|
*((u64*)&dsa) = 0;
|
572 |
|
|
|
573 |
|
|
dsa.busNumber = busNumberParm;
|
574 |
|
|
dsa.subBusNumber = subBusParm;
|
575 |
|
|
dsa.deviceId = deviceIdParm;
|
576 |
|
|
|
577 |
|
|
retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
|
578 |
|
|
|
579 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
580 |
|
|
|
581 |
|
|
return retVal;
|
582 |
|
|
}
|
583 |
|
|
//============================================================================
|
584 |
|
|
static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
|
585 |
|
|
u8 subBusParm,
|
586 |
|
|
u8 deviceNumberParm,
|
587 |
|
|
u64 parms,
|
588 |
|
|
u32 sizeofParms)
|
589 |
|
|
{
|
590 |
|
|
struct HvCallPci_DsaAddr dsa;
|
591 |
|
|
u64 retVal;
|
592 |
|
|
|
593 |
|
|
*((u64*)&dsa) = 0;
|
594 |
|
|
|
595 |
|
|
dsa.busNumber = busNumberParm;
|
596 |
|
|
dsa.subBusNumber = subBusParm;
|
597 |
|
|
dsa.deviceId = deviceNumberParm << 4;
|
598 |
|
|
|
599 |
|
|
retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
|
600 |
|
|
|
601 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
602 |
|
|
|
603 |
|
|
return retVal;
|
604 |
|
|
}
|
605 |
|
|
//============================================================================
|
606 |
|
|
static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm,
|
607 |
|
|
u8 subBusParm,
|
608 |
|
|
u8 deviceIdParm,
|
609 |
|
|
u64 interruptMask)
|
610 |
|
|
{
|
611 |
|
|
struct HvCallPci_DsaAddr dsa;
|
612 |
|
|
u64 retVal;
|
613 |
|
|
|
614 |
|
|
*((u64*)&dsa) = 0;
|
615 |
|
|
|
616 |
|
|
dsa.busNumber = busNumberParm;
|
617 |
|
|
dsa.subBusNumber = subBusParm;
|
618 |
|
|
dsa.deviceId = deviceIdParm;
|
619 |
|
|
|
620 |
|
|
retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
|
621 |
|
|
|
622 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
623 |
|
|
|
624 |
|
|
return retVal;
|
625 |
|
|
}
|
626 |
|
|
//============================================================================
|
627 |
|
|
static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm,
|
628 |
|
|
u8 subBusParm,
|
629 |
|
|
u8 deviceIdParm,
|
630 |
|
|
u64 interruptMask)
|
631 |
|
|
{
|
632 |
|
|
struct HvCallPci_DsaAddr dsa;
|
633 |
|
|
u64 retVal;
|
634 |
|
|
|
635 |
|
|
*((u64*)&dsa) = 0;
|
636 |
|
|
|
637 |
|
|
dsa.busNumber = busNumberParm;
|
638 |
|
|
dsa.subBusNumber = subBusParm;
|
639 |
|
|
dsa.deviceId = deviceIdParm;
|
640 |
|
|
|
641 |
|
|
retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
|
642 |
|
|
|
643 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
644 |
|
|
|
645 |
|
|
return retVal;
|
646 |
|
|
}
|
647 |
|
|
//============================================================================
|
648 |
|
|
|
649 |
|
|
static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm,
|
650 |
|
|
u8 subBusParm,
|
651 |
|
|
u8 deviceIdParm,
|
652 |
|
|
u64 parms,
|
653 |
|
|
u32 sizeofParms)
|
654 |
|
|
{
|
655 |
|
|
struct HvCallPci_DsaAddr dsa;
|
656 |
|
|
u64 retVal;
|
657 |
|
|
|
658 |
|
|
*((u64*)&dsa) = 0;
|
659 |
|
|
|
660 |
|
|
dsa.busNumber = busNumberParm;
|
661 |
|
|
dsa.subBusNumber = subBusParm;
|
662 |
|
|
dsa.deviceId = deviceIdParm;
|
663 |
|
|
|
664 |
|
|
retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
|
665 |
|
|
|
666 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
667 |
|
|
|
668 |
|
|
return retVal;
|
669 |
|
|
}
|
670 |
|
|
//============================================================================
|
671 |
|
|
|
672 |
|
|
static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
|
673 |
|
|
{
|
674 |
|
|
int xRetSize;
|
675 |
|
|
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
|
676 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
677 |
|
|
if (xRc == -1)
|
678 |
|
|
xRetSize = -1;
|
679 |
|
|
else
|
680 |
|
|
xRetSize = xRc & 0xFFFF;
|
681 |
|
|
return xRetSize;
|
682 |
|
|
}
|
683 |
|
|
//============================================================================
|
684 |
|
|
|
685 |
|
|
static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
|
686 |
|
|
{
|
687 |
|
|
int xRetSize;
|
688 |
|
|
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
|
689 |
|
|
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
|
690 |
|
|
if (xRc == -1)
|
691 |
|
|
xRetSize = -1;
|
692 |
|
|
else
|
693 |
|
|
xRetSize = xRc & 0xFFFF;
|
694 |
|
|
return xRetSize;
|
695 |
|
|
}
|
696 |
|
|
//============================================================================
|
697 |
|
|
#endif // _HVCALLPCI_H
|