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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ppc64/] [io.h] - Blame information for rev 1774

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Line No. Rev Author Line
1 1275 phoenix
#ifndef _PPC64_IO_H
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#define _PPC64_IO_H
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4
/*
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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#include <linux/config.h>
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#include <asm/page.h>
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#include <asm/byteorder.h>
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#ifdef CONFIG_PPC_ISERIES 
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#include <asm/iSeries/iSeries_io.h>
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#endif  
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#include <asm/memory.h>
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#include <asm/delay.h>
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#define SIO_CONFIG_RA   0x398
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#define SIO_CONFIG_RD   0x399
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#define SLOW_DOWN_IO
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/* Define this if you want to see virt_to_* messages */
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#undef __IO_DEBUG
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extern unsigned long isa_io_base;
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extern unsigned long isa_mem_base;
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extern unsigned long pci_io_base;
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extern unsigned long pci_dram_offset;
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extern int have_print;
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#define _IO_BASE        isa_io_base
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#define _ISA_MEM_BASE   isa_mem_base
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#define PCI_DRAM_OFFSET pci_dram_offset
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#ifdef CONFIG_PPC_ISERIES
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#define readb(addr)             iSeries_Read_Byte((void*)(addr))  
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#define readw(addr)             iSeries_Read_Word((void*)(addr))  
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#define readl(addr)             iSeries_Read_Long((void*)(addr))
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#define writeb(data, addr)      iSeries_Write_Byte(data,((void*)(addr)))
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#define writew(data, addr)      iSeries_Write_Word(data,((void*)(addr)))
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#define writel(data, addr)      iSeries_Write_Long(data,((void*)(addr)))
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#define memset_io(a,b,c)        iSeries_memset_io((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c)    iSeries_memcpy_fromio((void *)(a), (void *)(b), (c))
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#define memcpy_toio(a,b,c)      iSeries_memcpy_toio((void *)(a), (void *)(b), (c))
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#define inb(addr)               readb(((unsigned long)(addr)))  
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#define inw(addr)               readw(((unsigned long)(addr)))  
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#define inl(addr)               readl(((unsigned long)(addr)))
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#define outb(data,addr)         writeb(data,((unsigned long)(addr)))  
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#define outw(data,addr)         writew(data,((unsigned long)(addr)))  
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#define outl(data,addr)         writel(data,((unsigned long)(addr)))
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#else
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#define readb(addr)             eeh_readb((void*)(addr))  
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#define readw(addr)             eeh_readw((void*)(addr))  
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#define readl(addr)             eeh_readl((void*)(addr))
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#define writeb(data, addr)      eeh_writeb((data), ((void*)(addr)))
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#define writew(data, addr)      eeh_writew((data), ((void*)(addr)))
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#define writel(data, addr)      eeh_writel((data), ((void*)(addr)))
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#define memset_io(a,b,c)        eeh_memset_io((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c)    eeh_memcpy_fromio((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c)      eeh_memcpy_toio((void *)(a),(b),(c))
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#define inb(port)               eeh_inb((unsigned long)port)
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#define outb(val, port)         eeh_outb(val, (unsigned long)port)
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#define inw(port)               eeh_inw((unsigned long)port)
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#define outw(val, port)         eeh_outw(val, (unsigned long)port)
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#define inl(port)               eeh_inl((unsigned long)port)
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#define outl(val, port)         eeh_outl(val, (unsigned long)port)
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/*
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 * The __raw_read/write macros don't do byte-swapping.
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 * They are needed for some PCI devices such as the Matrox graphics
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 * adapter which is programmed to operate in big endian mode.
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 */
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#define __raw_readb(addr)              eeh_readb((void*)(addr))
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#define __raw_readw(addr)              eeh_raw_readw((void*)(addr))
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#define __raw_readl(addr)              eeh_raw_readl((void*)(addr))
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#define __raw_writeb(data, addr)       eeh_writeb((data), ((void*)(addr)))
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#define __raw_writew(data, addr)       eeh_raw_writew((data), ((void*)(addr)))
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#define __raw_writel(data, addr)       eeh_raw_writel((data), ((void*)(addr)))
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/*
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 * The insw/outsw/insl/outsl macros don't do byte-swapping.
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 * They are only used in practice for transferring buffers which
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 * are arrays of bytes, and byte-swapping is not appropriate in
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 * that case.  - paulus */
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#define insb(port, buf, ns)     _insb((u8 *)((port)+pci_io_base), (buf), (ns))
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#define outsb(port, buf, ns)    _outsb((u8 *)((port)+pci_io_base), (buf), (ns))
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#define insw(port, buf, ns)     _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
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#define outsw(port, buf, ns)    _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
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#define insl(port, buf, nl)     _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
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#define outsl(port, buf, nl)    _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
92
#endif
93
 
94
extern void _insb(volatile u8 *port, void *buf, int ns);
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extern void _outsb(volatile u8 *port, const void *buf, int ns);
96
extern void _insw(volatile u16 *port, void *buf, int ns);
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extern void _outsw(volatile u16 *port, const void *buf, int ns);
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extern void _insl(volatile u32 *port, void *buf, int nl);
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extern void _outsl(volatile u32 *port, const void *buf, int nl);
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extern void _insw_ns(volatile u16 *port, void *buf, int ns);
101
extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
102
extern void _insl_ns(volatile u32 *port, void *buf, int nl);
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extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
104
 
105
/*
106
 * output pause versions need a delay at least for the
107
 * w83c105 ide controller in a p610.
108
 */
109
#define inb_p(port)             inb(port)
110
#define outb_p(val, port)       (udelay(1), outb((val), (port)))
111
#define inw_p(port)             inw(port)
112
#define outw_p(val, port)       (udelay(1), outw((val), (port)))
113
#define inl_p(port)             inl(port)
114
#define outl_p(val, port)       (udelay(1), outl((val), (port)))
115
 
116
/*
117
 * The *_ns versions below don't do byte-swapping.
118
 * Neither do the standard versions now, these are just here
119
 * for older code.
120
 */
121
#define insw_ns(port, buf, ns)  _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
122
#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
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#define insl_ns(port, buf, nl)  _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
124
#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
125
 
126
 
127
#define IO_SPACE_LIMIT ~(0UL)
128
#define MEM_SPACE_LIMIT ~(0UL)
129
 
130
 
131
#ifdef __KERNEL__
132
/*
133
 * Map in an area of physical address space, for accessing
134
 * I/O devices etc.
135
 */
136
extern void *__ioremap(unsigned long address, unsigned long size,
137
                       unsigned long flags);
138
extern void *ioremap(unsigned long address, unsigned long size);
139
#define ioremap_nocache(addr, size)     ioremap((addr), (size))
140
extern void iounmap(void *addr);
141
 
142
/*
143
 * Change virtual addresses to physical addresses and vv, for
144
 * addresses in the area where the kernel has the RAM mapped.
145
 */
146
static inline unsigned long virt_to_phys(volatile void * address)
147
{
148
#ifdef __IO_DEBUG
149
        printk("virt_to_phys: 0x%08lx -> 0x%08lx\n",
150
                        (unsigned long) address,
151
                        __pa((unsigned long)address));
152
#endif
153
        return __pa((unsigned long)address);
154
}
155
 
156
static inline void * phys_to_virt(unsigned long address)
157
{
158
#ifdef __IO_DEBUG
159
        printk("phys_to_virt: 0x%08lx -> 0x%08lx\n", address, __va(address));
160
#endif
161
        return (void *) __va(address);
162
}
163
 
164
/*
165
 * Change "struct page" to physical address.
166
 */
167
#define page_to_phys(page)      ((page - mem_map) << PAGE_SHIFT)
168
 
169
 
170
#endif /* __KERNEL__ */
171
 
172
static inline void iosync(void)
173
{
174
        __asm__ __volatile__ ("sync" : : : "memory");
175
}
176
 
177
/* Enforce in-order execution of data I/O.
178
 * No distinction between read/write on PPC; use eieio for all three.
179
 */
180
#define iobarrier_rw() eieio()
181
#define iobarrier_r()  eieio()
182
#define iobarrier_w()  eieio()
183
 
184
/*
185
 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
186
 * Until we can validate all required device drivers are weakc safe, an
187
 * excess of syncs before the MMIO operations will make things work.  On
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 * sstar, sync time is << than mmio time, so this should not be a big impact.
189
 */
190
static inline int in_8(volatile unsigned char *addr)
191
{
192
        int ret;
193
 
194
        __asm__ __volatile__("sync; lbz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
195
        return ret;
196
}
197
 
198
static inline void out_8(volatile unsigned char *addr, int val)
199
{
200
        __asm__ __volatile__("sync; stb%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
201
}
202
 
203
static inline int in_le16(volatile unsigned short *addr)
204
{
205
        int ret;
206
 
207
        __asm__ __volatile__("sync; lhbrx %0,0,%1; sync" : "=r" (ret) :
208
                              "r" (addr), "m" (*addr));
209
        return ret;
210
}
211
 
212
static inline int in_be16(volatile unsigned short *addr)
213
{
214
        int ret;
215
 
216
        __asm__ __volatile__("sync; lhz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
217
        return ret;
218
}
219
 
220
static inline void out_le16(volatile unsigned short *addr, int val)
221
{
222
        __asm__ __volatile__("sync; sthbrx %1,0,%2; sync" : "=m" (*addr) :
223
                              "r" (val), "r" (addr));
224
}
225
 
226
static inline void out_be16(volatile unsigned short *addr, int val)
227
{
228
        __asm__ __volatile__("sync; sth%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
229
}
230
 
231
static inline unsigned in_le32(volatile unsigned *addr)
232
{
233
        unsigned ret;
234
 
235
        __asm__ __volatile__("sync; lwbrx %0,0,%1; sync" : "=r" (ret) :
236
                             "r" (addr), "m" (*addr));
237
        return ret;
238
}
239
 
240
static inline unsigned in_be32(volatile unsigned *addr)
241
{
242
        unsigned ret;
243
 
244
        __asm__ __volatile__("sync; lwz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
245
        return ret;
246
}
247
 
248
static inline void out_le32(volatile unsigned *addr, int val)
249
{
250
        __asm__ __volatile__("sync; stwbrx %1,0,%2; sync" : "=m" (*addr) :
251
                             "r" (val), "r" (addr));
252
}
253
 
254
static inline void out_be32(volatile unsigned *addr, int val)
255
{
256
        __asm__ __volatile__("sync; stw%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
257
}
258
 
259
#ifndef CONFIG_PPC_ISERIES 
260
#include <asm/eeh.h>
261
#endif
262
 
263
#ifdef __KERNEL__
264
static inline int check_signature(unsigned long io_addr,
265
        const unsigned char *signature, int length)
266
{
267
        int retval = 0;
268
#ifndef CONFIG_PPC_ISERIES 
269
        do {
270
                if (readb(io_addr) != *signature)
271
                        goto out;
272
                io_addr++;
273
                signature++;
274
                length--;
275
        } while (length);
276
        retval = 1;
277
out:
278
#endif
279
        return retval;
280
}
281
 
282
/* Nothing to do */
283
 
284
#define dma_cache_inv(_start,_size)             do { } while (0)
285
#define dma_cache_wback(_start,_size)           do { } while (0)
286
#define dma_cache_wback_inv(_start,_size)       do { } while (0)
287
 
288
#endif /* __KERNEL__ */
289
 
290
#endif /* _PPC64_IO_H */

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