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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ppc64/] [pci-bridge.h] - Blame information for rev 1774

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Line No. Rev Author Line
1 1275 phoenix
#ifdef __KERNEL__
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#ifndef _ASM_PCI_BRIDGE_H
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#define _ASM_PCI_BRIDGE_H
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/*
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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struct device_node;
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struct pci_controller;
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/*
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 * pci_io_base returns the memory address at which you can access
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 * the I/O space for PCI bus number `bus' (or NULL on error).
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 */
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extern void *pci_bus_io_base(unsigned int bus);
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extern unsigned long pci_bus_io_base_phys(unsigned int bus);
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extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
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/* Get the PCI host controller for a bus */
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extern struct pci_controller* pci_bus_to_hose(int bus);
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/* Get the PCI host controller for an OF device */
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extern struct pci_controller*
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pci_find_hose_for_OF_device(struct device_node* node);
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enum phb_types {
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        phb_type_unknown    = 0x0,
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        phb_type_hypervisor = 0x1,
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        phb_type_python     = 0x10,
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        phb_type_speedwagon = 0x11
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};
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/*
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 * Structure of a PCI controller (host bridge)
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 */
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struct pci_controller {
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        char what[8];                     /* Eye catcher      */
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        enum phb_types type;              /* Type of hardware */
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        struct pci_controller *next;
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        struct pci_bus *bus;
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        void *arch_data;
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        int first_busno;
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        int last_busno;
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        void *io_base_virt;
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        unsigned long io_base_phys;
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        /* Some machines (PReP) have a non 1:1 mapping of
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         * the PCI memory space in the CPU bus space
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         */
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        unsigned long pci_mem_offset;
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        unsigned long pci_io_offset;
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        struct pci_ops *ops;
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        volatile unsigned long *cfg_addr;
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        volatile unsigned char *cfg_data;
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        volatile unsigned long *phb_regs;
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        volatile unsigned long *chip_regs;
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        /* Currently, we limit ourselves to 1 IO range and 3 mem
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         * ranges since the common pci_bus structure can't handle more
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         */
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        struct resource io_resource;
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        struct resource mem_resources[3];
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        int mem_resource_count;
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        int    global_number;
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        int    local_number;
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        int    system_bus_number;
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        unsigned long buid;
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        unsigned long dma_window_base_cur;
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        unsigned long dma_window_size;
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};
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/* This version handles the new Uni-N host bridge, the iobase is now
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 * a per-device thing. I also added the memory base so PReP can
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 * be fixed to return 0xc0000000 (I didn't actually implement it)
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 *
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 * pci_dev_io_base() returns either a virtual (ioremap'ed) address or
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 * a physical address. In-kernel clients will use logical while the
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 * sys_pciconfig_iobase syscall returns a physical one to userland.
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 */
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void *pci_dev_io_base(unsigned char bus, unsigned char devfn, int physical);
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void *pci_dev_mem_base(unsigned char bus, unsigned char devfn);
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/* Returns the root-bridge number (Uni-N number) of a device */
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int pci_dev_root_bridge(unsigned char bus, unsigned char devfn);
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/*
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 * pci_device_loc returns the bus number and device/function number
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 * for a device on a PCI bus, given its device_node struct.
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 * It returns 0 if OK, -1 on error.
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 */
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int pci_device_loc(struct device_node *dev, unsigned char *bus_ptr,
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                   unsigned char *devfn_ptr);
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struct bridge_data {
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        volatile unsigned int *cfg_addr;
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        volatile unsigned char *cfg_data;
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        void *io_base;          /* virtual */
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        unsigned long io_base_phys;
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        int bus_number;
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        int max_bus;
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        struct bridge_data *next;
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        struct device_node *node;
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};
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#endif
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#endif /* __KERNEL__ */

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