| 1 | 1275 | phoenix | #ifndef __PPC64_PCI_H
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         | 2 |  |  | #define __PPC64_PCI_H
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         | 3 |  |  | #ifdef __KERNEL__
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         | 4 |  |  |  
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         | 5 |  |  | /*
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         | 6 |  |  |  * This program is free software; you can redistribute it and/or
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         | 7 |  |  |  * modify it under the terms of the GNU General Public License
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         | 8 |  |  |  * as published by the Free Software Foundation; either version
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         | 9 |  |  |  * 2 of the License, or (at your option) any later version.
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         | 10 |  |  |  */
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         | 11 |  |  |  
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         | 12 |  |  | /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
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         | 13 |  |  | #define IOBASE_BRIDGE_NUMBER    0
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         | 14 |  |  | #define IOBASE_MEMORY           1
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         | 15 |  |  | #define IOBASE_IO               2
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         | 16 |  |  | #define IOBASE_ISA_IO           3
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         | 17 |  |  | #define IOBASE_ISA_MEM          4
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         | 18 |  |  |  
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         | 19 |  |  | /* Can be used to override the logic in pci_scan_bus for skipping
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         | 20 |  |  |  * already-configured bus numbers - to be used for buggy BIOSes
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         | 21 |  |  |  * or architectures with incomplete PCI setup by the loader.
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         | 22 |  |  |  */
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         | 23 |  |  | extern int pcibios_assign_all_busses(void);
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         | 24 |  |  |  
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         | 25 |  |  | #define PCIBIOS_MIN_IO          0x1000
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         | 26 |  |  | #define PCIBIOS_MIN_MEM         0x10000000
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         | 27 |  |  |  
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         | 28 |  |  | /*
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         | 29 |  |  |  * ppc64 can have multifunction devices that do not respond to function 0.
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         | 30 |  |  |  * In this case we must scan all functions.
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         | 31 |  |  |  */
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         | 32 |  |  | #define pcibios_scan_all_fns()     1
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         | 33 |  |  |  
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         | 34 |  |  | static inline void pcibios_set_master(struct pci_dev *dev)
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         | 35 |  |  | {
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         | 36 |  |  |         /* No special bus mastering setup handling */
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         | 37 |  |  | }
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         | 38 |  |  |  
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         | 39 |  |  | static inline void pcibios_penalize_isa_irq(int irq)
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         | 40 |  |  | {
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         | 41 |  |  |         /* We don't do dynamic PCI IRQ allocation */
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         | 42 |  |  | }
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         | 43 |  |  |  
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         | 44 |  |  | #include <linux/types.h>
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         | 45 |  |  | #include <linux/slab.h>
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         | 46 |  |  | #include <linux/string.h>
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         | 47 |  |  | #include <asm/scatterlist.h>
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         | 48 |  |  | #include <asm/io.h>
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         | 49 |  |  | #include <asm/prom.h>
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         | 50 |  |  |  
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         | 51 |  |  | struct pci_dev;
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         | 52 |  |  | #define REG_SAVE_SIZE 64
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         | 53 |  |  | /************************************************************************
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         | 54 |  |  |  * Structure to hold the data for PCI Register Save/Restore functions.  *
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         | 55 |  |  |  ************************************************************************/
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         | 56 |  |  | struct pci_config_reg_save_area {
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         | 57 |  |  |         struct pci_dev* PciDev;     /* Pointer to device(Sanity Check)     */
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         | 58 |  |  |         int    Flags;               /* Control & Info Flags                */
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         | 59 |  |  |         int    RCode;               /* Return Code on Save/Restore         */
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         | 60 |  |  |         int    Register;            /* Pointer to current register.        */
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         | 61 |  |  |         u8     Regs[REG_SAVE_SIZE]; /* Save Area                           */
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         | 62 |  |  | };
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         | 63 |  |  | /************************************************************************
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         | 64 |  |  |  * Functions to support device reset                                    *
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         | 65 |  |  |  ************************************************************************/
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         | 66 |  |  | extern int   pci_reset_device(struct pci_dev*, int, int);
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         | 67 |  |  | extern int   pci_save_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
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         | 68 |  |  | extern int   pci_restore_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
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         | 69 |  |  | extern char* pci_card_location(struct pci_dev*);
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         | 70 |  |  |  
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         | 71 |  |  | extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
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         | 72 |  |  |                                   dma_addr_t *dma_handle);
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         | 73 |  |  | extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
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         | 74 |  |  |                                 void *vaddr, dma_addr_t dma_handle);
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         | 75 |  |  |  
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         | 76 |  |  | extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
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         | 77 |  |  |                                         size_t size, int direction);
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         | 78 |  |  | extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
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         | 79 |  |  |                              size_t size, int direction);
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         | 80 |  |  | extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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         | 81 |  |  |                       int nents, int direction);
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         | 82 |  |  | extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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         | 83 |  |  |                          int nents, int direction);
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         | 84 |  |  |  
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         | 85 |  |  | extern void pSeries_pcibios_init_early(void);
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         | 86 |  |  |  
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         | 87 |  |  | static inline void pci_dma_sync_single(struct pci_dev *hwdev,
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         | 88 |  |  |                                        dma_addr_t dma_handle,
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         | 89 |  |  |                                        size_t size, int direction)
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         | 90 |  |  | {
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         | 91 |  |  |         if (direction == PCI_DMA_NONE)
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         | 92 |  |  |                 BUG();
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         | 93 |  |  |         /* nothing to do */
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         | 94 |  |  | }
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         | 95 |  |  |  
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         | 96 |  |  | static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
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         | 97 |  |  |                                    struct scatterlist *sg,
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         | 98 |  |  |                                    int nelems, int direction)
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         | 99 |  |  | {
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         | 100 |  |  |         if (direction == PCI_DMA_NONE)
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         | 101 |  |  |                 BUG();
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         | 102 |  |  |         /* nothing to do */
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         | 103 |  |  | }
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         | 104 |  |  |  
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         | 105 |  |  | /* Return whether the given PCI device DMA address mask can
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         | 106 |  |  |  * be supported properly.  For example, if your device can
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         | 107 |  |  |  * only drive the low 24-bits during PCI bus mastering, then
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         | 108 |  |  |  * you would pass 0x00ffffff as the mask to this function.
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         | 109 |  |  |  */
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         | 110 |  |  | static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
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         | 111 |  |  | {
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         | 112 |  |  |         return 1;
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         | 113 |  |  | }
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         | 114 |  |  |  
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         | 115 |  |  | /* Return the index of the PCI controller for device PDEV. */
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         | 116 |  |  | extern int pci_controller_num(struct pci_dev *pdev);
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         | 117 |  |  |  
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         | 118 |  |  | struct vm_area_struct;
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         | 119 |  |  | /* Map a range of PCI memory or I/O space for a device into user space */
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         | 120 |  |  | int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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         | 121 |  |  |                         enum pci_mmap_state mmap_state, int write_combine);
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         | 122 |  |  |  
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         | 123 |  |  | /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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         | 124 |  |  | #define HAVE_PCI_MMAP   1
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         | 125 |  |  |  
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         | 126 |  |  | #define sg_dma_address(sg)      ((sg)->dma_address)
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         | 127 |  |  | #define sg_dma_len(sg)          ((sg)->dma_length)
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         | 128 |  |  |  
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         | 129 |  |  | #define pci_map_page(dev, page, off, size, dir) \
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         | 130 |  |  |                 pci_map_single(dev, (page_address(page) + (off)), size, dir)
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         | 131 |  |  | #define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
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         | 132 |  |  |  
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         | 133 |  |  | /* pci_unmap_{single,page} is not a nop, thus... */
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         | 134 |  |  | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
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         | 135 |  |  |         dma_addr_t ADDR_NAME;
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         | 136 |  |  | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
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         | 137 |  |  |         __u32 LEN_NAME;
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         | 138 |  |  | #define pci_unmap_addr(PTR, ADDR_NAME)                  \
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         | 139 |  |  |         ((PTR)->ADDR_NAME)
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         | 140 |  |  | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
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         | 141 |  |  |         (((PTR)->ADDR_NAME) = (VAL))
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         | 142 |  |  | #define pci_unmap_len(PTR, LEN_NAME)                    \
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         | 143 |  |  |         ((PTR)->LEN_NAME)
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         | 144 |  |  | #define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
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         | 145 |  |  |         (((PTR)->LEN_NAME) = (VAL))
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         | 146 |  |  |  
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         | 147 |  |  | #define pci_dac_dma_supported(pci_dev, mask)    (0)
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         | 148 |  |  |  
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         | 149 |  |  | /* The PCI address space does equal the physical memory
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         | 150 |  |  |  * address space.  The networking and block device layers use
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         | 151 |  |  |  * this boolean for bounce buffer decisions.
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         | 152 |  |  |  */
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         | 153 |  |  | #define PCI_DMA_BUS_IS_PHYS     (0)
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         | 154 |  |  |  
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         | 155 |  |  | #endif  /* __KERNEL__ */
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         | 156 |  |  |  
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         | 157 |  |  | #endif /* __PPC64_PCI_H */
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