1 |
1275 |
phoenix |
#ifndef __PPC64_PCI_H
|
2 |
|
|
#define __PPC64_PCI_H
|
3 |
|
|
#ifdef __KERNEL__
|
4 |
|
|
|
5 |
|
|
/*
|
6 |
|
|
* This program is free software; you can redistribute it and/or
|
7 |
|
|
* modify it under the terms of the GNU General Public License
|
8 |
|
|
* as published by the Free Software Foundation; either version
|
9 |
|
|
* 2 of the License, or (at your option) any later version.
|
10 |
|
|
*/
|
11 |
|
|
|
12 |
|
|
/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
|
13 |
|
|
#define IOBASE_BRIDGE_NUMBER 0
|
14 |
|
|
#define IOBASE_MEMORY 1
|
15 |
|
|
#define IOBASE_IO 2
|
16 |
|
|
#define IOBASE_ISA_IO 3
|
17 |
|
|
#define IOBASE_ISA_MEM 4
|
18 |
|
|
|
19 |
|
|
/* Can be used to override the logic in pci_scan_bus for skipping
|
20 |
|
|
* already-configured bus numbers - to be used for buggy BIOSes
|
21 |
|
|
* or architectures with incomplete PCI setup by the loader.
|
22 |
|
|
*/
|
23 |
|
|
extern int pcibios_assign_all_busses(void);
|
24 |
|
|
|
25 |
|
|
#define PCIBIOS_MIN_IO 0x1000
|
26 |
|
|
#define PCIBIOS_MIN_MEM 0x10000000
|
27 |
|
|
|
28 |
|
|
/*
|
29 |
|
|
* ppc64 can have multifunction devices that do not respond to function 0.
|
30 |
|
|
* In this case we must scan all functions.
|
31 |
|
|
*/
|
32 |
|
|
#define pcibios_scan_all_fns() 1
|
33 |
|
|
|
34 |
|
|
static inline void pcibios_set_master(struct pci_dev *dev)
|
35 |
|
|
{
|
36 |
|
|
/* No special bus mastering setup handling */
|
37 |
|
|
}
|
38 |
|
|
|
39 |
|
|
static inline void pcibios_penalize_isa_irq(int irq)
|
40 |
|
|
{
|
41 |
|
|
/* We don't do dynamic PCI IRQ allocation */
|
42 |
|
|
}
|
43 |
|
|
|
44 |
|
|
#include <linux/types.h>
|
45 |
|
|
#include <linux/slab.h>
|
46 |
|
|
#include <linux/string.h>
|
47 |
|
|
#include <asm/scatterlist.h>
|
48 |
|
|
#include <asm/io.h>
|
49 |
|
|
#include <asm/prom.h>
|
50 |
|
|
|
51 |
|
|
struct pci_dev;
|
52 |
|
|
#define REG_SAVE_SIZE 64
|
53 |
|
|
/************************************************************************
|
54 |
|
|
* Structure to hold the data for PCI Register Save/Restore functions. *
|
55 |
|
|
************************************************************************/
|
56 |
|
|
struct pci_config_reg_save_area {
|
57 |
|
|
struct pci_dev* PciDev; /* Pointer to device(Sanity Check) */
|
58 |
|
|
int Flags; /* Control & Info Flags */
|
59 |
|
|
int RCode; /* Return Code on Save/Restore */
|
60 |
|
|
int Register; /* Pointer to current register. */
|
61 |
|
|
u8 Regs[REG_SAVE_SIZE]; /* Save Area */
|
62 |
|
|
};
|
63 |
|
|
/************************************************************************
|
64 |
|
|
* Functions to support device reset *
|
65 |
|
|
************************************************************************/
|
66 |
|
|
extern int pci_reset_device(struct pci_dev*, int, int);
|
67 |
|
|
extern int pci_save_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
|
68 |
|
|
extern int pci_restore_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
|
69 |
|
|
extern char* pci_card_location(struct pci_dev*);
|
70 |
|
|
|
71 |
|
|
extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
|
72 |
|
|
dma_addr_t *dma_handle);
|
73 |
|
|
extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
|
74 |
|
|
void *vaddr, dma_addr_t dma_handle);
|
75 |
|
|
|
76 |
|
|
extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
|
77 |
|
|
size_t size, int direction);
|
78 |
|
|
extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
|
79 |
|
|
size_t size, int direction);
|
80 |
|
|
extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
|
81 |
|
|
int nents, int direction);
|
82 |
|
|
extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
|
83 |
|
|
int nents, int direction);
|
84 |
|
|
|
85 |
|
|
extern void pSeries_pcibios_init_early(void);
|
86 |
|
|
|
87 |
|
|
static inline void pci_dma_sync_single(struct pci_dev *hwdev,
|
88 |
|
|
dma_addr_t dma_handle,
|
89 |
|
|
size_t size, int direction)
|
90 |
|
|
{
|
91 |
|
|
if (direction == PCI_DMA_NONE)
|
92 |
|
|
BUG();
|
93 |
|
|
/* nothing to do */
|
94 |
|
|
}
|
95 |
|
|
|
96 |
|
|
static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
|
97 |
|
|
struct scatterlist *sg,
|
98 |
|
|
int nelems, int direction)
|
99 |
|
|
{
|
100 |
|
|
if (direction == PCI_DMA_NONE)
|
101 |
|
|
BUG();
|
102 |
|
|
/* nothing to do */
|
103 |
|
|
}
|
104 |
|
|
|
105 |
|
|
/* Return whether the given PCI device DMA address mask can
|
106 |
|
|
* be supported properly. For example, if your device can
|
107 |
|
|
* only drive the low 24-bits during PCI bus mastering, then
|
108 |
|
|
* you would pass 0x00ffffff as the mask to this function.
|
109 |
|
|
*/
|
110 |
|
|
static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
|
111 |
|
|
{
|
112 |
|
|
return 1;
|
113 |
|
|
}
|
114 |
|
|
|
115 |
|
|
/* Return the index of the PCI controller for device PDEV. */
|
116 |
|
|
extern int pci_controller_num(struct pci_dev *pdev);
|
117 |
|
|
|
118 |
|
|
struct vm_area_struct;
|
119 |
|
|
/* Map a range of PCI memory or I/O space for a device into user space */
|
120 |
|
|
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
|
121 |
|
|
enum pci_mmap_state mmap_state, int write_combine);
|
122 |
|
|
|
123 |
|
|
/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
|
124 |
|
|
#define HAVE_PCI_MMAP 1
|
125 |
|
|
|
126 |
|
|
#define sg_dma_address(sg) ((sg)->dma_address)
|
127 |
|
|
#define sg_dma_len(sg) ((sg)->dma_length)
|
128 |
|
|
|
129 |
|
|
#define pci_map_page(dev, page, off, size, dir) \
|
130 |
|
|
pci_map_single(dev, (page_address(page) + (off)), size, dir)
|
131 |
|
|
#define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
|
132 |
|
|
|
133 |
|
|
/* pci_unmap_{single,page} is not a nop, thus... */
|
134 |
|
|
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
|
135 |
|
|
dma_addr_t ADDR_NAME;
|
136 |
|
|
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
|
137 |
|
|
__u32 LEN_NAME;
|
138 |
|
|
#define pci_unmap_addr(PTR, ADDR_NAME) \
|
139 |
|
|
((PTR)->ADDR_NAME)
|
140 |
|
|
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
|
141 |
|
|
(((PTR)->ADDR_NAME) = (VAL))
|
142 |
|
|
#define pci_unmap_len(PTR, LEN_NAME) \
|
143 |
|
|
((PTR)->LEN_NAME)
|
144 |
|
|
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
|
145 |
|
|
(((PTR)->LEN_NAME) = (VAL))
|
146 |
|
|
|
147 |
|
|
#define pci_dac_dma_supported(pci_dev, mask) (0)
|
148 |
|
|
|
149 |
|
|
/* The PCI address space does equal the physical memory
|
150 |
|
|
* address space. The networking and block device layers use
|
151 |
|
|
* this boolean for bounce buffer decisions.
|
152 |
|
|
*/
|
153 |
|
|
#define PCI_DMA_BUS_IS_PHYS (0)
|
154 |
|
|
|
155 |
|
|
#endif /* __KERNEL__ */
|
156 |
|
|
|
157 |
|
|
#endif /* __PPC64_PCI_H */
|