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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ppc64/] [user_exports.h] - Blame information for rev 1774

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1 1275 phoenix
#ifndef _USER_EXPORTS_H
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#define _USER_EXPORTS_H
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/*
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 * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
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 *   Copyright (C) 2002 Dave Engebretsen & Mike Corrigan
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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#ifdef __powerpc64__
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typedef unsigned long u64;
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#else
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typedef unsigned long long u64;
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#endif
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struct user_exports {
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        /*==================================================================
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         * Cache line 1: 0x0000 - 0x007F
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         * Kernel only data - undefined for user space
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         *==================================================================
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         */
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        u64 undefined[16];
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        /*==================================================================
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         * Cache line 2: 0x0080 - 0x00FF
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         * Kernel / User data
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         *==================================================================
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         */
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        u8  eye_catcher[6];      /* Eyecatcher: PPC64         0x00 */
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        u16 version;             /* Version number            0x06 */
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        u16 platform;            /* Platform type             0x08 */
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        u16 processor;           /* Processor type            0x0A */
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        u32 processorCount;      /* # of physical processors  0x0C */
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        u64 physicalMemorySize;  /* Size of real memory(B)    0x10 */
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        u16 dCacheL1Size;        /* L1 d-cache size           0x18 */
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        u16 dCacheL1LineSize;    /* L1 d-cache line size      0x1A */
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        u16 dCacheL1LogLineSize; /* L1 d-cache line size Log2 0x1C */
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        u16 dCacheL1LinesPerPage;/* L1 d-cache lines / page   0x1E */
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        u16 dCacheL1Assoc;       /* L1 d-cache associativity  0x20 */
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        u16 iCacheL1Size;        /* L1 i-cache size           0x22 */
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        u16 iCacheL1LineSize;    /* L1 i-cache line size      0x24 */
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        u16 iCacheL1LogLineSize; /* L1 i-cache line size Log2 0x26 */
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        u16 iCacheL1LinesPerPage;/* L1 i-cache lines / page   0x28 */
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        u16 iCacheL1Assoc;       /* L1 i-cache associativity  0x2A */
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        u16 cacheL2Size;         /* L2 cache size             0x2C */
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        u16 cacheL2Assoc;        /* L2 cache associativity    0x2E */
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        u64 tb_orig_stamp;       /* Timebase at boot          0x30 */
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        u64 tb_ticks_per_sec;    /* Timebase tics / sec       0x38 */
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        u64 tb_to_xs;            /* Inverse of TB to 2^20     0x40 */
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        u64 stamp_xsec;          /*                           0x48 */
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        volatile u64 tb_update_count; /* Timebase atomicity   0x50 */
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        u32 tz_minuteswest;      /* Minutes west of Greenwich 0x58 */
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        u32 tz_dsttime;          /* Type of dst correction    0x5C */
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        u64 resv1[4];            /* Reserverd          0x60 - 0x7F */
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};
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/* Platform types */
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#define PLATFORM_PSERIES      0x0100
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#define PLATFORM_PSERIES_LPAR 0x0101
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#define PLATFORM_ISERIES_LPAR 0x0201
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/* Processor types */
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#define PV_NORTHSTAR    0x0033
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#define PV_PULSAR       0x0034
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#define PV_POWER4       0x0035
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#define PV_ICESTAR      0x0036
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#define PV_SSTAR        0x0037
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#define PV_POWER4p      0x0038
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#define PV_POWER4ul     0x0039
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#define PV_630          0x0040
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#define PV_630p         0x0041
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#endif /* USER_EXPORTS_H */

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