OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-s390/] [irq.h] - Blame information for rev 1774

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix
#ifndef _ASM_IRQ_H
2
#define _ASM_IRQ_H
3
 
4
#include <linux/config.h>
5
#ifdef __KERNEL__
6
#include <asm/hardirq.h>
7
 
8
/*
9
 * How many IRQ's for S390 ?!?
10
 */
11
#define __MAX_SUBCHANNELS 65536
12
#define NR_IRQS           __MAX_SUBCHANNELS
13
#define NR_CHPIDS 256
14
 
15
#define LPM_ANYPATH 0xff /* doesn't really belong here, Ingo? */
16
 
17
#define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF ))
18
 
19
/*
20
 * path management control word
21
 */
22
typedef struct {
23
      __u32 intparm;      /* interruption parameter */
24
      __u32 qf   : 1;     /* qdio facility */
25
      __u32 res0 : 1;     /* reserved zeros */
26
      __u32 isc  : 3;     /* interruption sublass */
27
      __u32 res5 : 3;     /* reserved zeros */
28
      __u32 ena  : 1;     /* enabled */
29
      __u32 lm   : 2;     /* limit mode */
30
      __u32 mme  : 2;     /* measurement-mode enable */
31
      __u32 mp   : 1;     /* multipath mode */
32
      __u32 tf   : 1;     /* timing facility */
33
      __u32 dnv  : 1;     /* device number valid */
34
      __u32 dev  : 16;    /* device number */
35
      __u8  lpm;          /* logical path mask */
36
      __u8  pnom;         /* path not operational mask */
37
      __u8  lpum;         /* last path used mask */
38
      __u8  pim;          /* path installed mask */
39
      __u16 mbi;          /* measurement-block index */
40
      __u8  pom;          /* path operational mask */
41
      __u8  pam;          /* path available mask */
42
      __u8  chpid[8];     /* CHPID 0-7 (if available) */
43
      __u32 unused1 : 8;  /* reserved zeros */
44
      __u32 st      : 3;  /* subchannel type */
45
      __u32 unused2 : 20; /* reserved zeros */
46
      __u32 csense  : 1;  /* concurrent sense; can be enabled ...*/
47
                          /*  ... per MSCH, however, if facility */
48
                          /*  ... is not installed, this results */
49
                          /*  ... in an operand exception.       */
50
   } __attribute__ ((packed)) pmcw_t;
51
 
52
#endif /* __KERNEL__ */
53
/*
54
 * subchannel status word
55
 */
56
typedef struct {
57
      __u32 key  : 4; /* subchannel key */
58
      __u32 sctl : 1; /* suspend control */
59
      __u32 eswf : 1; /* ESW format */
60
      __u32 cc   : 2; /* deferred condition code */
61
      __u32 fmt  : 1; /* format */
62
      __u32 pfch : 1; /* prefetch */
63
      __u32 isic : 1; /* initial-status interruption control */
64
      __u32 alcc : 1; /* address-limit checking control */
65
      __u32 ssi  : 1; /* supress-suspended interruption */
66
      __u32 zcc  : 1; /* zero condition code */
67
      __u32 ectl : 1; /* extended control */
68
      __u32 pno  : 1;     /* path not operational */
69
      __u32 res  : 1;     /* reserved */
70
      __u32 fctl : 3;     /* function control */
71
      __u32 actl : 7;     /* activity control */
72
      __u32 stctl : 5;    /* status control */
73
      __u32 cpa;          /* channel program address */
74
      __u32 dstat : 8;    /* device status */
75
      __u32 cstat : 8;    /* subchannel status */
76
      __u32 count : 16;   /* residual count */
77
   } __attribute__ ((packed)) scsw_t;
78
 
79
#define SCSW_FCTL_CLEAR_FUNC     0x1
80
#define SCSW_FCTL_HALT_FUNC      0x2
81
#define SCSW_FCTL_START_FUNC     0x4
82
 
83
#define SCSW_ACTL_SUSPENDED      0x1
84
#define SCSW_ACTL_DEVACT         0x2
85
#define SCSW_ACTL_SCHACT         0x4
86
#define SCSW_ACTL_CLEAR_PEND     0x8
87
#define SCSW_ACTL_HALT_PEND      0x10
88
#define SCSW_ACTL_START_PEND     0x20
89
#define SCSW_ACTL_RESUME_PEND    0x40
90
 
91
#define SCSW_STCTL_STATUS_PEND   0x1
92
#define SCSW_STCTL_SEC_STATUS    0x2
93
#define SCSW_STCTL_PRIM_STATUS   0x4
94
#define SCSW_STCTL_INTER_STATUS  0x8
95
#define SCSW_STCTL_ALERT_STATUS  0x10
96
 
97
#define DEV_STAT_ATTENTION       0x80
98
#define DEV_STAT_STAT_MOD        0x40
99
#define DEV_STAT_CU_END          0x20
100
#define DEV_STAT_BUSY            0x10
101
#define DEV_STAT_CHN_END         0x08
102
#define DEV_STAT_DEV_END         0x04
103
#define DEV_STAT_UNIT_CHECK      0x02
104
#define DEV_STAT_UNIT_EXCEP      0x01
105
 
106
#define SCHN_STAT_PCI            0x80
107
#define SCHN_STAT_INCORR_LEN     0x40
108
#define SCHN_STAT_PROG_CHECK     0x20
109
#define SCHN_STAT_PROT_CHECK     0x10
110
#define SCHN_STAT_CHN_DATA_CHK   0x08
111
#define SCHN_STAT_CHN_CTRL_CHK   0x04
112
#define SCHN_STAT_INTF_CTRL_CHK  0x02
113
#define SCHN_STAT_CHAIN_CHECK    0x01
114
 
115
/*
116
 * architectured values for first sense byte
117
 */
118
#define SNS0_CMD_REJECT         0x80
119
#define SNS_CMD_REJECT          SNS0_CMD_REJECT
120
#define SNS0_INTERVENTION_REQ   0x40
121
#define SNS0_BUS_OUT_CHECK      0x20
122
#define SNS0_EQUIPMENT_CHECK    0x10
123
#define SNS0_DATA_CHECK         0x08
124
#define SNS0_OVERRUN            0x04
125
/*                              0x02 reserved */
126
#define SNS0_INCOMPL_DOMAIN     0x01
127
 
128
/*
129
 * architectured values for second sense byte
130
 */
131
#define SNS1_PERM_ERR           0x80
132
#define SNS1_INV_TRACK_FORMAT   0x40
133
#define SNS1_EOC                0x20
134
#define SNS1_MESSAGE_TO_OPER    0x10
135
#define SNS1_NO_REC_FOUND       0x08
136
#define SNS1_FILE_PROTECTED     0x04
137
#define SNS1_WRITE_INHIBITED    0x02
138
#define SNS1_INPRECISE_END      0x01
139
 
140
/*
141
 * architectured values for third sense byte
142
 */
143
#define SNS2_REQ_INH_WRITE      0x80
144
#define SNS2_CORRECTABLE        0x40
145
#define SNS2_FIRST_LOG_ERR      0x20
146
#define SNS2_ENV_DATA_PRESENT   0x10
147
/*                              0x08 reserved */
148
#define SNS2_INPRECISE_END      0x04
149
/*                              0x02 reserved */
150
/*                              0x01 reserved */
151
 
152
#ifdef __KERNEL__
153
/*
154
 * subchannel information block
155
 */
156
typedef struct {
157
      pmcw_t pmcw;             /* path management control word */
158
      scsw_t scsw;             /* subchannel status word */
159
      __u8 mda[12];            /* model dependent area */
160
   } __attribute__ ((packed,aligned(4))) schib_t;
161
#endif /* __KERNEL__ */
162
 
163
typedef struct {
164
      __u8  cmd_code;/* command code */
165
      __u8  flags;   /* flags, like IDA adressing, etc. */
166
      __u16 count;   /* byte count */
167
      __u32 cda;     /* data address */
168
   } __attribute__ ((packed,aligned(8))) ccw1_t;
169
 
170
#define CCW_FLAG_DC             0x80
171
#define CCW_FLAG_CC             0x40
172
#define CCW_FLAG_SLI            0x20
173
#define CCW_FLAG_SKIP           0x10
174
#define CCW_FLAG_PCI            0x08
175
#define CCW_FLAG_IDA            0x04
176
#define CCW_FLAG_SUSPEND        0x02
177
 
178
#define CCW_CMD_READ_IPL        0x02
179
#define CCW_CMD_NOOP            0x03
180
#define CCW_CMD_BASIC_SENSE     0x04
181
#define CCW_CMD_TIC             0x08
182
#define CCW_CMD_SENSE_PGID      0x34
183
#define CCW_CMD_SUSPEND_RECONN  0x5B
184
#define CCW_CMD_RDC             0x64
185
#define CCW_CMD_SET_PGID        0xAF
186
#define CCW_CMD_SENSE_ID        0xE4
187
#define CCW_CMD_DCTL            0xF3
188
 
189
#ifdef __KERNEL__
190
#define SENSE_MAX_COUNT         0x20
191
 
192
/*
193
 * architectured values for first sense byte
194
 */
195
#define SNS0_CMD_REJECT         0x80
196
#define SNS_CMD_REJECT          SNS0_CMD_REJECT
197
#define SNS0_INTERVENTION_REQ   0x40
198
#define SNS0_BUS_OUT_CHECK      0x20
199
#define SNS0_EQUIPMENT_CHECK    0x10
200
#define SNS0_DATA_CHECK         0x08
201
#define SNS0_OVERRUN            0x04
202
 
203
/*
204
 * operation request block
205
 */
206
typedef struct {
207
      __u32 intparm;  /* interruption parameter */
208
      __u32 key  : 4; /* flags, like key, suspend control, etc. */
209
      __u32 spnd : 1; /* suspend control */
210
      __u32 res1 : 1; /* reserved */
211
      __u32 mod  : 1; /* modification control */
212
      __u32 sync : 1; /* synchronize control */
213
      __u32 fmt  : 1; /* format control */
214
      __u32 pfch : 1; /* prefetch control */
215
      __u32 isic : 1; /* initial-status-interruption control */
216
      __u32 alcc : 1; /* address-limit-checking control */
217
      __u32 ssic : 1; /* suppress-suspended-interr. control */
218
      __u32 res2 : 1; /* reserved */
219
      __u32 c64  : 1; /* IDAW/QDIO 64 bit control  */
220
      __u32 i2k  : 1; /* IDAW 2/4kB block size control */
221
      __u32 lpm  : 8; /* logical path mask */
222
      __u32 ils  : 1; /* incorrect length */
223
      __u32 zero : 6; /* reserved zeros */
224
      __u32 orbx : 1; /* ORB extension control */
225
      __u32 cpa;      /* channel program address */
226
   }  __attribute__ ((packed,aligned(4))) orb_t;
227
 
228
#endif /* __KERNEL__ */
229
typedef struct {
230
      __u32 res0  : 4;  /* reserved */
231
      __u32 pvrf  : 1;  /* path-verification-required flag */
232
      __u32 cpt   : 1;  /* channel-path timeout */
233
      __u32 fsavf : 1;  /* Failing storage address validity flag */
234
      __u32 cons  : 1;  /* concurrent-sense */
235
      __u32 res8  : 2;  /* reserved */
236
      __u32 scnt  : 6;  /* sense count if cons == 1 */
237
      __u32 res16 : 16; /* reserved */
238
   } __attribute__ ((packed)) erw_t;
239
 
240
/*
241
 * subchannel logout area
242
 */
243
typedef struct {
244
      __u32 res0  : 1;  /* reserved */
245
      __u32 esf   : 7;  /* extended status flags */
246
      __u32 lpum  : 8;  /* last path used mask */
247
      __u32 res16 : 1;  /* reserved */
248
      __u32 fvf   : 5;  /* field-validity flags */
249
      __u32 sacc  : 2;  /* storage access code */
250
      __u32 termc : 2;  /* termination code */
251
      __u32 devsc : 1;  /* device-status check */
252
      __u32 serr  : 1;  /* secondary error */
253
      __u32 ioerr : 1;  /* i/o-error alert */
254
      __u32 seqc  : 3;  /* sequence code */
255
   } __attribute__ ((packed)) sublog_t ;
256
 
257
/*
258
 * Format 0 Extended Status Word (ESW)
259
 */
260
typedef struct {
261
      sublog_t sublog;    /* subchannel logout */
262
      erw_t    erw;       /* extended report word */
263
      __u32    faddr;     /* failing address */
264
      __u32    zeros[2];  /* 2 fullwords of zeros */
265
   } __attribute__ ((packed)) esw0_t;
266
 
267
/*
268
 * Format 1 Extended Status Word (ESW)
269
 */
270
typedef struct {
271
      __u8  zero0;    /* reserved zeros */
272
      __u8  lpum;     /* last path used mask */
273
      __u16 zero16;   /* reserved zeros */
274
      erw_t erw;      /* extended report word */
275
      __u32 zeros[3]; /* 2 fullwords of zeros */
276
   } __attribute__ ((packed)) esw1_t;
277
 
278
/*
279
 * Format 2 Extended Status Word (ESW)
280
 */
281
typedef struct {
282
      __u8  zero0;    /* reserved zeros */
283
      __u8  lpum;     /* last path used mask */
284
      __u16 dcti;     /* device-connect-time interval */
285
      erw_t erw;      /* extended report word */
286
      __u32 zeros[3]; /* 2 fullwords of zeros */
287
   } __attribute__ ((packed)) esw2_t;
288
 
289
/*
290
 * Format 3 Extended Status Word (ESW)
291
 */
292
typedef struct {
293
      __u8  zero0;    /* reserved zeros */
294
      __u8  lpum;     /* last path used mask */
295
      __u16 res;      /* reserved */
296
      erw_t erw;      /* extended report word */
297
      __u32 zeros[3]; /* 2 fullwords of zeros */
298
   } __attribute__ ((packed)) esw3_t;
299
 
300
typedef union {
301
      esw0_t esw0;
302
      esw1_t esw1;
303
      esw2_t esw2;
304
      esw3_t esw3;
305
   } __attribute__ ((packed)) esw_t;
306
 
307
/*
308
 * interruption response block
309
 */
310
typedef struct {
311
      scsw_t scsw;             /* subchannel status word */
312
      esw_t  esw;              /* extended status word */
313
      __u8   ecw[32];          /* extended control word */
314
   } __attribute__ ((packed,aligned(4))) irb_t;
315
#ifdef __KERNEL__
316
 
317
/*
318
 * TPI info structure
319
 */
320
typedef struct {
321
        __u32 reserved1  : 16;   /* reserved 0x00000001 */
322
        __u32 irq        : 16;   /* aka. subchannel number */
323
        __u32 intparm;           /* interruption parameter */
324
        __u32 adapter_IO : 1;
325
        __u32 reserved2  : 1;
326
        __u32 isc        : 3;
327
        __u32 reserved3  : 12;
328
        __u32 int_type   : 3;
329
        __u32 reserved4  : 12;
330
   } __attribute__ ((packed)) tpi_info_t;
331
 
332
 
333
//
334
// command information word  (CIW) layout
335
//
336
typedef struct _ciw {
337
   __u32        et       :  2; // entry type
338
   __u32        reserved :  2; // reserved
339
   __u32        ct       :  4; // command type
340
   __u32        cmd      :  8; // command
341
   __u32        count    : 16; // count
342
   } __attribute__ ((packed)) ciw_t;
343
 
344
#define CIW_TYPE_RCD    0x0    // read configuration data
345
#define CIW_TYPE_SII    0x1    // set interface identifier
346
#define CIW_TYPE_RNI    0x2    // read node identifier
347
 
348
#define MAX_CIWS 8
349
//
350
// sense-id response buffer layout
351
//
352
typedef struct {
353
  /* common part */
354
      __u8           reserved;     /* always 0x'FF' */
355
      __u16          cu_type;      /* control unit type */
356
      __u8           cu_model;     /* control unit model */
357
      __u16          dev_type;     /* device type */
358
      __u8           dev_model;    /* device model */
359
      __u8           unused;       /* padding byte */
360
  /* extended part */
361
      ciw_t    ciw[MAX_CIWS];      /* variable # of CIWs */
362
   }  __attribute__ ((packed,aligned(4))) senseid_t;
363
/*
364
 * where we put the ssd info
365
 */
366
typedef struct _ssd_info {
367
        __u8   valid:1;
368
        __u8   type:7;          /* subchannel type */
369
        __u8   chpid[8];        /* chpids */
370
        __u16  fla[8];          /* full link addresses */
371
} __attribute__ ((packed)) ssd_info_t;
372
 
373
/*
374
 * area for store event information
375
 */
376
typedef struct chsc_area_t {
377
        struct {
378
                /* word 0 */
379
                __u16 command_code1;
380
                __u16 command_code2;
381
                union {
382
                        struct {
383
                                /* word 1 */
384
                                __u32 reserved1;
385
                                /* word 2 */
386
                                __u32 reserved2;
387
                        } __attribute__ ((packed,aligned(8))) sei_req;
388
                        struct {
389
                                /* word 1 */
390
                                __u16 reserved1;
391
                                __u16 f_sch;     /* first subchannel */
392
                                /* word 2 */
393
                                __u16 reserved2;
394
                                __u16 l_sch;    /* last subchannel */
395
                        } __attribute__ ((packed,aligned(8))) ssd_req;
396
                } request_block_data;
397
                /* word 3 */
398
                __u32 reserved3;
399
        } __attribute__ ((packed,aligned(8))) request_block;
400
        struct {
401
                /* word 0 */
402
                __u16 length;
403
                __u16 response_code;
404
                /* word 1 */
405
                __u32 reserved1;
406
                union {
407
                        struct {
408
                                /* word 2 */
409
                                __u8  flags;
410
                                __u8  vf;         /* validity flags */
411
                                __u8  rs;         /* reporting source */
412
                                __u8  cc;         /* content code */
413
                                /* word 3 */
414
                                __u16 fla;        /* full link address */
415
                                __u16 rsid;       /* reporting source id */
416
                                /* word 4 */
417
                                __u32 reserved2;
418
                                /* word 5 */
419
                                __u32 reserved3;
420
                                /* word 6-102 */
421
                                __u32 ccdf[96];   /* content-code dependent field */
422
                        } __attribute__ ((packed,aligned(8))) sei_res;
423
                        struct {
424
                                /* word 2 */
425
                                __u8 sch_valid : 1;
426
                                __u8 dev_valid : 1;
427
                                __u8 st        : 3; /* subchannel type */
428
                                __u8 zeroes    : 3;
429
                                __u8  unit_addr;  /* unit address */
430
                                __u16 devno;      /* device number */
431
                                /* word 3 */
432
                                __u8 path_mask;
433
                                __u8 fla_valid_mask;
434
                                __u16 sch;        /* subchannel */
435
                                /* words 4-5 */
436
                                __u8 chpid[8];    /* chpids 0-7 */
437
                                /* words 6-9 */
438
                                __u16 fla[8];     /* full link addresses 0-7 */
439
                                /* words 10-102 */
440
                                __u32 padding[92];
441
                        } __attribute__ ((packed,aligned(8))) ssd_res;
442
                } response_block_data;
443
        } __attribute__ ((packed,aligned(8))) response_block;
444
} __attribute__ ((packed,aligned(PAGE_SIZE))) chsc_area_t;
445
 
446
#endif /* __KERNEL__ */
447
/*
448
 * sense data
449
 */
450
typedef struct {
451
      __u8          res[32];   /* reserved   */
452
      __u8          data[32];  /* sense data */
453
   } __attribute__ ((packed)) sense_t;
454
 
455
/*
456
 * device status area, to be provided by the device driver
457
 *  when calling request_irq() as parameter "dev_id", later
458
 *  tied to the "action" control block.
459
 *
460
 * Note : No data area must be added after union ii or the
461
 *         effective devstat size calculation will fail !
462
 */
463
typedef struct {
464
     __u16         devno;    /* device number, aka. "cuu" from irb */
465
     unsigned long intparm;  /* interrupt parameter */
466
     __u8          cstat;    /* channel status - accumulated */
467
     __u8          dstat;    /* device status - accumulated */
468
     __u8          lpum;     /* last path used mask from irb */
469
     __u8          unused;   /* not used - reserved */
470
     unsigned int  flag;     /* flag : see below */
471
     __u32         cpa;      /* CCW address from irb at primary status */
472
     __u32         rescnt;   /* res. count from irb at primary status */
473
     __u32         scnt;     /* sense count, if DEVSTAT_FLAG_SENSE_AVAIL */
474
     union {
475
        irb_t   irb;         /* interruption response block */
476
        sense_t sense;       /* sense information */
477
        } ii;                /* interrupt information */
478
  } devstat_t;
479
 
480
#define DEVSTAT_FLAG_SENSE_AVAIL   0x00000001
481
#define DEVSTAT_NOT_OPER           0x00000002
482
#define DEVSTAT_START_FUNCTION     0x00000004
483
#define DEVSTAT_HALT_FUNCTION      0x00000008
484
#define DEVSTAT_STATUS_PENDING     0x00000010
485
#define DEVSTAT_REVALIDATE         0x00000020
486
#define DEVSTAT_DEVICE_GONE        0x00000040
487
#define DEVSTAT_DEVICE_OWNED       0x00000080
488
#define DEVSTAT_CLEAR_FUNCTION     0x00000100
489
#define DEVSTAT_PCI                0x00000200
490
#define DEVSTAT_SUSPENDED          0x00000400
491
#define DEVSTAT_UNKNOWN_DEV        0x00000800
492
#define DEVSTAT_UNFRIENDLY_DEV     0x00001000
493
#define DEVSTAT_NOT_ACC            0x00002000
494
#define DEVSTAT_NOT_ACC_ERR        0x00004000
495
#define DEVSTAT_FINAL_STATUS       0x80000000
496
 
497
#define DEVINFO_NOT_OPER           DEVSTAT_NOT_OPER
498
#define DEVINFO_UNKNOWN_DEV        DEVSTAT_UNKNOWN_DEV
499
#define DEVINFO_DEVICE_OWNED       DEVSTAT_DEVICE_OWNED
500
#define DEVINFO_QDIO_CAPABLE       0x40000000
501
#define DEVINFO_UNFRIENDLY_DEV     DEVSTAT_UNFRIENDLY_DEV
502
 
503
#define INTPARM_STATUS_PENDING     0xFFFFFFFF
504
#ifdef __KERNEL__
505
 
506
#define IO_INTERRUPT_TYPE          0 /* I/O interrupt type */
507
 
508
typedef  void (* io_handler_func1_t) ( int             irq,
509
                                       devstat_t      *devstat,
510
                                       struct pt_regs *rgs);
511
 
512
typedef  void (* io_handler_func_t) ( int             irq,
513
                                      void           *devstat,
514
                                      struct pt_regs *rgs);
515
 
516
typedef  void ( * not_oper_handler_func_t)( int irq,
517
                                            int status );
518
 
519
typedef  int  (* adapter_int_handler_t)( __u32 intparm );
520
 
521
typedef struct {
522
        io_handler_func_t         handler;  /* interrupt handler routine */
523
        const char               *name;     /* device name */
524
        devstat_t                *dev_id;   /* device status block */
525
   } irq_desc_t;
526
 
527
typedef struct {
528
        __u8  state1    :  2;   /* path state value 1 */
529
        __u8  state2    :  2;   /* path state value 2 */
530
        __u8  state3    :  1;   /* path state value 3 */
531
        __u8  resvd     :  3;   /* reserved */
532
        } __attribute__ ((packed)) path_state_t;
533
 
534
typedef struct {
535
   union {
536
                __u8         fc;   /* SPID function code */
537
                path_state_t ps;   /* SNID path state */
538
        } inf;
539
        __u32 cpu_addr  : 16;   /* CPU address */
540
        __u32 cpu_id    : 24;   /* CPU identification */
541
        __u32 cpu_model : 16;   /* CPU model */
542
        __u32 tod_high;         /* high word TOD clock */
543
        } __attribute__ ((packed)) pgid_t;
544
 
545
#define SPID_FUNC_SINGLE_PATH      0x00
546
#define SPID_FUNC_MULTI_PATH       0x80
547
#define SPID_FUNC_ESTABLISH        0x00
548
#define SPID_FUNC_RESIGN           0x40
549
#define SPID_FUNC_DISBAND          0x20
550
 
551
#define SNID_STATE1_RESET          0
552
#define SNID_STATE1_UNGROUPED      2
553
#define SNID_STATE1_GROUPED        3
554
 
555
#define SNID_STATE2_NOT_RESVD      0
556
#define SNID_STATE2_RESVD_ELSE     2
557
#define SNID_STATE2_RESVD_SELF     3
558
 
559
#define SNID_STATE3_MULTI_PATH     1
560
#define SNID_STATE3_SINGLE_PATH    0
561
 
562
/*
563
 * Flags used as input parameters for do_IO()
564
 */
565
#define DOIO_EARLY_NOTIFICATION  0x0001 /* allow for I/O completion ... */
566
                                        /* ... notification after ... */
567
                                        /* ... primary interrupt status */
568
#define DOIO_RETURN_CHAN_END     DOIO_EARLY_NOTIFICATION
569
#define DOIO_VALID_LPM           0x0002 /* LPM input parameter is valid */
570
#define DOIO_WAIT_FOR_INTERRUPT  0x0004 /* wait synchronously for interrupt */
571
#define DOIO_REPORT_ALL          0x0008 /* report all interrupt conditions */
572
#define DOIO_ALLOW_SUSPEND       0x0010 /* allow for channel prog. suspend */
573
#define DOIO_DENY_PREFETCH       0x0020 /* don't allow for CCW prefetch */
574
#define DOIO_SUPPRESS_INTER      0x0040 /* suppress intermediate inter. */
575
                                        /* ... for suspended CCWs */
576
#define DOIO_TIMEOUT             0x0080 /* 3 secs. timeout for sync. I/O */
577
#define DOIO_DONT_CALL_INTHDLR   0x0100 /* don't call interrupt handler */
578
#define DOIO_USE_DIAG98          0x0400 /* use DIAG98 instead of SSCH */
579
 
580
/*
581
 * do_IO()
582
 *
583
 *  Start a S/390 channel program. When the interrupt arrives, the
584
 *  IRQ handler is called, either immediately, delayed (dev-end missing,
585
 *  or sense required) or never (no IRQ handler registered -
586
 *  should never occur, as the IRQ (subchannel ID) should be
587
 *  disabled if no handler is present. Depending on the action
588
 *  taken, do_IO() returns :  0      - Success
589
 *                           -EIO    - Status pending
590
 *                                        see : action->dev_id->cstat
591
 *                                              action->dev_id->dstat
592
 *                           -EBUSY  - Device busy
593
 *                           -ENODEV - Device not operational
594
 */
595
int do_IO( int            irq,          /* IRQ aka. subchannel number */
596
           ccw1_t        *cpa,          /* logical channel program address */
597
           unsigned long  intparm,      /* interruption parameter */
598
           __u8           lpm,          /* logical path mask */
599
           unsigned long  flag);        /* flags : see above */
600
 
601
int start_IO( int           irq,       /* IRQ aka. subchannel number */
602
              ccw1_t       *cpa,       /* logical channel program address */
603
              unsigned long  intparm,   /* interruption parameter */
604
              __u8          lpm,       /* logical path mask */
605
              unsigned int  flag);     /* flags : see above */
606
 
607
void do_crw_pending( void  );            /* CRW handler */
608
 
609
int resume_IO( int irq);               /* IRQ aka. subchannel number */
610
 
611
int halt_IO( int           irq,         /* IRQ aka. subchannel number */
612
             unsigned long intparm,     /* dummy intparm */
613
             unsigned long flag);       /* possible DOIO_WAIT_FOR_INTERRUPT */
614
 
615
int clear_IO( int           irq,         /* IRQ aka. subchannel number */
616
              unsigned long intparm,     /* dummy intparm */
617
              unsigned long flag);       /* possible DOIO_WAIT_FOR_INTERRUPT */
618
 
619
int process_IRQ( struct pt_regs regs,
620
                 unsigned int   irq,
621
                 unsigned int   intparm);
622
 
623
 
624
int enable_cpu_sync_isc ( int irq );
625
int disable_cpu_sync_isc( int irq );
626
 
627
typedef struct {
628
     int          irq;                  /* irq, aka. subchannel */
629
     __u16        devno;                /* device number */
630
     unsigned int status;               /* device status */
631
     senseid_t    sid_data;             /* senseID data */
632
     } s390_dev_info_t;
633
 
634
int get_dev_info( int irq, s390_dev_info_t *);   /* to be eliminated - don't use */
635
 
636
int get_dev_info_by_irq  ( int irq, s390_dev_info_t *pdi);
637
int get_dev_info_by_devno( __u16 devno, s390_dev_info_t *pdi);
638
 
639
int          get_irq_by_devno( __u16 devno );
640
unsigned int get_devno_by_irq( int irq );
641
 
642
int get_irq_first( void );
643
int get_irq_next ( int irq );
644
 
645
int read_dev_chars( int irq, void **buffer, int length );
646
int read_conf_data( int irq, void **buffer, int *length, __u8 lpm );
647
 
648
int  s390_DevicePathVerification( int irq, __u8 domask );
649
 
650
int s390_trigger_resense(int irq);
651
 
652
int s390_request_irq_special( int                      irq,
653
                              io_handler_func_t        io_handler,
654
                              not_oper_handler_func_t  not_oper_handler,
655
                              unsigned long            irqflags,
656
                              const char              *devname,
657
                              void                    *dev_id);
658
 
659
extern int set_cons_dev(int irq);
660
extern int wait_cons_dev(int irq);
661
extern schib_t *s390_get_schib( int irq );
662
 
663
extern int s390_register_adapter_interrupt(adapter_int_handler_t handler);
664
extern int s390_unregister_adapter_interrupt(adapter_int_handler_t handler);
665
 
666
/*
667
 * Some S390 specific IO instructions as inline
668
 */
669
 
670
extern __inline__ int stsch(int irq, volatile schib_t *addr)
671
{
672
        int ccode;
673
 
674
        __asm__ __volatile__(
675
                "   lr    1,%1\n"
676
                "   stsch 0(%2)\n"
677
                "   ipm   %0\n"
678
                "   srl   %0,28"
679
                : "=d" (ccode)
680
                : "d" (irq | 0x10000), "a" (addr)
681
                : "cc", "1" );
682
        return ccode;
683
}
684
 
685
extern __inline__ int msch(int irq, volatile schib_t *addr)
686
{
687
        int ccode;
688
 
689
        __asm__ __volatile__(
690
                "   lr    1,%1\n"
691
                "   msch  0(%2)\n"
692
                "   ipm   %0\n"
693
                "   srl   %0,28"
694
                : "=d" (ccode)
695
                : "d" (irq | 0x10000L), "a" (addr)
696
                : "cc", "1" );
697
        return ccode;
698
}
699
 
700
extern __inline__ int msch_err(int irq, volatile schib_t *addr)
701
{
702
        int ccode;
703
 
704
        __asm__ __volatile__(
705
                "    lr   1,%1\n"
706
                "    msch 0(%2)\n"
707
                "0:  ipm  %0\n"
708
                "    srl  %0,28\n"
709
                "1:\n"
710
#ifdef CONFIG_ARCH_S390X
711
                ".section .fixup,\"ax\"\n"
712
                "2:  l    %0,%3\n"
713
                "    jg   1b\n"
714
                ".previous\n"
715
                ".section __ex_table,\"a\"\n"
716
                "   .align 8\n"
717
                "   .quad 0b,2b\n"
718
                ".previous"
719
#else
720
                ".section .fixup,\"ax\"\n"
721
                "2:  l    %0,%3\n"
722
                "    bras 1,3f\n"
723
                "    .long 1b\n"
724
                "3:  l    1,0(1)\n"
725
                "    br   1\n"
726
                ".previous\n"
727
                ".section __ex_table,\"a\"\n"
728
                "   .align 4\n"
729
                "   .long 0b,2b\n"
730
                ".previous"
731
#endif
732
                : "=d" (ccode)
733
                : "d" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC)
734
                : "cc", "1" );
735
        return ccode;
736
}
737
 
738
extern __inline__ int tsch(int irq, volatile irb_t *addr)
739
{
740
        int ccode;
741
 
742
        __asm__ __volatile__(
743
                "   lr    1,%1\n"
744
                "   tsch  0(%2)\n"
745
                "   ipm   %0\n"
746
                "   srl   %0,28"
747
                : "=d" (ccode)
748
                : "d" (irq | 0x10000L), "a" (addr)
749
                : "cc", "1" );
750
        return ccode;
751
}
752
 
753
extern __inline__ int tpi( volatile tpi_info_t *addr)
754
{
755
        int ccode;
756
 
757
        __asm__ __volatile__(
758
                "   tpi   0(%1)\n"
759
                "   ipm   %0\n"
760
                "   srl   %0,28"
761
                : "=d" (ccode)
762
                : "a" (addr)
763
                : "cc", "1" );
764
        return ccode;
765
}
766
 
767
extern __inline__ int ssch(int irq, volatile orb_t *addr)
768
{
769
        int ccode;
770
 
771
        __asm__ __volatile__(
772
                "   lr    1,%1\n"
773
                "   ssch  0(%2)\n"
774
                "   ipm   %0\n"
775
                "   srl   %0,28"
776
                : "=d" (ccode)
777
                : "d" (irq | 0x10000L), "a" (addr)
778
                : "cc", "1" );
779
        return ccode;
780
}
781
 
782
extern __inline__ int diag98(int irq, volatile orb_t *addr)
783
{
784
        int ccode;
785
 
786
        __asm__ __volatile__(
787
                "   lr    1,%1\n"
788
                "   lr    0,%2\n"    /* orb in 0 */
789
                "   lhi   2,12\n"    /* function code 0x0c */
790
                "   diag  2,0,152\n" /* diag98 instead of ssch,
791
                                        result in gpr 1 */
792
                "   ipm   %0\n"      /* usual cc evaluation. cc=3 will be
793
                                        reported as not operational */
794
                "   srl   %0,28"
795
                : "=d" (ccode)
796
                : "d" (irq | 0x10000L), "a" (addr)
797
                : "cc", "0", "1", "2");
798
        return ccode;
799
}
800
 
801
extern __inline__ int rsch(int irq)
802
{
803
        int ccode;
804
 
805
        __asm__ __volatile__(
806
                "   lr    1,%1\n"
807
                "   rsch\n"
808
                "   ipm   %0\n"
809
                "   srl   %0,28"
810
                : "=d" (ccode)
811
                : "d" (irq | 0x10000L)
812
                : "cc", "1" );
813
        return ccode;
814
}
815
 
816
extern __inline__ int csch(int irq)
817
{
818
        int ccode;
819
 
820
        __asm__ __volatile__(
821
                "   lr    1,%1\n"
822
                "   csch\n"
823
                "   ipm   %0\n"
824
                "   srl   %0,28"
825
                : "=d" (ccode)
826
                : "d" (irq | 0x10000L)
827
                : "cc", "1" );
828
        return ccode;
829
}
830
 
831
extern __inline__ int hsch(int irq)
832
{
833
        int ccode;
834
 
835
        __asm__ __volatile__(
836
                "   lr    1,%1\n"
837
                "   hsch\n"
838
                "   ipm   %0\n"
839
                "   srl   %0,28"
840
                : "=d" (ccode)
841
                : "d" (irq | 0x10000L)
842
                : "cc", "1" );
843
        return ccode;
844
}
845
 
846
extern __inline__ int xsch(int irq)
847
{
848
        int ccode;
849
 
850
        __asm__ __volatile__(
851
                "   lr    1,%1\n"
852
                "   .insn rre,0xb2760000,%1,0\n"
853
                "   ipm   %0\n"
854
                "   srl   %0,28"
855
                : "=d" (ccode)
856
                : "d" (irq | 0x10000L)
857
                : "cc", "1" );
858
        return ccode;
859
}
860
 
861
extern __inline__ int iac( void)
862
{
863
        int ccode;
864
 
865
        __asm__ __volatile__(
866
                "   iac   1\n"
867
                "   ipm   %0\n"
868
                "   srl   %0,28"
869
                : "=d" (ccode) : : "cc", "1" );
870
        return ccode;
871
}
872
 
873
extern __inline__ int rchp(int chpid)
874
{
875
        int ccode;
876
 
877
        __asm__ __volatile__(
878
                "   lr    1,%1\n"
879
                "   rchp\n"
880
                "   ipm   %0\n"
881
                "   srl   %0,28"
882
                : "=d" (ccode)
883
                : "d" (chpid)
884
                : "cc", "1" );
885
        return ccode;
886
}
887
 
888
typedef struct {
889
     __u16 vrdcdvno : 16;   /* device number (input) */
890
     __u16 vrdclen  : 16;   /* data block length (input) */
891
     __u32 vrdcvcla : 8;    /* virtual device class (output) */
892
     __u32 vrdcvtyp : 8;    /* virtual device type (output) */
893
     __u32 vrdcvsta : 8;    /* virtual device status (output) */
894
     __u32 vrdcvfla : 8;    /* virtual device flags (output) */
895
     __u32 vrdcrccl : 8;    /* real device class (output) */
896
     __u32 vrdccrty : 8;    /* real device type (output) */
897
     __u32 vrdccrmd : 8;    /* real device model (output) */
898
     __u32 vrdccrft : 8;    /* real device feature (output) */
899
     } __attribute__ ((packed,aligned(4))) diag210_t;
900
 
901
void VM_virtual_device_info( __u16      devno,   /* device number */
902
                             senseid_t *ps );    /* ptr to senseID data */
903
 
904
extern int diag210( diag210_t * addr);
905
 
906
extern __inline__ int chsc( chsc_area_t * chsc_area)
907
{
908
        int cc;
909
 
910
        __asm__ __volatile__ (
911
                ".insn  rre,0xb25f0000,%1,0     \n\t"
912
                "ipm    %0      \n\t"
913
                "srl    %0,28   \n\t"
914
                : "=d" (cc)
915
                : "d" (chsc_area)
916
                : "cc" );
917
 
918
        return cc;
919
}
920
 
921
/*
922
 * Various low-level irq details needed by irq.c, process.c,
923
 * time.c, io_apic.c and smp.c
924
 *
925
 * Interrupt entry/exit code at both C and assembly level
926
 */
927
 
928
void mask_irq(unsigned int irq);
929
void unmask_irq(unsigned int irq);
930
 
931
#define MAX_IRQ_SOURCES 128
932
 
933
extern spinlock_t irq_controller_lock;
934
 
935
#ifdef CONFIG_SMP
936
 
937
#include <asm/atomic.h>
938
 
939
static inline void irq_enter(int cpu, unsigned int irq)
940
{
941
        hardirq_enter(cpu);
942
        while (atomic_read(&global_irq_lock) != 0) {
943
                eieio();
944
        }
945
}
946
 
947
static inline void irq_exit(int cpu, unsigned int irq)
948
{
949
        hardirq_exit(cpu);
950
        release_irqlock(cpu);
951
}
952
 
953
 
954
#else
955
 
956
#define irq_enter(cpu, irq)     (++local_irq_count(cpu))
957
#define irq_exit(cpu, irq)      (--local_irq_count(cpu))
958
 
959
#endif
960
 
961
#define __STR(x) #x
962
#define STR(x) __STR(x)
963
 
964
#ifdef CONFIG_SMP
965
 
966
/*
967
 *      SMP has a few special interrupts for IPI messages
968
 */
969
 
970
#endif /* CONFIG_SMP */
971
 
972
/*
973
 * x86 profiling function, SMP safe. We might want to do this in
974
 * assembly totally?
975
 */
976
extern char _stext;
977
static inline void s390_do_profile (unsigned long addr)
978
{
979
        if (prof_buffer && current->pid) {
980
#ifndef CONFIG_ARCH_S390X
981
                addr &= 0x7fffffff;
982
#endif
983
                addr -= (unsigned long) &_stext;
984
                addr >>= prof_shift;
985
                /*
986
                 * Don't ignore out-of-bounds EIP values silently,
987
                 * put them into the last histogram slot, so if
988
                 * present, they will show up as a sharp peak.
989
                 */
990
                if (addr > prof_len-1)
991
                        addr = prof_len-1;
992
                atomic_inc((atomic_t *)&prof_buffer[addr]);
993
        }
994
}
995
 
996
#include <asm/s390io.h>
997
 
998
#define get_irq_lock(irq) &ioinfo[irq]->irq_lock
999
 
1000
#define s390irq_spin_lock(irq) \
1001
        spin_lock(&(ioinfo[irq]->irq_lock))
1002
 
1003
#define s390irq_spin_unlock(irq) \
1004
        spin_unlock(&(ioinfo[irq]->irq_lock))
1005
 
1006
#define s390irq_spin_lock_irqsave(irq,flags) \
1007
        spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags)
1008
#define s390irq_spin_unlock_irqrestore(irq,flags) \
1009
        spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags)
1010
 
1011
#define touch_nmi_watchdog() do { } while(0)
1012
 
1013
#endif /* __KERNEL__ */
1014
#endif
1015
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.