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phoenix |
/*
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* include/asm-s390/lowcore.h
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*
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* S390 version
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* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Hartmut Penner (hp@de.ibm.com),
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* Martin Schwidefsky (schwidefsky@de.ibm.com),
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* Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
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*/
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#ifndef _ASM_S390_LOWCORE_H
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#define _ASM_S390_LOWCORE_H
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#define __LC_EXT_OLD_PSW 0x018
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#define __LC_SVC_OLD_PSW 0x020
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#define __LC_PGM_OLD_PSW 0x028
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#define __LC_MCK_OLD_PSW 0x030
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#define __LC_IO_OLD_PSW 0x038
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#define __LC_EXT_NEW_PSW 0x058
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#define __LC_SVC_NEW_PSW 0x060
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#define __LC_PGM_NEW_PSW 0x068
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#define __LC_MCK_NEW_PSW 0x070
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#define __LC_IO_NEW_PSW 0x078
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#define __LC_EXT_PARAMS 0x080
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#define __LC_CPU_ADDRESS 0x084
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#define __LC_EXT_INT_CODE 0x086
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#define __LC_SVC_INT_CODE 0x08B
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#define __LC_PGM_ILC 0x08C
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#define __LC_PGM_INT_CODE 0x08E
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#define __LC_TRANS_EXC_ADDR 0x090
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#define __LC_SUBCHANNEL_ID 0x0B8
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#define __LC_SUBCHANNEL_NR 0x0BA
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#define __LC_IO_INT_PARM 0x0BC
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#define __LC_IO_INT_WORD 0x0C0
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#define __LC_MCCK_CODE 0x0E8
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#define __LC_AREGS_SAVE_AREA 0x120
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#define __LC_CREGS_SAVE_AREA 0x1C0
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#define __LC_RETURN_PSW 0x200
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#define __LC_SYNC_IO_WORD 0x400
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#define __LC_SAVE_AREA 0xC00
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#define __LC_KERNEL_STACK 0xC40
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#define __LC_ASYNC_STACK 0xC44
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#define __LC_CPUID 0xC60
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#define __LC_CPUADDR 0xC68
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#define __LC_IPLDEV 0xC7C
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#define __LC_JIFFY_TIMER 0xC80
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#define __LC_PANIC_MAGIC 0xE00
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#define __LC_PFAULT_INTPARM 0x080
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/* interrupt handler start with all io, external and mcck interrupt disabled */
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#define _RESTART_PSW_MASK 0x00080000
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#define _EXT_PSW_MASK 0x04080000
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#define _PGM_PSW_MASK 0x04080000
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#define _SVC_PSW_MASK 0x04080000
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#define _MCCK_PSW_MASK 0x04080000
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#define _IO_PSW_MASK 0x04080000
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#define _USER_PSW_MASK 0x070DC000/* DAT, IO, EXT, Home-space */
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#define _WAIT_PSW_MASK 0x070E0000/* DAT, IO, EXT, Wait, Home-space */
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#define _DW_PSW_MASK 0x000A0000/* disabled wait PSW mask */
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#define _PRIMARY_MASK 0x0000 /* MASK for SACF */
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#define _SECONDARY_MASK 0x0100 /* MASK for SACF */
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#define _ACCESS_MASK 0x0200 /* MASK for SACF */
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#define _HOME_MASK 0x0300 /* MASK for SACF */
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#define _PSW_PRIM_SPACE_MODE 0x00000000
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#define _PSW_SEC_SPACE_MODE 0x00008000
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#define _PSW_ACC_REG_MODE 0x00004000
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#define _PSW_HOME_SPACE_MODE 0x0000C000
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#define _PSW_WAIT_MASK_BIT 0x00020000 /* Wait bit */
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#define _PSW_IO_MASK_BIT 0x02000000 /* IO bit */
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#define _PSW_IO_WAIT 0x02020000 /* IO & Wait bit */
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/* we run in 31 Bit mode */
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#define _ADDR_31 0x80000000
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <asm/processor.h>
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#include <linux/types.h>
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#include <asm/atomic.h>
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#include <asm/sigp.h>
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void restart_int_handler(void);
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void ext_int_handler(void);
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void system_call(void);
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void pgm_check_handler(void);
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void mcck_int_handler(void);
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void io_int_handler(void);
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struct _lowcore
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{
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/* prefix area: defined by architecture */
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psw_t restart_psw; /* 0x000 */
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__u32 ccw2[4]; /* 0x008 */
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psw_t external_old_psw; /* 0x018 */
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psw_t svc_old_psw; /* 0x020 */
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psw_t program_old_psw; /* 0x028 */
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psw_t mcck_old_psw; /* 0x030 */
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psw_t io_old_psw; /* 0x038 */
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__u8 pad1[0x58-0x40]; /* 0x040 */
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psw_t external_new_psw; /* 0x058 */
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psw_t svc_new_psw; /* 0x060 */
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psw_t program_new_psw; /* 0x068 */
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psw_t mcck_new_psw; /* 0x070 */
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psw_t io_new_psw; /* 0x078 */
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__u32 ext_params; /* 0x080 */
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__u16 cpu_addr; /* 0x084 */
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__u16 ext_int_code; /* 0x086 */
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__u16 svc_ilc; /* 0x088 */
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__u16 svc_code; /* 0x08a */
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__u16 pgm_ilc; /* 0x08c */
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__u16 pgm_code; /* 0x08e */
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__u32 trans_exc_code; /* 0x090 */
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__u16 mon_class_num; /* 0x094 */
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__u16 per_perc_atmid; /* 0x096 */
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__u32 per_address; /* 0x098 */
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__u32 monitor_code; /* 0x09c */
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__u8 exc_access_id; /* 0x0a0 */
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__u8 per_access_id; /* 0x0a1 */
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__u8 pad2[0xB8-0xA2]; /* 0x0a2 */
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__u16 subchannel_id; /* 0x0b8 */
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__u16 subchannel_nr; /* 0x0ba */
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__u32 io_int_parm; /* 0x0bc */
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__u32 io_int_word; /* 0x0c0 */
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__u8 pad3[0xD8-0xC4]; /* 0x0c4 */
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__u32 cpu_timer_save_area[2]; /* 0x0d8 */
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__u32 clock_comp_save_area[2]; /* 0x0e0 */
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__u32 mcck_interruption_code[2]; /* 0x0e8 */
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__u8 pad4[0xf4-0xf0]; /* 0x0f0 */
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__u32 external_damage_code; /* 0x0f4 */
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__u32 failing_storage_address; /* 0x0f8 */
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__u8 pad5[0x100-0xfc]; /* 0x0fc */
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__u32 st_status_fixed_logout[4];/* 0x100 */
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__u8 pad6[0x120-0x110]; /* 0x110 */
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__u32 access_regs_save_area[16];/* 0x120 */
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__u32 floating_pt_save_area[8]; /* 0x160 */
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__u32 gpregs_save_area[16]; /* 0x180 */
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__u32 cregs_save_area[16]; /* 0x240 */
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psw_t return_psw; /* 0x200 */
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__u8 pad8[0x400-0x208]; /* 0x208 */
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__u32 sync_io_word; /* 0x400 */
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__u8 pad9[0xc00-0x404]; /* 0x404 */
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/* System info area */
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__u32 save_area[16]; /* 0xc00 */
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__u32 kernel_stack; /* 0xc40 */
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__u32 async_stack; /* 0xc44 */
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/* entry.S sensitive area start */
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__u8 pad10[0xc60-0xc48]; /* 0xc5c */
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struct cpuinfo_S390 cpu_data; /* 0xc60 */
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__u32 ipl_device; /* 0xc7c */
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/* entry.S sensitive area end */
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/* SMP info area: defined by DJB */
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__u64 jiffy_timer; /* 0xc80 */
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atomic_t ext_call_fast; /* 0xc88 */
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__u8 pad11[0xe00-0xc8c]; /* 0xc8c */
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/* 0xe00 is used as indicator for dump tools */
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/* whether the kernel died with panic() or not */
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__u32 panic_magic; /* 0xe00 */
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/* Align to the top 1k of prefix area */
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__u8 pad12[0x1000-0xe04]; /* 0xe04 */
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} __attribute__((packed)); /* End structure*/
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extern __inline__ void set_prefix(__u32 address)
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{
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__asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
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}
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#define S390_lowcore (*((struct _lowcore *) 0))
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extern struct _lowcore *lowcore_ptr[];
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#ifndef CONFIG_SMP
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#define get_cpu_lowcore(cpu) (&S390_lowcore)
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#define safe_get_cpu_lowcore(cpu) (&S390_lowcore)
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#else
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#define get_cpu_lowcore(cpu) (lowcore_ptr[(cpu)])
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#define safe_get_cpu_lowcore(cpu) \
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((cpu) == smp_processor_id() ? &S390_lowcore : lowcore_ptr[(cpu)])
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#endif
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#endif /* __ASSEMBLY__ */
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#define __PANIC_MAGIC 0xDEADC0DE
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#endif
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