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1276 |
phoenix |
/*
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* include/asm-s390/system.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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*
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* Derived from "include/asm-i386/system.h"
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*/
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#ifndef __ASM_SYSTEM_H
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#define __ASM_SYSTEM_H
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#include <linux/config.h>
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#include <asm/types.h>
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#ifdef __KERNEL__
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#include <asm/lowcore.h>
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#endif
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#include <linux/kernel.h>
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#define prepare_to_switch() do { } while(0)
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#define switch_to(prev,next,last) do { \
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if (prev == next) \
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break; \
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save_fp_regs1(&prev->thread.fp_regs); \
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restore_fp_regs1(&next->thread.fp_regs); \
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last = resume(prev,next); \
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} while (0)
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struct task_struct;
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#define nop() __asm__ __volatile__ ("nop")
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#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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extern void __misaligned_u16(void);
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extern void __misaligned_u32(void);
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static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
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{
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switch (size) {
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case 1:
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asm volatile (
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" lhi 1,3\n"
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" nr 1,%0\n" /* isolate last 2 bits */
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" xr %0,1\n" /* align ptr */
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" bras 2,0f\n"
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" icm 1,8,3(%1)\n" /* for ptr&3 == 0 */
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" stcm 0,8,3(%1)\n"
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" icm 1,4,3(%1)\n" /* for ptr&3 == 1 */
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" stcm 0,4,3(%1)\n"
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" icm 1,2,3(%1)\n" /* for ptr&3 == 2 */
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" stcm 0,2,3(%1)\n"
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" icm 1,1,3(%1)\n" /* for ptr&3 == 3 */
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" stcm 0,1,3(%1)\n"
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"0: sll 1,3\n"
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" la 2,0(1,2)\n" /* r2 points to an icm */
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" l 0,0(%0)\n" /* get fullword */
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"1: lr 1,0\n" /* cs loop */
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" ex 0,0(2)\n" /* insert x */
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" cs 0,1,0(%0)\n"
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" jl 1b\n"
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" ex 0,4(2)" /* store *ptr to x */
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: "+a&" (ptr) : "a" (&x)
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: "memory", "cc", "0", "1", "2");
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break;
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case 2:
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if(((__u32)ptr)&1)
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__misaligned_u16();
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asm volatile (
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" lhi 1,2\n"
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" nr 1,%0\n" /* isolate bit 2^1 */
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" xr %0,1\n" /* align ptr */
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" bras 2,0f\n"
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" icm 1,12,2(%1)\n" /* for ptr&2 == 0 */
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" stcm 0,12,2(%1)\n"
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" icm 1,3,2(%1)\n" /* for ptr&2 == 1 */
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" stcm 0,3,2(%1)\n"
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"0: sll 1,2\n"
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" la 2,0(1,2)\n" /* r2 points to an icm */
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" l 0,0(%0)\n" /* get fullword */
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"1: lr 1,0\n" /* cs loop */
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" ex 0,0(2)\n" /* insert x */
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" cs 0,1,0(%0)\n"
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" jl 1b\n"
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" ex 0,4(2)" /* store *ptr to x */
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: "+a&" (ptr) : "a" (&x)
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: "memory", "cc", "0", "1", "2");
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break;
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case 4:
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if(((__u32)ptr)&3)
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__misaligned_u32();
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asm volatile (
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" l 0,0(%1)\n"
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"0: cs 0,%0,0(%1)\n"
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" jl 0b\n"
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" lr %0,0\n"
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: "+d&" (x) : "a" (ptr)
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: "memory", "cc", "0" );
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break;
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}
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return x;
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}
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/*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*
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* This is very similar to the ppc eieio/sync instruction in that is
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* does a checkpoint syncronisation & makes sure that
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* all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
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*/
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#define eieio() __asm__ __volatile__ ("BCR 15,0")
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# define SYNC_OTHER_CORES(x) eieio()
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#define mb() eieio()
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#define rmb() eieio()
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#define wmb() eieio()
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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/* interrupt control.. */
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#define __sti() ({ \
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__u8 dummy; \
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__asm__ __volatile__ ( \
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"stosm 0(%0),0x03" : : "a" (&dummy) : "memory"); \
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})
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#define __cli() ({ \
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__u32 flags; \
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__asm__ __volatile__ ( \
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"stnsm 0(%0),0xFC" : : "a" (&flags) : "memory"); \
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flags; \
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})
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#define __save_flags(x) \
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__asm__ __volatile__("stosm 0(%0),0" : : "a" (&x) : "memory")
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#define __restore_flags(x) \
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__asm__ __volatile__("ssm 0(%0)" : : "a" (&x) : "memory")
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#define __load_psw(psw) \
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__asm__ __volatile__("lpsw 0(%0)" : : "a" (&psw) : "cc" );
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#define __ctl_load(array, low, high) ({ \
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__asm__ __volatile__ ( \
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" la 1,%0\n" \
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" bras 2,0f\n" \
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" lctl 0,0,0(1)\n" \
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"0: ex %1,0(2)" \
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: : "m" (array), "a" (((low)<<4)+(high)) : "1", "2" ); \
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})
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#define __ctl_store(array, low, high) ({ \
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__asm__ __volatile__ ( \
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" la 1,%0\n" \
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" bras 2,0f\n" \
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" stctl 0,0,0(1)\n" \
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"0: ex %1,0(2)" \
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: "=m" (array) : "a" (((low)<<4)+(high)): "1", "2" ); \
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})
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#define __ctl_set_bit(cr, bit) ({ \
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__u8 dummy[16]; \
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__asm__ __volatile__ ( \
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" la 1,%0\n" /* align to 8 byte */ \
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" ahi 1,7\n" \
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" srl 1,3\n" \
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" sll 1,3\n" \
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" bras 2,0f\n" /* skip indirect insns */ \
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" stctl 0,0,0(1)\n" \
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" lctl 0,0,0(1)\n" \
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"0: ex %1,0(2)\n" /* execute stctl */ \
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" l 0,0(1)\n" \
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" or 0,%2\n" /* set the bit */ \
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" st 0,0(1)\n" \
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"1: ex %1,4(2)" /* execute lctl */ \
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: "=m" (dummy) : "a" (cr*17), "a" (1<<(bit)) \
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: "cc", "0", "1", "2"); \
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})
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#define __ctl_clear_bit(cr, bit) ({ \
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__u8 dummy[16]; \
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__asm__ __volatile__ ( \
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" la 1,%0\n" /* align to 8 byte */ \
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" ahi 1,7\n" \
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" srl 1,3\n" \
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" sll 1,3\n" \
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" bras 2,0f\n" /* skip indirect insns */ \
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" stctl 0,0,0(1)\n" \
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" lctl 0,0,0(1)\n" \
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"0: ex %1,0(2)\n" /* execute stctl */ \
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" l 0,0(1)\n" \
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" nr 0,%2\n" /* set the bit */ \
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" st 0,0(1)\n" \
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"1: ex %1,4(2)" /* execute lctl */ \
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: "=m" (dummy) : "a" (cr*17), "a" (~(1<<(bit))) \
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: "cc", "0", "1", "2"); \
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})
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#define __save_and_cli(x) do { __save_flags(x); __cli(); } while(0);
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#define __save_and_sti(x) do { __save_flags(x); __sti(); } while(0);
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/* For spinlocks etc */
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#define local_irq_save(x) ((x) = __cli())
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#define local_irq_set(x) __save_and_sti(x)
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#define local_irq_restore(x) __restore_flags(x)
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#define local_irq_disable() __cli()
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#define local_irq_enable() __sti()
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#ifdef CONFIG_SMP
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extern void __global_cli(void);
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extern void __global_sti(void);
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extern unsigned long __global_save_flags(void);
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extern void __global_restore_flags(unsigned long);
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#define cli() __global_cli()
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#define sti() __global_sti()
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#define save_flags(x) ((x)=__global_save_flags())
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#define restore_flags(x) __global_restore_flags(x)
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#define save_and_cli(x) do { save_flags(x); cli(); } while(0);
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#define save_and_sti(x) do { save_flags(x); sti(); } while(0);
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extern void smp_ctl_set_bit(int cr, int bit);
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extern void smp_ctl_clear_bit(int cr, int bit);
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#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
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#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
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#else
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#define cli() __cli()
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#define sti() __sti()
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#define save_flags(x) __save_flags(x)
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#define restore_flags(x) __restore_flags(x)
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#define save_and_cli(x) __save_and_cli(x)
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#define save_and_sti(x) __save_and_sti(x)
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#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
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#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
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#endif
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#ifdef __KERNEL__
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extern struct task_struct *resume(void *, void *);
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| 256 |
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extern int save_fp_regs1(s390_fp_regs *fpregs);
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extern void save_fp_regs(s390_fp_regs *fpregs);
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extern int restore_fp_regs1(s390_fp_regs *fpregs);
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extern void restore_fp_regs(s390_fp_regs *fpregs);
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extern void (*_machine_restart)(char *command);
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extern void (*_machine_halt)(void);
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extern void (*_machine_power_off)(void);
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#endif
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#endif
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