1 |
1275 |
phoenix |
#ifndef _ASM_IRQ_H
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#define _ASM_IRQ_H
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#include <linux/config.h>
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#ifdef __KERNEL__
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#include <asm/hardirq.h>
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/*
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* How many IRQ's for S390 ?!?
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*/
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#define __MAX_SUBCHANNELS 65536
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#define NR_IRQS __MAX_SUBCHANNELS
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#define NR_CHPIDS 256
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#define LPM_ANYPATH 0xff /* doesn't really belong here, Ingo? */
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#define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF ))
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/*
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* path management control word
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*/
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typedef struct {
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__u32 intparm; /* interruption parameter */
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__u32 qf : 1; /* qdio facility */
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__u32 res0 : 1; /* reserved zeros */
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__u32 isc : 3; /* interruption sublass */
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__u32 res5 : 3; /* reserved zeros */
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__u32 ena : 1; /* enabled */
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__u32 lm : 2; /* limit mode */
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__u32 mme : 2; /* measurement-mode enable */
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__u32 mp : 1; /* multipath mode */
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__u32 tf : 1; /* timing facility */
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__u32 dnv : 1; /* device number valid */
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__u32 dev : 16; /* device number */
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__u8 lpm; /* logical path mask */
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__u8 pnom; /* path not operational mask */
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__u8 lpum; /* last path used mask */
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__u8 pim; /* path installed mask */
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__u16 mbi; /* measurement-block index */
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__u8 pom; /* path operational mask */
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__u8 pam; /* path available mask */
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__u8 chpid[8]; /* CHPID 0-7 (if available) */
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__u32 unused1 : 8; /* reserved zeros */
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__u32 st : 3; /* subchannel type */
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__u32 unused2 : 20; /* reserved zeros */
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__u32 csense : 1; /* concurrent sense; can be enabled ...*/
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/* ... per MSCH, however, if facility */
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/* ... is not installed, this results */
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/* ... in an operand exception. */
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} __attribute__ ((packed)) pmcw_t;
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#endif /* __KERNEL__ */
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/*
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* subchannel status word
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*/
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typedef struct {
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__u32 key : 4; /* subchannel key */
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__u32 sctl : 1; /* suspend control */
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__u32 eswf : 1; /* ESW format */
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__u32 cc : 2; /* deferred condition code */
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__u32 fmt : 1; /* format */
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__u32 pfch : 1; /* prefetch */
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__u32 isic : 1; /* initial-status interruption control */
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__u32 alcc : 1; /* address-limit checking control */
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__u32 ssi : 1; /* supress-suspended interruption */
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__u32 zcc : 1; /* zero condition code */
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__u32 ectl : 1; /* extended control */
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__u32 pno : 1; /* path not operational */
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__u32 res : 1; /* reserved */
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__u32 fctl : 3; /* function control */
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__u32 actl : 7; /* activity control */
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__u32 stctl : 5; /* status control */
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__u32 cpa; /* channel program address */
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__u32 dstat : 8; /* device status */
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__u32 cstat : 8; /* subchannel status */
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__u32 count : 16; /* residual count */
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} __attribute__ ((packed)) scsw_t;
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#define SCSW_FCTL_CLEAR_FUNC 0x1
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#define SCSW_FCTL_HALT_FUNC 0x2
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#define SCSW_FCTL_START_FUNC 0x4
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#define SCSW_ACTL_SUSPENDED 0x1
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#define SCSW_ACTL_DEVACT 0x2
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#define SCSW_ACTL_SCHACT 0x4
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#define SCSW_ACTL_CLEAR_PEND 0x8
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#define SCSW_ACTL_HALT_PEND 0x10
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#define SCSW_ACTL_START_PEND 0x20
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#define SCSW_ACTL_RESUME_PEND 0x40
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#define SCSW_STCTL_STATUS_PEND 0x1
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#define SCSW_STCTL_SEC_STATUS 0x2
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#define SCSW_STCTL_PRIM_STATUS 0x4
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#define SCSW_STCTL_INTER_STATUS 0x8
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#define SCSW_STCTL_ALERT_STATUS 0x10
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#define DEV_STAT_ATTENTION 0x80
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#define DEV_STAT_STAT_MOD 0x40
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#define DEV_STAT_CU_END 0x20
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#define DEV_STAT_BUSY 0x10
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#define DEV_STAT_CHN_END 0x08
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#define DEV_STAT_DEV_END 0x04
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#define DEV_STAT_UNIT_CHECK 0x02
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#define DEV_STAT_UNIT_EXCEP 0x01
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#define SCHN_STAT_PCI 0x80
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#define SCHN_STAT_INCORR_LEN 0x40
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#define SCHN_STAT_PROG_CHECK 0x20
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#define SCHN_STAT_PROT_CHECK 0x10
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#define SCHN_STAT_CHN_DATA_CHK 0x08
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#define SCHN_STAT_CHN_CTRL_CHK 0x04
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#define SCHN_STAT_INTF_CTRL_CHK 0x02
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#define SCHN_STAT_CHAIN_CHECK 0x01
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/*
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* architectured values for first sense byte
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*/
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#define SNS0_CMD_REJECT 0x80
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#define SNS_CMD_REJECT SNS0_CMD_REJECT
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#define SNS0_INTERVENTION_REQ 0x40
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#define SNS0_BUS_OUT_CHECK 0x20
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#define SNS0_EQUIPMENT_CHECK 0x10
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#define SNS0_DATA_CHECK 0x08
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#define SNS0_OVERRUN 0x04
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/* 0x02 reserved */
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#define SNS0_INCOMPL_DOMAIN 0x01
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/*
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* architectured values for second sense byte
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*/
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#define SNS1_PERM_ERR 0x80
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#define SNS1_INV_TRACK_FORMAT 0x40
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#define SNS1_EOC 0x20
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#define SNS1_MESSAGE_TO_OPER 0x10
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#define SNS1_NO_REC_FOUND 0x08
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#define SNS1_FILE_PROTECTED 0x04
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#define SNS1_WRITE_INHIBITED 0x02
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#define SNS1_INPRECISE_END 0x01
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/*
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* architectured values for third sense byte
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*/
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#define SNS2_REQ_INH_WRITE 0x80
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#define SNS2_CORRECTABLE 0x40
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#define SNS2_FIRST_LOG_ERR 0x20
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#define SNS2_ENV_DATA_PRESENT 0x10
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/* 0x08 reserved */
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#define SNS2_INPRECISE_END 0x04
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/* 0x02 reserved */
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/* 0x01 reserved */
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#ifdef __KERNEL__
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/*
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* subchannel information block
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*/
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typedef struct {
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pmcw_t pmcw; /* path management control word */
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scsw_t scsw; /* subchannel status word */
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__u8 mda[12]; /* model dependent area */
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} __attribute__ ((packed,aligned(4))) schib_t;
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#endif /* __KERNEL__ */
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typedef struct {
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__u8 cmd_code;/* command code */
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__u8 flags; /* flags, like IDA adressing, etc. */
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__u16 count; /* byte count */
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__u32 cda; /* data address */
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} __attribute__ ((packed,aligned(8))) ccw1_t;
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#define CCW_FLAG_DC 0x80
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#define CCW_FLAG_CC 0x40
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#define CCW_FLAG_SLI 0x20
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#define CCW_FLAG_SKIP 0x10
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#define CCW_FLAG_PCI 0x08
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#define CCW_FLAG_IDA 0x04
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#define CCW_FLAG_SUSPEND 0x02
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#define CCW_CMD_READ_IPL 0x02
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#define CCW_CMD_NOOP 0x03
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#define CCW_CMD_BASIC_SENSE 0x04
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#define CCW_CMD_TIC 0x08
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#define CCW_CMD_SENSE_PGID 0x34
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#define CCW_CMD_SUSPEND_RECONN 0x5B
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#define CCW_CMD_RDC 0x64
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#define CCW_CMD_SET_PGID 0xAF
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#define CCW_CMD_SENSE_ID 0xE4
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#define CCW_CMD_DCTL 0xF3
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#ifdef __KERNEL__
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#define SENSE_MAX_COUNT 0x20
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/*
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* architectured values for first sense byte
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*/
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#define SNS0_CMD_REJECT 0x80
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#define SNS_CMD_REJECT SNS0_CMD_REJECT
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#define SNS0_INTERVENTION_REQ 0x40
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#define SNS0_BUS_OUT_CHECK 0x20
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#define SNS0_EQUIPMENT_CHECK 0x10
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#define SNS0_DATA_CHECK 0x08
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#define SNS0_OVERRUN 0x04
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/*
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* operation request block
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*/
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typedef struct {
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__u32 intparm; /* interruption parameter */
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__u32 key : 4; /* flags, like key, suspend control, etc. */
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__u32 spnd : 1; /* suspend control */
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__u32 res1 : 1; /* reserved */
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__u32 mod : 1; /* modification control */
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__u32 sync : 1; /* synchronize control */
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__u32 fmt : 1; /* format control */
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__u32 pfch : 1; /* prefetch control */
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__u32 isic : 1; /* initial-status-interruption control */
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__u32 alcc : 1; /* address-limit-checking control */
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__u32 ssic : 1; /* suppress-suspended-interr. control */
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__u32 res2 : 1; /* reserved */
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__u32 c64 : 1; /* IDAW/QDIO 64 bit control */
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__u32 i2k : 1; /* IDAW 2/4kB block size control */
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__u32 lpm : 8; /* logical path mask */
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__u32 ils : 1; /* incorrect length */
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__u32 zero : 6; /* reserved zeros */
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__u32 orbx : 1; /* ORB extension control */
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__u32 cpa; /* channel program address */
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} __attribute__ ((packed,aligned(4))) orb_t;
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#endif /* __KERNEL__ */
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typedef struct {
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__u32 res0 : 4; /* reserved */
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__u32 pvrf : 1; /* path-verification-required flag */
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__u32 cpt : 1; /* channel-path timeout */
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__u32 fsavf : 1; /* Failing storage address validity flag */
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__u32 cons : 1; /* concurrent-sense */
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__u32 res8 : 2; /* reserved */
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__u32 scnt : 6; /* sense count if cons == 1 */
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__u32 res16 : 16; /* reserved */
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} __attribute__ ((packed)) erw_t;
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240 |
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/*
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* subchannel logout area
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*/
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typedef struct {
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__u32 res0 : 1; /* reserved */
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__u32 esf : 7; /* extended status flags */
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__u32 lpum : 8; /* last path used mask */
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__u32 res16 : 1; /* reserved */
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248 |
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__u32 fvf : 5; /* field-validity flags */
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249 |
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__u32 sacc : 2; /* storage access code */
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__u32 termc : 2; /* termination code */
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__u32 devsc : 1; /* device-status check */
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252 |
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__u32 serr : 1; /* secondary error */
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__u32 ioerr : 1; /* i/o-error alert */
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254 |
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__u32 seqc : 3; /* sequence code */
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255 |
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} __attribute__ ((packed)) sublog_t ;
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256 |
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257 |
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/*
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258 |
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* Format 0 Extended Status Word (ESW)
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259 |
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*/
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260 |
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typedef struct {
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sublog_t sublog; /* subchannel logout */
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erw_t erw; /* extended report word */
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263 |
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__u32 faddr; /* failing address */
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264 |
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__u32 zeros[2]; /* 2 fullwords of zeros */
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} __attribute__ ((packed)) esw0_t;
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266 |
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267 |
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/*
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268 |
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* Format 1 Extended Status Word (ESW)
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269 |
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*/
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270 |
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typedef struct {
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__u8 zero0; /* reserved zeros */
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272 |
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__u8 lpum; /* last path used mask */
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273 |
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__u16 zero16; /* reserved zeros */
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274 |
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erw_t erw; /* extended report word */
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275 |
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__u32 zeros[3]; /* 2 fullwords of zeros */
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276 |
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} __attribute__ ((packed)) esw1_t;
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277 |
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278 |
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/*
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279 |
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* Format 2 Extended Status Word (ESW)
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280 |
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*/
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281 |
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typedef struct {
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282 |
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__u8 zero0; /* reserved zeros */
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283 |
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__u8 lpum; /* last path used mask */
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284 |
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__u16 dcti; /* device-connect-time interval */
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285 |
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erw_t erw; /* extended report word */
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286 |
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__u32 zeros[3]; /* 2 fullwords of zeros */
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287 |
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} __attribute__ ((packed)) esw2_t;
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288 |
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289 |
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/*
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290 |
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* Format 3 Extended Status Word (ESW)
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291 |
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*/
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292 |
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typedef struct {
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293 |
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__u8 zero0; /* reserved zeros */
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294 |
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__u8 lpum; /* last path used mask */
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295 |
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__u16 res; /* reserved */
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296 |
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erw_t erw; /* extended report word */
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297 |
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__u32 zeros[3]; /* 2 fullwords of zeros */
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298 |
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} __attribute__ ((packed)) esw3_t;
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299 |
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300 |
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typedef union {
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301 |
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esw0_t esw0;
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302 |
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esw1_t esw1;
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303 |
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esw2_t esw2;
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304 |
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esw3_t esw3;
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305 |
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} __attribute__ ((packed)) esw_t;
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306 |
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307 |
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/*
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308 |
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* interruption response block
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309 |
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*/
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310 |
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typedef struct {
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311 |
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scsw_t scsw; /* subchannel status word */
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312 |
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esw_t esw; /* extended status word */
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313 |
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__u8 ecw[32]; /* extended control word */
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314 |
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} __attribute__ ((packed,aligned(4))) irb_t;
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315 |
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#ifdef __KERNEL__
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316 |
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317 |
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/*
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318 |
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* TPI info structure
|
319 |
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*/
|
320 |
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typedef struct {
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321 |
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__u32 reserved1 : 16; /* reserved 0x00000001 */
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322 |
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__u32 irq : 16; /* aka. subchannel number */
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323 |
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__u32 intparm; /* interruption parameter */
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324 |
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__u32 adapter_IO : 1;
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325 |
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__u32 reserved2 : 1;
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326 |
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__u32 isc : 3;
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327 |
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__u32 reserved3 : 12;
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328 |
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__u32 int_type : 3;
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329 |
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__u32 reserved4 : 12;
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330 |
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} __attribute__ ((packed)) tpi_info_t;
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331 |
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332 |
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333 |
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//
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334 |
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// command information word (CIW) layout
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335 |
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//
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336 |
|
|
typedef struct _ciw {
|
337 |
|
|
__u32 et : 2; // entry type
|
338 |
|
|
__u32 reserved : 2; // reserved
|
339 |
|
|
__u32 ct : 4; // command type
|
340 |
|
|
__u32 cmd : 8; // command
|
341 |
|
|
__u32 count : 16; // count
|
342 |
|
|
} __attribute__ ((packed)) ciw_t;
|
343 |
|
|
|
344 |
|
|
#define CIW_TYPE_RCD 0x0 // read configuration data
|
345 |
|
|
#define CIW_TYPE_SII 0x1 // set interface identifier
|
346 |
|
|
#define CIW_TYPE_RNI 0x2 // read node identifier
|
347 |
|
|
|
348 |
|
|
#define MAX_CIWS 8
|
349 |
|
|
//
|
350 |
|
|
// sense-id response buffer layout
|
351 |
|
|
//
|
352 |
|
|
typedef struct {
|
353 |
|
|
/* common part */
|
354 |
|
|
__u8 reserved; /* always 0x'FF' */
|
355 |
|
|
__u16 cu_type; /* control unit type */
|
356 |
|
|
__u8 cu_model; /* control unit model */
|
357 |
|
|
__u16 dev_type; /* device type */
|
358 |
|
|
__u8 dev_model; /* device model */
|
359 |
|
|
__u8 unused; /* padding byte */
|
360 |
|
|
/* extended part */
|
361 |
|
|
ciw_t ciw[MAX_CIWS]; /* variable # of CIWs */
|
362 |
|
|
} __attribute__ ((packed,aligned(4))) senseid_t;
|
363 |
|
|
|
364 |
|
|
/*
|
365 |
|
|
* where we put the ssd info
|
366 |
|
|
*/
|
367 |
|
|
typedef struct _ssd_info {
|
368 |
|
|
__u8 valid:1;
|
369 |
|
|
__u8 type:7; /* subchannel type */
|
370 |
|
|
__u8 chpid[8]; /* chpids */
|
371 |
|
|
__u16 fla[8]; /* full link addresses */
|
372 |
|
|
} __attribute__ ((packed)) ssd_info_t;
|
373 |
|
|
|
374 |
|
|
/*
|
375 |
|
|
* area for store event information
|
376 |
|
|
*/
|
377 |
|
|
typedef struct chsc_area_t {
|
378 |
|
|
struct {
|
379 |
|
|
/* word 0 */
|
380 |
|
|
__u16 command_code1;
|
381 |
|
|
__u16 command_code2;
|
382 |
|
|
union {
|
383 |
|
|
struct {
|
384 |
|
|
/* word 1 */
|
385 |
|
|
__u32 reserved1;
|
386 |
|
|
/* word 2 */
|
387 |
|
|
__u32 reserved2;
|
388 |
|
|
} __attribute__ ((packed,aligned(8))) sei_req;
|
389 |
|
|
struct {
|
390 |
|
|
/* word 1 */
|
391 |
|
|
__u16 reserved1;
|
392 |
|
|
__u16 f_sch; /* first subchannel */
|
393 |
|
|
/* word 2 */
|
394 |
|
|
__u16 reserved2;
|
395 |
|
|
__u16 l_sch; /* last subchannel */
|
396 |
|
|
} __attribute__ ((packed,aligned(8))) ssd_req;
|
397 |
|
|
} request_block_data;
|
398 |
|
|
/* word 3 */
|
399 |
|
|
__u32 reserved3;
|
400 |
|
|
} __attribute__ ((packed,aligned(8))) request_block;
|
401 |
|
|
struct {
|
402 |
|
|
/* word 0 */
|
403 |
|
|
__u16 length;
|
404 |
|
|
__u16 response_code;
|
405 |
|
|
/* word 1 */
|
406 |
|
|
__u32 reserved1;
|
407 |
|
|
union {
|
408 |
|
|
struct {
|
409 |
|
|
/* word 2 */
|
410 |
|
|
__u8 flags;
|
411 |
|
|
__u8 vf; /* validity flags */
|
412 |
|
|
__u8 rs; /* reporting source */
|
413 |
|
|
__u8 cc; /* content code */
|
414 |
|
|
/* word 3 */
|
415 |
|
|
__u16 fla; /* full link address */
|
416 |
|
|
__u16 rsid; /* reporting source id */
|
417 |
|
|
/* word 4 */
|
418 |
|
|
__u32 reserved2;
|
419 |
|
|
/* word 5 */
|
420 |
|
|
__u32 reserved3;
|
421 |
|
|
/* word 6-102 */
|
422 |
|
|
__u32 ccdf[96]; /* content-code dependent field */
|
423 |
|
|
} __attribute__ ((packed,aligned(8))) sei_res;
|
424 |
|
|
struct {
|
425 |
|
|
/* word 2 */
|
426 |
|
|
__u8 sch_valid : 1;
|
427 |
|
|
__u8 dev_valid : 1;
|
428 |
|
|
__u8 st : 3; /* subchannel type */
|
429 |
|
|
__u8 zeroes : 3;
|
430 |
|
|
__u8 unit_addr; /* unit address */
|
431 |
|
|
__u16 devno; /* device number */
|
432 |
|
|
/* word 3 */
|
433 |
|
|
__u8 path_mask;
|
434 |
|
|
__u8 fla_valid_mask;
|
435 |
|
|
__u16 sch; /* subchannel */
|
436 |
|
|
/* words 4-5 */
|
437 |
|
|
__u8 chpid[8]; /* chpids 0-7 */
|
438 |
|
|
/* words 6-9 */
|
439 |
|
|
__u16 fla[8]; /* full link addresses 0-7 */
|
440 |
|
|
/* words 10-102 */
|
441 |
|
|
__u32 padding[92];
|
442 |
|
|
} __attribute__ ((packed,aligned(8))) ssd_res;
|
443 |
|
|
} response_block_data;
|
444 |
|
|
} __attribute__ ((packed,aligned(8))) response_block;
|
445 |
|
|
} __attribute__ ((packed,aligned(PAGE_SIZE))) chsc_area_t;
|
446 |
|
|
|
447 |
|
|
#endif /* __KERNEL__ */
|
448 |
|
|
/*
|
449 |
|
|
* sense data
|
450 |
|
|
*/
|
451 |
|
|
typedef struct {
|
452 |
|
|
__u8 res[32]; /* reserved */
|
453 |
|
|
__u8 data[32]; /* sense data */
|
454 |
|
|
} __attribute__ ((packed)) sense_t;
|
455 |
|
|
|
456 |
|
|
/*
|
457 |
|
|
* device status area, to be provided by the device driver
|
458 |
|
|
* when calling request_irq() as parameter "dev_id", later
|
459 |
|
|
* tied to the "action" control block.
|
460 |
|
|
*
|
461 |
|
|
* Note : No data area must be added after union ii or the
|
462 |
|
|
* effective devstat size calculation will fail !
|
463 |
|
|
*/
|
464 |
|
|
typedef struct {
|
465 |
|
|
__u16 devno; /* device number, aka. "cuu" from irb */
|
466 |
|
|
unsigned long intparm; /* interrupt parameter */
|
467 |
|
|
__u8 cstat; /* channel status - accumulated */
|
468 |
|
|
__u8 dstat; /* device status - accumulated */
|
469 |
|
|
__u8 lpum; /* last path used mask from irb */
|
470 |
|
|
__u8 unused; /* not used - reserved */
|
471 |
|
|
unsigned int flag; /* flag : see below */
|
472 |
|
|
__u32 cpa; /* CCW address from irb at primary status */
|
473 |
|
|
__u32 rescnt; /* res. count from irb at primary status */
|
474 |
|
|
__u32 scnt; /* sense count, if DEVSTAT_FLAG_SENSE_AVAIL */
|
475 |
|
|
union {
|
476 |
|
|
irb_t irb; /* interruption response block */
|
477 |
|
|
sense_t sense; /* sense information */
|
478 |
|
|
} ii; /* interrupt information */
|
479 |
|
|
} devstat_t;
|
480 |
|
|
|
481 |
|
|
#define DEVSTAT_FLAG_SENSE_AVAIL 0x00000001
|
482 |
|
|
#define DEVSTAT_NOT_OPER 0x00000002
|
483 |
|
|
#define DEVSTAT_START_FUNCTION 0x00000004
|
484 |
|
|
#define DEVSTAT_HALT_FUNCTION 0x00000008
|
485 |
|
|
#define DEVSTAT_STATUS_PENDING 0x00000010
|
486 |
|
|
#define DEVSTAT_REVALIDATE 0x00000020
|
487 |
|
|
#define DEVSTAT_DEVICE_GONE 0x00000040
|
488 |
|
|
#define DEVSTAT_DEVICE_OWNED 0x00000080
|
489 |
|
|
#define DEVSTAT_CLEAR_FUNCTION 0x00000100
|
490 |
|
|
#define DEVSTAT_PCI 0x00000200
|
491 |
|
|
#define DEVSTAT_SUSPENDED 0x00000400
|
492 |
|
|
#define DEVSTAT_UNKNOWN_DEV 0x00000800
|
493 |
|
|
#define DEVSTAT_UNFRIENDLY_DEV 0x00001000
|
494 |
|
|
#define DEVSTAT_NOT_ACC 0x00002000
|
495 |
|
|
#define DEVSTAT_NOT_ACC_ERR 0x00004000
|
496 |
|
|
#define DEVSTAT_FINAL_STATUS 0x80000000
|
497 |
|
|
|
498 |
|
|
#define DEVINFO_NOT_OPER DEVSTAT_NOT_OPER
|
499 |
|
|
#define DEVINFO_UNKNOWN_DEV DEVSTAT_UNKNOWN_DEV
|
500 |
|
|
#define DEVINFO_DEVICE_OWNED DEVSTAT_DEVICE_OWNED
|
501 |
|
|
#define DEVINFO_QDIO_CAPABLE 0x40000000
|
502 |
|
|
#define DEVINFO_UNFRIENDLY_DEV DEVSTAT_UNFRIENDLY_DEV
|
503 |
|
|
|
504 |
|
|
#define INTPARM_STATUS_PENDING 0xFFFFFFFF
|
505 |
|
|
#ifdef __KERNEL__
|
506 |
|
|
|
507 |
|
|
#define IO_INTERRUPT_TYPE 0 /* I/O interrupt type */
|
508 |
|
|
|
509 |
|
|
typedef void (* io_handler_func1_t) ( int irq,
|
510 |
|
|
devstat_t *devstat,
|
511 |
|
|
struct pt_regs *rgs);
|
512 |
|
|
|
513 |
|
|
typedef void (* io_handler_func_t) ( int irq,
|
514 |
|
|
void *devstat,
|
515 |
|
|
struct pt_regs *rgs);
|
516 |
|
|
|
517 |
|
|
typedef void ( * not_oper_handler_func_t)( int irq,
|
518 |
|
|
int status );
|
519 |
|
|
|
520 |
|
|
typedef int (* adapter_int_handler_t)( __u32 intparm );
|
521 |
|
|
|
522 |
|
|
typedef struct {
|
523 |
|
|
io_handler_func_t handler; /* interrupt handler routine */
|
524 |
|
|
const char *name; /* device name */
|
525 |
|
|
devstat_t *dev_id; /* device status block */
|
526 |
|
|
} irq_desc_t;
|
527 |
|
|
|
528 |
|
|
typedef struct {
|
529 |
|
|
__u8 state1 : 2; /* path state value 1 */
|
530 |
|
|
__u8 state2 : 2; /* path state value 2 */
|
531 |
|
|
__u8 state3 : 1; /* path state value 3 */
|
532 |
|
|
__u8 resvd : 3; /* reserved */
|
533 |
|
|
} __attribute__ ((packed)) path_state_t;
|
534 |
|
|
|
535 |
|
|
typedef struct {
|
536 |
|
|
union {
|
537 |
|
|
__u8 fc; /* SPID function code */
|
538 |
|
|
path_state_t ps; /* SNID path state */
|
539 |
|
|
} inf;
|
540 |
|
|
__u32 cpu_addr : 16; /* CPU address */
|
541 |
|
|
__u32 cpu_id : 24; /* CPU identification */
|
542 |
|
|
__u32 cpu_model : 16; /* CPU model */
|
543 |
|
|
__u32 tod_high; /* high word TOD clock */
|
544 |
|
|
} __attribute__ ((packed)) pgid_t;
|
545 |
|
|
|
546 |
|
|
#define SPID_FUNC_SINGLE_PATH 0x00
|
547 |
|
|
#define SPID_FUNC_MULTI_PATH 0x80
|
548 |
|
|
#define SPID_FUNC_ESTABLISH 0x00
|
549 |
|
|
#define SPID_FUNC_RESIGN 0x40
|
550 |
|
|
#define SPID_FUNC_DISBAND 0x20
|
551 |
|
|
|
552 |
|
|
#define SNID_STATE1_RESET 0
|
553 |
|
|
#define SNID_STATE1_UNGROUPED 2
|
554 |
|
|
#define SNID_STATE1_GROUPED 3
|
555 |
|
|
|
556 |
|
|
#define SNID_STATE2_NOT_RESVD 0
|
557 |
|
|
#define SNID_STATE2_RESVD_ELSE 2
|
558 |
|
|
#define SNID_STATE2_RESVD_SELF 3
|
559 |
|
|
|
560 |
|
|
#define SNID_STATE3_MULTI_PATH 1
|
561 |
|
|
#define SNID_STATE3_SINGLE_PATH 0
|
562 |
|
|
|
563 |
|
|
/*
|
564 |
|
|
* Flags used as input parameters for do_IO()
|
565 |
|
|
*/
|
566 |
|
|
#define DOIO_EARLY_NOTIFICATION 0x0001 /* allow for I/O completion ... */
|
567 |
|
|
/* ... notification after ... */
|
568 |
|
|
/* ... primary interrupt status */
|
569 |
|
|
#define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION
|
570 |
|
|
#define DOIO_VALID_LPM 0x0002 /* LPM input parameter is valid */
|
571 |
|
|
#define DOIO_WAIT_FOR_INTERRUPT 0x0004 /* wait synchronously for interrupt */
|
572 |
|
|
#define DOIO_REPORT_ALL 0x0008 /* report all interrupt conditions */
|
573 |
|
|
#define DOIO_ALLOW_SUSPEND 0x0010 /* allow for channel prog. suspend */
|
574 |
|
|
#define DOIO_DENY_PREFETCH 0x0020 /* don't allow for CCW prefetch */
|
575 |
|
|
#define DOIO_SUPPRESS_INTER 0x0040 /* suppress intermediate inter. */
|
576 |
|
|
/* ... for suspended CCWs */
|
577 |
|
|
#define DOIO_TIMEOUT 0x0080 /* 3 secs. timeout for sync. I/O */
|
578 |
|
|
#define DOIO_DONT_CALL_INTHDLR 0x0100 /* don't call interrupt handler */
|
579 |
|
|
#define DOIO_USE_DIAG98 0x0400 /* use DIAG98 instead of SSCH */
|
580 |
|
|
|
581 |
|
|
/*
|
582 |
|
|
* do_IO()
|
583 |
|
|
*
|
584 |
|
|
* Start a S/390 channel program. When the interrupt arrives, the
|
585 |
|
|
* IRQ handler is called, either immediately, delayed (dev-end missing,
|
586 |
|
|
* or sense required) or never (no IRQ handler registered -
|
587 |
|
|
* should never occur, as the IRQ (subchannel ID) should be
|
588 |
|
|
* disabled if no handler is present. Depending on the action
|
589 |
|
|
* taken, do_IO() returns : 0 - Success
|
590 |
|
|
* -EIO - Status pending
|
591 |
|
|
* see : action->dev_id->cstat
|
592 |
|
|
* action->dev_id->dstat
|
593 |
|
|
* -EBUSY - Device busy
|
594 |
|
|
* -ENODEV - Device not operational
|
595 |
|
|
*/
|
596 |
|
|
int do_IO( int irq, /* IRQ aka. subchannel number */
|
597 |
|
|
ccw1_t *cpa, /* logical channel program address */
|
598 |
|
|
unsigned long intparm, /* interruption parameter */
|
599 |
|
|
__u8 lpm, /* logical path mask */
|
600 |
|
|
unsigned long flag); /* flags : see above */
|
601 |
|
|
|
602 |
|
|
int start_IO( int irq, /* IRQ aka. subchannel number */
|
603 |
|
|
ccw1_t *cpa, /* logical channel program address */
|
604 |
|
|
unsigned long intparm, /* interruption parameter */
|
605 |
|
|
__u8 lpm, /* logical path mask */
|
606 |
|
|
unsigned int flag); /* flags : see above */
|
607 |
|
|
|
608 |
|
|
void do_crw_pending( void ); /* CRW handler */
|
609 |
|
|
|
610 |
|
|
int resume_IO( int irq); /* IRQ aka. subchannel number */
|
611 |
|
|
|
612 |
|
|
int halt_IO( int irq, /* IRQ aka. subchannel number */
|
613 |
|
|
unsigned long intparm, /* dummy intparm */
|
614 |
|
|
unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */
|
615 |
|
|
|
616 |
|
|
int clear_IO( int irq, /* IRQ aka. subchannel number */
|
617 |
|
|
unsigned long intparm, /* dummy intparm */
|
618 |
|
|
unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */
|
619 |
|
|
|
620 |
|
|
int process_IRQ( struct pt_regs regs,
|
621 |
|
|
unsigned int irq,
|
622 |
|
|
unsigned int intparm);
|
623 |
|
|
|
624 |
|
|
|
625 |
|
|
int enable_cpu_sync_isc ( int irq );
|
626 |
|
|
int disable_cpu_sync_isc( int irq );
|
627 |
|
|
|
628 |
|
|
typedef struct {
|
629 |
|
|
int irq; /* irq, aka. subchannel */
|
630 |
|
|
__u16 devno; /* device number */
|
631 |
|
|
unsigned int status; /* device status */
|
632 |
|
|
senseid_t sid_data; /* senseID data */
|
633 |
|
|
} s390_dev_info_t;
|
634 |
|
|
|
635 |
|
|
int get_dev_info( int irq, s390_dev_info_t *); /* to be eliminated - don't use */
|
636 |
|
|
|
637 |
|
|
int get_dev_info_by_irq ( int irq, s390_dev_info_t *pdi);
|
638 |
|
|
int get_dev_info_by_devno( __u16 devno, s390_dev_info_t *pdi);
|
639 |
|
|
|
640 |
|
|
int get_irq_by_devno( __u16 devno );
|
641 |
|
|
unsigned int get_devno_by_irq( int irq );
|
642 |
|
|
|
643 |
|
|
int get_irq_first( void );
|
644 |
|
|
int get_irq_next ( int irq );
|
645 |
|
|
|
646 |
|
|
int read_dev_chars( int irq, void **buffer, int length );
|
647 |
|
|
int read_conf_data( int irq, void **buffer, int *length, __u8 lpm );
|
648 |
|
|
|
649 |
|
|
int s390_DevicePathVerification( int irq, __u8 domask );
|
650 |
|
|
|
651 |
|
|
int s390_trigger_resense(int irq);
|
652 |
|
|
|
653 |
|
|
int s390_request_irq_special( int irq,
|
654 |
|
|
io_handler_func_t io_handler,
|
655 |
|
|
not_oper_handler_func_t not_oper_handler,
|
656 |
|
|
unsigned long irqflags,
|
657 |
|
|
const char *devname,
|
658 |
|
|
void *dev_id);
|
659 |
|
|
|
660 |
|
|
extern int set_cons_dev(int irq);
|
661 |
|
|
extern int wait_cons_dev(int irq);
|
662 |
|
|
extern schib_t *s390_get_schib( int irq );
|
663 |
|
|
|
664 |
|
|
extern int s390_register_adapter_interrupt(adapter_int_handler_t handler);
|
665 |
|
|
extern int s390_unregister_adapter_interrupt(adapter_int_handler_t handler);
|
666 |
|
|
|
667 |
|
|
/*
|
668 |
|
|
* Some S390 specific IO instructions as inline
|
669 |
|
|
*/
|
670 |
|
|
|
671 |
|
|
extern __inline__ int stsch(int irq, volatile schib_t *addr)
|
672 |
|
|
{
|
673 |
|
|
int ccode;
|
674 |
|
|
|
675 |
|
|
__asm__ __volatile__(
|
676 |
|
|
" lr 1,%1\n"
|
677 |
|
|
" stsch 0(%2)\n"
|
678 |
|
|
" ipm %0\n"
|
679 |
|
|
" srl %0,28"
|
680 |
|
|
: "=d" (ccode)
|
681 |
|
|
: "d" (irq | 0x10000), "a" (addr)
|
682 |
|
|
: "cc", "1" );
|
683 |
|
|
return ccode;
|
684 |
|
|
}
|
685 |
|
|
|
686 |
|
|
extern __inline__ int msch(int irq, volatile schib_t *addr)
|
687 |
|
|
{
|
688 |
|
|
int ccode;
|
689 |
|
|
|
690 |
|
|
__asm__ __volatile__(
|
691 |
|
|
" lr 1,%1\n"
|
692 |
|
|
" msch 0(%2)\n"
|
693 |
|
|
" ipm %0\n"
|
694 |
|
|
" srl %0,28"
|
695 |
|
|
: "=d" (ccode)
|
696 |
|
|
: "d" (irq | 0x10000L), "a" (addr)
|
697 |
|
|
: "cc", "1" );
|
698 |
|
|
return ccode;
|
699 |
|
|
}
|
700 |
|
|
|
701 |
|
|
extern __inline__ int msch_err(int irq, volatile schib_t *addr)
|
702 |
|
|
{
|
703 |
|
|
int ccode;
|
704 |
|
|
|
705 |
|
|
__asm__ __volatile__(
|
706 |
|
|
" lr 1,%1\n"
|
707 |
|
|
" msch 0(%2)\n"
|
708 |
|
|
"0: ipm %0\n"
|
709 |
|
|
" srl %0,28\n"
|
710 |
|
|
"1:\n"
|
711 |
|
|
#ifdef CONFIG_ARCH_S390X
|
712 |
|
|
".section .fixup,\"ax\"\n"
|
713 |
|
|
"2: l %0,%3\n"
|
714 |
|
|
" jg 1b\n"
|
715 |
|
|
".previous\n"
|
716 |
|
|
".section __ex_table,\"a\"\n"
|
717 |
|
|
" .align 8\n"
|
718 |
|
|
" .quad 0b,2b\n"
|
719 |
|
|
".previous"
|
720 |
|
|
#else
|
721 |
|
|
".section .fixup,\"ax\"\n"
|
722 |
|
|
"2: l %0,%3\n"
|
723 |
|
|
" bras 1,3f\n"
|
724 |
|
|
" .long 1b\n"
|
725 |
|
|
"3: l 1,0(1)\n"
|
726 |
|
|
" br 1\n"
|
727 |
|
|
".previous\n"
|
728 |
|
|
".section __ex_table,\"a\"\n"
|
729 |
|
|
" .align 4\n"
|
730 |
|
|
" .long 0b,2b\n"
|
731 |
|
|
".previous"
|
732 |
|
|
#endif
|
733 |
|
|
: "=d" (ccode)
|
734 |
|
|
: "d" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC)
|
735 |
|
|
: "cc", "1" );
|
736 |
|
|
return ccode;
|
737 |
|
|
}
|
738 |
|
|
|
739 |
|
|
extern __inline__ int tsch(int irq, volatile irb_t *addr)
|
740 |
|
|
{
|
741 |
|
|
int ccode;
|
742 |
|
|
|
743 |
|
|
__asm__ __volatile__(
|
744 |
|
|
" lr 1,%1\n"
|
745 |
|
|
" tsch 0(%2)\n"
|
746 |
|
|
" ipm %0\n"
|
747 |
|
|
" srl %0,28"
|
748 |
|
|
: "=d" (ccode)
|
749 |
|
|
: "d" (irq | 0x10000L), "a" (addr)
|
750 |
|
|
: "cc", "1" );
|
751 |
|
|
return ccode;
|
752 |
|
|
}
|
753 |
|
|
|
754 |
|
|
extern __inline__ int tpi( volatile tpi_info_t *addr)
|
755 |
|
|
{
|
756 |
|
|
int ccode;
|
757 |
|
|
|
758 |
|
|
__asm__ __volatile__(
|
759 |
|
|
" tpi 0(%1)\n"
|
760 |
|
|
" ipm %0\n"
|
761 |
|
|
" srl %0,28"
|
762 |
|
|
: "=d" (ccode)
|
763 |
|
|
: "a" (addr)
|
764 |
|
|
: "cc", "1" );
|
765 |
|
|
return ccode;
|
766 |
|
|
}
|
767 |
|
|
|
768 |
|
|
extern __inline__ int ssch(int irq, volatile orb_t *addr)
|
769 |
|
|
{
|
770 |
|
|
int ccode;
|
771 |
|
|
|
772 |
|
|
__asm__ __volatile__(
|
773 |
|
|
" lr 1,%1\n"
|
774 |
|
|
" ssch 0(%2)\n"
|
775 |
|
|
" ipm %0\n"
|
776 |
|
|
" srl %0,28"
|
777 |
|
|
: "=d" (ccode)
|
778 |
|
|
: "d" (irq | 0x10000L), "a" (addr)
|
779 |
|
|
: "cc", "1" );
|
780 |
|
|
return ccode;
|
781 |
|
|
}
|
782 |
|
|
|
783 |
|
|
extern __inline__ int diag98(int irq, volatile orb_t *addr)
|
784 |
|
|
{
|
785 |
|
|
int ccode;
|
786 |
|
|
|
787 |
|
|
__asm__ __volatile__(
|
788 |
|
|
" lr 1,%1\n"
|
789 |
|
|
" lgr 0,%2\n" /* orb in 0 */
|
790 |
|
|
" lghi 2,12\n" /* function code 0x0c */
|
791 |
|
|
" diag 2,0,152\n" /* diag98 instead of ssch,
|
792 |
|
|
result in gpr 1 */
|
793 |
|
|
" ipm %0\n" /* usual cc evaluation. cc=3 will be
|
794 |
|
|
reported as not operational */
|
795 |
|
|
" srl %0,28"
|
796 |
|
|
: "=d" (ccode)
|
797 |
|
|
: "d" (irq | 0x10000L), "a" (addr)
|
798 |
|
|
: "cc", "0", "1", "2");
|
799 |
|
|
return ccode;
|
800 |
|
|
}
|
801 |
|
|
|
802 |
|
|
extern __inline__ int rsch(int irq)
|
803 |
|
|
{
|
804 |
|
|
int ccode;
|
805 |
|
|
|
806 |
|
|
__asm__ __volatile__(
|
807 |
|
|
" lr 1,%1\n"
|
808 |
|
|
" rsch\n"
|
809 |
|
|
" ipm %0\n"
|
810 |
|
|
" srl %0,28"
|
811 |
|
|
: "=d" (ccode)
|
812 |
|
|
: "d" (irq | 0x10000L)
|
813 |
|
|
: "cc", "1" );
|
814 |
|
|
return ccode;
|
815 |
|
|
}
|
816 |
|
|
|
817 |
|
|
extern __inline__ int csch(int irq)
|
818 |
|
|
{
|
819 |
|
|
int ccode;
|
820 |
|
|
|
821 |
|
|
__asm__ __volatile__(
|
822 |
|
|
" lr 1,%1\n"
|
823 |
|
|
" csch\n"
|
824 |
|
|
" ipm %0\n"
|
825 |
|
|
" srl %0,28"
|
826 |
|
|
: "=d" (ccode)
|
827 |
|
|
: "d" (irq | 0x10000L)
|
828 |
|
|
: "cc", "1" );
|
829 |
|
|
return ccode;
|
830 |
|
|
}
|
831 |
|
|
|
832 |
|
|
extern __inline__ int hsch(int irq)
|
833 |
|
|
{
|
834 |
|
|
int ccode;
|
835 |
|
|
|
836 |
|
|
__asm__ __volatile__(
|
837 |
|
|
" lr 1,%1\n"
|
838 |
|
|
" hsch\n"
|
839 |
|
|
" ipm %0\n"
|
840 |
|
|
" srl %0,28"
|
841 |
|
|
: "=d" (ccode)
|
842 |
|
|
: "d" (irq | 0x10000L)
|
843 |
|
|
: "cc", "1" );
|
844 |
|
|
return ccode;
|
845 |
|
|
}
|
846 |
|
|
|
847 |
|
|
extern __inline__ int xsch(int irq)
|
848 |
|
|
{
|
849 |
|
|
int ccode;
|
850 |
|
|
|
851 |
|
|
__asm__ __volatile__(
|
852 |
|
|
" lr 1,%1\n"
|
853 |
|
|
" .insn rre,0xb2760000,%1,0\n"
|
854 |
|
|
" ipm %0\n"
|
855 |
|
|
" srl %0,28"
|
856 |
|
|
: "=d" (ccode)
|
857 |
|
|
: "d" (irq | 0x10000L)
|
858 |
|
|
: "cc", "1" );
|
859 |
|
|
return ccode;
|
860 |
|
|
}
|
861 |
|
|
|
862 |
|
|
extern __inline__ int iac( void)
|
863 |
|
|
{
|
864 |
|
|
int ccode;
|
865 |
|
|
|
866 |
|
|
__asm__ __volatile__(
|
867 |
|
|
" iac 1\n"
|
868 |
|
|
" ipm %0\n"
|
869 |
|
|
" srl %0,28"
|
870 |
|
|
: "=d" (ccode) : : "cc", "1" );
|
871 |
|
|
return ccode;
|
872 |
|
|
}
|
873 |
|
|
|
874 |
|
|
extern __inline__ int rchp(int chpid)
|
875 |
|
|
{
|
876 |
|
|
int ccode;
|
877 |
|
|
|
878 |
|
|
__asm__ __volatile__(
|
879 |
|
|
" lr 1,%1\n"
|
880 |
|
|
" rchp\n"
|
881 |
|
|
" ipm %0\n"
|
882 |
|
|
" srl %0,28"
|
883 |
|
|
: "=d" (ccode)
|
884 |
|
|
: "d" (chpid)
|
885 |
|
|
: "cc", "1" );
|
886 |
|
|
return ccode;
|
887 |
|
|
}
|
888 |
|
|
|
889 |
|
|
typedef struct {
|
890 |
|
|
__u16 vrdcdvno : 16; /* device number (input) */
|
891 |
|
|
__u16 vrdclen : 16; /* data block length (input) */
|
892 |
|
|
__u32 vrdcvcla : 8; /* virtual device class (output) */
|
893 |
|
|
__u32 vrdcvtyp : 8; /* virtual device type (output) */
|
894 |
|
|
__u32 vrdcvsta : 8; /* virtual device status (output) */
|
895 |
|
|
__u32 vrdcvfla : 8; /* virtual device flags (output) */
|
896 |
|
|
__u32 vrdcrccl : 8; /* real device class (output) */
|
897 |
|
|
__u32 vrdccrty : 8; /* real device type (output) */
|
898 |
|
|
__u32 vrdccrmd : 8; /* real device model (output) */
|
899 |
|
|
__u32 vrdccrft : 8; /* real device feature (output) */
|
900 |
|
|
} __attribute__ ((packed,aligned(4))) diag210_t;
|
901 |
|
|
|
902 |
|
|
void VM_virtual_device_info( __u16 devno, /* device number */
|
903 |
|
|
senseid_t *ps ); /* ptr to senseID data */
|
904 |
|
|
|
905 |
|
|
extern int diag210( diag210_t * addr);
|
906 |
|
|
|
907 |
|
|
extern __inline__ int chsc( chsc_area_t * chsc_area)
|
908 |
|
|
{
|
909 |
|
|
int cc;
|
910 |
|
|
|
911 |
|
|
__asm__ __volatile__ (
|
912 |
|
|
".insn rre,0xb25f0000,%1,0 \n\t"
|
913 |
|
|
"ipm %0 \n\t"
|
914 |
|
|
"srl %0,28 \n\t"
|
915 |
|
|
: "=d" (cc)
|
916 |
|
|
: "d" (chsc_area)
|
917 |
|
|
: "cc" );
|
918 |
|
|
|
919 |
|
|
return cc;
|
920 |
|
|
}
|
921 |
|
|
|
922 |
|
|
/*
|
923 |
|
|
* Various low-level irq details needed by irq.c, process.c,
|
924 |
|
|
* time.c, io_apic.c and smp.c
|
925 |
|
|
*
|
926 |
|
|
* Interrupt entry/exit code at both C and assembly level
|
927 |
|
|
*/
|
928 |
|
|
|
929 |
|
|
void mask_irq(unsigned int irq);
|
930 |
|
|
void unmask_irq(unsigned int irq);
|
931 |
|
|
|
932 |
|
|
#define MAX_IRQ_SOURCES 128
|
933 |
|
|
|
934 |
|
|
extern spinlock_t irq_controller_lock;
|
935 |
|
|
|
936 |
|
|
#ifdef CONFIG_SMP
|
937 |
|
|
|
938 |
|
|
#include <asm/atomic.h>
|
939 |
|
|
|
940 |
|
|
static inline void irq_enter(int cpu, unsigned int irq)
|
941 |
|
|
{
|
942 |
|
|
hardirq_enter(cpu);
|
943 |
|
|
while (atomic_read(&global_irq_lock) != 0) {
|
944 |
|
|
eieio();
|
945 |
|
|
}
|
946 |
|
|
}
|
947 |
|
|
|
948 |
|
|
static inline void irq_exit(int cpu, unsigned int irq)
|
949 |
|
|
{
|
950 |
|
|
hardirq_exit(cpu);
|
951 |
|
|
release_irqlock(cpu);
|
952 |
|
|
}
|
953 |
|
|
|
954 |
|
|
|
955 |
|
|
#else
|
956 |
|
|
|
957 |
|
|
#define irq_enter(cpu, irq) (++local_irq_count(cpu))
|
958 |
|
|
#define irq_exit(cpu, irq) (--local_irq_count(cpu))
|
959 |
|
|
|
960 |
|
|
#endif
|
961 |
|
|
|
962 |
|
|
#define __STR(x) #x
|
963 |
|
|
#define STR(x) __STR(x)
|
964 |
|
|
|
965 |
|
|
#ifdef CONFIG_SMP
|
966 |
|
|
|
967 |
|
|
/*
|
968 |
|
|
* SMP has a few special interrupts for IPI messages
|
969 |
|
|
*/
|
970 |
|
|
|
971 |
|
|
#endif /* CONFIG_SMP */
|
972 |
|
|
|
973 |
|
|
/*
|
974 |
|
|
* x86 profiling function, SMP safe. We might want to do this in
|
975 |
|
|
* assembly totally?
|
976 |
|
|
*/
|
977 |
|
|
extern char _stext;
|
978 |
|
|
static inline void s390_do_profile (unsigned long addr)
|
979 |
|
|
{
|
980 |
|
|
if (prof_buffer && current->pid) {
|
981 |
|
|
#ifndef CONFIG_ARCH_S390X
|
982 |
|
|
addr &= 0x7fffffff;
|
983 |
|
|
#endif
|
984 |
|
|
addr -= (unsigned long) &_stext;
|
985 |
|
|
addr >>= prof_shift;
|
986 |
|
|
/*
|
987 |
|
|
* Don't ignore out-of-bounds EIP values silently,
|
988 |
|
|
* put them into the last histogram slot, so if
|
989 |
|
|
* present, they will show up as a sharp peak.
|
990 |
|
|
*/
|
991 |
|
|
if (addr > prof_len-1)
|
992 |
|
|
addr = prof_len-1;
|
993 |
|
|
atomic_inc((atomic_t *)&prof_buffer[addr]);
|
994 |
|
|
}
|
995 |
|
|
}
|
996 |
|
|
|
997 |
|
|
#include <asm/s390io.h>
|
998 |
|
|
|
999 |
|
|
#define get_irq_lock(irq) &ioinfo[irq]->irq_lock
|
1000 |
|
|
|
1001 |
|
|
#define s390irq_spin_lock(irq) \
|
1002 |
|
|
spin_lock(&(ioinfo[irq]->irq_lock))
|
1003 |
|
|
|
1004 |
|
|
#define s390irq_spin_unlock(irq) \
|
1005 |
|
|
spin_unlock(&(ioinfo[irq]->irq_lock))
|
1006 |
|
|
|
1007 |
|
|
#define s390irq_spin_lock_irqsave(irq,flags) \
|
1008 |
|
|
spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags)
|
1009 |
|
|
#define s390irq_spin_unlock_irqrestore(irq,flags) \
|
1010 |
|
|
spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags)
|
1011 |
|
|
|
1012 |
|
|
#define touch_nmi_watchdog() do { } while(0)
|
1013 |
|
|
|
1014 |
|
|
#endif /* __KERNEL__ */
|
1015 |
|
|
#endif
|
1016 |
|
|
|