OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-sh64/] [tlb.h] - Blame information for rev 1774

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix
/*
2
 * include/asm-sh64/tlb.h
3
 *
4
 * Copyright (C) 2003  Paul Mundt
5
 *
6
 * This file is subject to the terms and conditions of the GNU General Public
7
 * License.  See the file "COPYING" in the main directory of this archive
8
 * for more details.
9
 *
10
 */
11
#ifndef __ASM_SH64_TLB_H
12
#define __ASM_SH64_TLB_H
13
 
14
/*
15
 * Note! These are mostly unused, we just need the xTLB_LAST_VAR_UNRESTRICTED
16
 * for head.S! Once this limitation is gone, we can clean the rest of this up.
17
 */
18
 
19
/* ITLB defines */
20
#define ITLB_FIXED      0x00000000      /* First fixed ITLB, see head.S */
21
#define ITLB_LAST_VAR_UNRESTRICTED      0x000003F0      /* Last ITLB */
22
 
23
/* DTLB defines */
24
#define DTLB_FIXED      0x00800000      /* First fixed DTLB, see head.S */
25
#define DTLB_LAST_VAR_UNRESTRICTED      0x008003F0      /* Last DTLB */
26
 
27
#ifndef __ASSEMBLY__
28
 
29
#include <asm-generic/tlb.h>
30
 
31
/*
32
 * TLB information structure
33
 *
34
 * Defined for both I and D tlb, per-processor.
35
 */
36
struct tlb_info {
37
        unsigned long long next;
38
        unsigned long long first;
39
        unsigned long long last;
40
 
41
        unsigned int entries;
42
        unsigned int step;
43
 
44
        unsigned long flags;
45
};
46
 
47
/**
48
 * for_each_dtlb_entry
49
 *
50
 * @tlb:        TLB entry
51
 *
52
 * Iterate over free (non-wired) DTLB entries
53
 */
54
#define for_each_dtlb_entry(tlb)                \
55
        for (tlb  = cpu_data->dtlb.first;       \
56
             tlb <= cpu_data->dtlb.last;        \
57
             tlb += cpu_data->dtlb.step)
58
 
59
/**
60
 * for_each_itlb_entry
61
 *
62
 * @tlb:        TLB entry
63
 *
64
 * Iterate over free (non-wired) ITLB entries
65
 */
66
#define for_each_itlb_entry(tlb)                \
67
        for (tlb  = cpu_data->itlb.first;       \
68
             tlb <= cpu_data->itlb.last;        \
69
             tlb += cpu_data->itlb.step)
70
 
71
/**
72
 * __flush_tlb_slot
73
 *
74
 * @slot:       Address of TLB slot.
75
 *
76
 * Flushes TLB slot @slot.
77
 */
78
static inline void __flush_tlb_slot(unsigned long long slot)
79
{
80
        __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot));
81
}
82
 
83
/* arch/sh64/mm/tlb.c */
84
extern int sh64_tlb_init(void);
85
extern unsigned long long sh64_next_free_dtlb_entry(void);
86
extern unsigned long long sh64_get_wired_dtlb_entry(void);
87
extern int sh64_put_wired_dtlb_entry(unsigned long long entry);
88
 
89
extern void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr);
90
extern void sh64_teardown_tlb_slot(unsigned long long config_addr);
91
 
92
#endif /* __ASSEMBLY__ */
93
 
94
#endif /* __ASM_SH64_TLB_H */
95
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.