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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-sparc/] [sun4paddr.h] - Blame information for rev 1774

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Line No. Rev Author Line
1 1275 phoenix
/* $Id: sun4paddr.h,v 1.1.1.1 2004-04-15 02:40:33 phoenix Exp $
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 * sun4paddr.h:  Various physical addresses on sun4 machines
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 *
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 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
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 * Copyright (C) 1998 Chris Davis (cdavis@cois.on.ca)
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 *
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 * Now supports more sun4's
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 */
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#ifndef _SPARC_SUN4PADDR_H
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#define _SPARC_SUN4PADDR_H
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#define SUN4_IE_PHYSADDR                0xf5000000
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#define SUN4_UNUSED_PHYSADDR            0
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/* these work for me */
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#define SUN4_200_MEMREG_PHYSADDR        0xf4000000
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#define SUN4_200_CLOCK_PHYSADDR         0xf3000000
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#define SUN4_200_BWTWO_PHYSADDR         0xfd000000
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#define SUN4_200_ETH_PHYSADDR           0xf6000000
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#define SUN4_200_SI_PHYSADDR            0xff200000
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/* these were here before */
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#define SUN4_300_MEMREG_PHYSADDR        0xf4000000
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#define SUN4_300_CLOCK_PHYSADDR         0xf2000000
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#define SUN4_300_TIMER_PHYSADDR         0xef000000
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#define SUN4_300_ETH_PHYSADDR           0xf9000000
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#define SUN4_300_BWTWO_PHYSADDR         0xfb400000
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#define SUN4_300_DMA_PHYSADDR           0xfa001000
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#define SUN4_300_ESP_PHYSADDR           0xfa000000
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/* Are these right? */
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#define SUN4_400_MEMREG_PHYSADDR        0xf4000000
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#define SUN4_400_CLOCK_PHYSADDR         0xf2000000
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#define SUN4_400_TIMER_PHYSADDR         0xef000000
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#define SUN4_400_ETH_PHYSADDR           0xf9000000
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#define SUN4_400_BWTWO_PHYSADDR         0xfb400000
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#define SUN4_400_DMA_PHYSADDR           0xfa001000
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#define SUN4_400_ESP_PHYSADDR           0xfa000000
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/*
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        these are the actual values set and used in the code. Unused items set
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        to SUN_UNUSED_PHYSADDR
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 */
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extern int sun4_memreg_physaddr; /* memory register (ecc?) */
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extern int sun4_clock_physaddr;  /* system clock */
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extern int sun4_timer_physaddr;  /* timer, where applicable */
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extern int sun4_eth_physaddr;    /* onboard ethernet (ie/le) */
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extern int sun4_si_physaddr;     /* sun3 scsi adapter */
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extern int sun4_bwtwo_physaddr;  /* onboard bw2 */
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extern int sun4_dma_physaddr;    /* scsi dma */
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extern int sun4_esp_physaddr;    /* esp scsi */
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extern int sun4_ie_physaddr;     /* interrupt enable */
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#endif /* !(_SPARC_SUN4PADDR_H) */

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