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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-sparc64/] [timer.h] - Blame information for rev 1276

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1 1276 phoenix
/* $Id: timer.h,v 1.1.1.1 2004-04-15 03:01:04 phoenix Exp $
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 * timer.h: System timer definitions for sun5.
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 *
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 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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 */
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#ifndef _SPARC64_TIMER_H
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#define _SPARC64_TIMER_H
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/* How timers work:
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 *
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 * On uniprocessors we just use counter zero for the system wide
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 * ticker, this performs thread scheduling, clock book keeping,
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 * and runs timer based events.  Previously we used the Ultra
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 * %tick interrupt for this purpose.
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 *
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 * On multiprocessors we pick one cpu as the master level 10 tick
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 * processor.  Here this counter zero tick handles clock book
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 * keeping and timer events only.  Each Ultra has it's level
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 * 14 %tick interrupt set to fire off as well, even the master
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 * tick cpu runs this locally.  This ticker performs thread
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 * scheduling, system/user tick counting for the current thread,
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 * and also profiling if enabled.
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 */
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#include <linux/config.h>
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/* Two timers, traditionally steered to PIL's 10 and 14 respectively.
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 * But since INO packets are used on sun5, we could use any PIL level
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 * we like, however for now we use the normal ones.
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 *
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 * The 'reg' and 'interrupts' properties for these live in nodes named
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 * 'counter-timer'.  The first of three 'reg' properties describe where
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 * the sun5_timer registers are.  The other two I have no idea. (XXX)
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 */
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struct sun5_timer {
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        u64     count0;
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        u64     limit0;
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        u64     count1;
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        u64     limit1;
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};
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#define SUN5_LIMIT_ENABLE       0x80000000
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#define SUN5_LIMIT_TOZERO       0x40000000
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#define SUN5_LIMIT_ZRESTART     0x20000000
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#define SUN5_LIMIT_CMASK        0x1fffffff
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/* Given a HZ value, set the limit register to so that the timer IRQ
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 * gets delivered that often.
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 */
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#define SUN5_HZ_TO_LIMIT(__hz)  (1000000/(__hz))
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struct sparc64_tick_ops {
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        void (*init_tick)(unsigned long);
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        unsigned long (*get_tick)(void);
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        unsigned long (*get_compare)(void);
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        unsigned long (*add_tick)(unsigned long, unsigned long);
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        unsigned long (*add_compare)(unsigned long);
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        unsigned long softint_mask;
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};
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extern struct sparc64_tick_ops *tick_ops;
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#ifdef CONFIG_SMP
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extern unsigned long timer_tick_offset;
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extern void timer_tick_interrupt(struct pt_regs *);
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#endif
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#endif /* _SPARC64_TIMER_H */

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