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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-x86_64/] [spinlock.h] - Blame information for rev 1765

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1 1275 phoenix
#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <asm/atomic.h>
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#include <asm/rwlock.h>
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#include <asm/page.h>
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#include <linux/kernel.h>
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#include <linux/config.h>
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extern int printk(const char * fmt, ...)
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        __attribute__ ((format (printf, 1, 2)));
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/* It seems that people are forgetting to
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 * initialize their spinlocks properly, tsk tsk.
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 * Remember to turn this off in 2.4. -ben
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 */
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#if defined(CONFIG_DEBUG_SPINLOCK)
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#define SPINLOCK_DEBUG  1
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#else
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#define SPINLOCK_DEBUG  0
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#endif
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/*
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 * Your basic SMP spinlocks, allowing only a single CPU anywhere
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 */
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typedef struct {
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        volatile unsigned int lock;
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#if SPINLOCK_DEBUG
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        unsigned magic;
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#endif
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} spinlock_t;
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#define SPINLOCK_MAGIC  0xdead4ead
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#if SPINLOCK_DEBUG
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#define SPINLOCK_MAGIC_INIT     , SPINLOCK_MAGIC
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#else
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#define SPINLOCK_MAGIC_INIT     /* */
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#endif
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#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 SPINLOCK_MAGIC_INIT }
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#define spin_lock_init(x)       do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
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/*
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 * Simple spin lock operations.  There are two variants, one clears IRQ's
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 * on the local processor, one does not.
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 *
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 * We make no fairness assumptions. They have a cost.
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 */
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#define spin_is_locked(x)       (*(volatile signed char *)(&(x)->lock) <= 0)
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#define spin_unlock_wait(x)     do { barrier(); } while(spin_is_locked(x))
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#define spin_lock_string \
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        "\n1:\t" \
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        "lock ; decb %0\n\t" \
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        "js 2f\n" \
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        LOCK_SECTION_START("") \
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        "2:\t" \
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        "cmpb $0,%0\n\t" \
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        "rep;nop\n\t" \
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        "jle 2b\n\t" \
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        "jmp 1b\n" \
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        LOCK_SECTION_END
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/*
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 * This works. Despite all the confusion.
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 */
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#define spin_unlock_string \
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        "movb $1,%0"
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static inline int spin_trylock(spinlock_t *lock)
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{
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        char oldval;
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        __asm__ __volatile__(
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                "xchgb %b0,%1"
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                :"=q" (oldval), "=m" (lock->lock)
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                :"0" (0) : "memory");
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        return oldval > 0;
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}
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static inline void spin_lock(spinlock_t *lock)
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{
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#if SPINLOCK_DEBUG
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        __label__ here;
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here:
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        if (lock->magic != SPINLOCK_MAGIC) {
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printk("eip: %p\n", &&here);
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                out_of_line_bug();
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        }
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#endif
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        __asm__ __volatile__(
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                spin_lock_string
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                :"=m" (lock->lock) : : "memory");
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}
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static inline void spin_unlock(spinlock_t *lock)
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{
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#if SPINLOCK_DEBUG
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        if (lock->magic != SPINLOCK_MAGIC)
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                out_of_line_bug();
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        if (!spin_is_locked(lock))
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                out_of_line_bug();
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#endif
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        __asm__ __volatile__(
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                spin_unlock_string
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                :"=m" (lock->lock) : : "memory");
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}
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/*
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 * Read-write spinlocks, allowing multiple readers
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 * but only one writer.
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 *
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 * NOTE! it is quite common to have readers in interrupts
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 * but no interrupt writers. For those circumstances we
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 * can "mix" irq-safe locks - any writer needs to get a
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 * irq-safe write-lock, but readers can get non-irqsafe
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 * read-locks.
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 */
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typedef struct {
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        volatile unsigned int lock;
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#if SPINLOCK_DEBUG
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        unsigned magic;
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#endif
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} rwlock_t;
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#define RWLOCK_MAGIC    0xdeaf1eed
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#if SPINLOCK_DEBUG
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#define RWLOCK_MAGIC_INIT       , RWLOCK_MAGIC
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#else
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#define RWLOCK_MAGIC_INIT       /* */
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#endif
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#define RW_LOCK_UNLOCKED (rwlock_t) { RW_LOCK_BIAS RWLOCK_MAGIC_INIT }
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#define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
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/*
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 * On x86, we implement read-write locks as a 32-bit counter
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 * with the high bit (sign) being the "contended" bit.
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 *
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 * The inline assembly is non-obvious. Think about it.
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 *
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 * Changed to use the same technique as rw semaphores.  See
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 * semaphore.h for details.  -ben
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 */
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/* the spinlock helpers are in arch/x86_64/kernel/semaphore.S */
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extern inline void read_lock(rwlock_t *rw)
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{
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#if SPINLOCK_DEBUG
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        if (rw->magic != RWLOCK_MAGIC)
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                out_of_line_bug();
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#endif
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        __build_read_lock(rw, "__read_lock_failed");
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}
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static inline void write_lock(rwlock_t *rw)
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{
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#if SPINLOCK_DEBUG
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        if (rw->magic != RWLOCK_MAGIC)
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                out_of_line_bug();
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#endif
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        __build_write_lock(rw, "__write_lock_failed");
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}
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#define read_unlock(rw)         asm volatile("lock ; incl %0" :"=m" ((rw)->lock) : : "memory")
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#define write_unlock(rw)        asm volatile("lock ; addl $" RW_LOCK_BIAS_STR ",%0":"=m" ((rw)->lock) : : "memory")
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static inline int write_trylock(rwlock_t *lock)
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{
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        atomic_t *count = (atomic_t *)lock;
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        if (atomic_sub_and_test(RW_LOCK_BIAS, count))
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                return 1;
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        atomic_add(RW_LOCK_BIAS, count);
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        return 0;
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}
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#endif /* __ASM_SPINLOCK_H */

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