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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-x86_64/] [timex.h] - Blame information for rev 1765

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1 1275 phoenix
/*
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 * linux/include/asm-x8664/timex.h
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 *
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 * x8664 architecture timex specifications
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 */
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#ifndef _ASMx8664_TIMEX_H
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#define _ASMx8664_TIMEX_H
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#include <linux/config.h>
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#include <asm/msr.h>
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#include <asm/vsyscall.h>
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#define CLOCK_TICK_RATE (vxtime_hz)
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#define FINETUNE        ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
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                        1000000 / CLOCK_TICK_RATE) << (SHIFT_SCALE - SHIFT_HZ)) / HZ)
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/*
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 * We only use the low 32 bits, and we'd simply better make sure
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 * that we reschedule before that wraps. Scheduling at least every
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 * four billion cycles just basically sounds like a good idea,
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 * regardless of how fast the machine is.
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 */
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typedef unsigned long long cycles_t;
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extern cycles_t cacheflush_time;
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static inline cycles_t get_cycles (void)
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{
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        unsigned long long ret;
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        rdtscll(ret);
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        return ret;
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}
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extern unsigned int cpu_khz;
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/*
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 * Documentation on HPET can be found at:
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 *      http://www.intel.com/ial/home/sp/pcmmspec.htm
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 *      ftp://download.intel.com/ial/home/sp/mmts098.pdf
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 */
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#define HPET_ID         0x000
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#define HPET_PERIOD     0x004
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#define HPET_CFG        0x010
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#define HPET_STATUS     0x020
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#define HPET_COUNTER    0x0f0
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#define HPET_T0_CFG     0x100
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#define HPET_T0_CMP     0x108
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#define HPET_T0_ROUTE   0x110
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#define HPET_ID_VENDOR  0xffff0000
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#define HPET_ID_LEGSUP  0x00008000
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#define HPET_ID_NUMBER  0x00000f00
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#define HPET_ID_REV     0x000000ff
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#define HPET_CFG_ENABLE 0x001
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#define HPET_CFG_LEGACY 0x002
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#define HPET_T0_ENABLE          0x004
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#define HPET_T0_PERIODIC        0x008
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#define HPET_T0_SETVAL          0x040
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#define HPET_T0_32BIT           0x100
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extern struct vxtime_data vxtime;
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extern unsigned long vxtime_hz;
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extern unsigned long hpet_address;
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#endif

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