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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [video/] [s3blit.h] - Blame information for rev 1774

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Line No. Rev Author Line
1 1275 phoenix
#ifndef _VIDEO_S3BLIT_H
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#define _VIDEO_S3BLIT_H
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/* s3 commands */
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#define S3_BITBLT       0xc011
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#define S3_TWOPOINTLINE 0x2811
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#define S3_FILLEDRECT   0x40b1
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#define S3_FIFO_EMPTY 0x0400
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#define S3_HDW_BUSY   0x0200
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/* Enhanced register mapping (MMIO mode) */
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#define S3_READ_SEL      0xbee8 /* offset f */
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#define S3_MULT_MISC     0xbee8 /* offset e */
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#define S3_ERR_TERM      0x92e8
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#define S3_FRGD_COLOR    0xa6e8
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#define S3_BKGD_COLOR    0xa2e8
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#define S3_PIXEL_CNTL    0xbee8 /* offset a */
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#define S3_FRGD_MIX      0xbae8
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#define S3_BKGD_MIX      0xb6e8
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#define S3_CUR_Y         0x82e8
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#define S3_CUR_X         0x86e8
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#define S3_DESTY_AXSTP   0x8ae8
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#define S3_DESTX_DIASTP  0x8ee8
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#define S3_MIN_AXIS_PCNT 0xbee8 /* offset 0 */
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#define S3_MAJ_AXIS_PCNT 0x96e8
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#define S3_CMD           0x9ae8
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#define S3_GP_STAT       0x9ae8
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#define S3_ADVFUNC_CNTL  0x4ae8
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#define S3_WRT_MASK      0xaae8
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#define S3_RD_MASK       0xaee8
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/* Enhanced register mapping (Packed MMIO mode, write only) */
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#define S3_ALT_CURXY     0x8100
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#define S3_ALT_CURXY2    0x8104
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#define S3_ALT_STEP      0x8108
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#define S3_ALT_STEP2     0x810c
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#define S3_ALT_ERR       0x8110
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#define S3_ALT_CMD       0x8118
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#define S3_ALT_MIX       0x8134
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#define S3_ALT_PCNT      0x8148
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#define S3_ALT_PAT       0x8168
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/* Drawing modes */
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#define S3_NOTCUR          0x0000
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#define S3_LOGICALZERO     0x0001
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#define S3_LOGICALONE      0x0002
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#define S3_LEAVEASIS       0x0003
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#define S3_NOTNEW          0x0004
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#define S3_CURXORNEW       0x0005
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#define S3_NOT_CURXORNEW   0x0006
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#define S3_NEW             0x0007
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#define S3_NOTCURORNOTNEW  0x0008
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#define S3_CURORNOTNEW     0x0009
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#define S3_NOTCURORNEW     0x000a
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#define S3_CURORNEW        0x000b
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#define S3_CURANDNEW       0x000c
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#define S3_NOTCURANDNEW    0x000d
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#define S3_CURANDNOTNEW    0x000e
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#define S3_NOTCURANDNOTNEW 0x000f
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#define S3_CRTC_ADR    0x03d4
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#define S3_CRTC_DATA   0x03d5
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#define S3_REG_LOCK2 0x39
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#define S3_HGC_MODE  0x45
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#define S3_HWGC_ORGX_H 0x46
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#define S3_HWGC_ORGX_L 0x47
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#define S3_HWGC_ORGY_H 0x48
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#define S3_HWGC_ORGY_L 0x49
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#define S3_HWGC_DX     0x4e
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#define S3_HWGC_DY     0x4f
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#define S3_LAW_CTL 0x58
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#endif /* _VIDEO_S3BLIT_H */

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