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[/] [or1k/] [trunk/] [mp3/] [bench/] [models/] [vga_model.v] - Blame information for rev 1774

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1 266 lampret
`include "timescale.v"
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module vga_model (
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        pclk,
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        hsyncn,
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        vsyncn,
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        r,g,b
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        );
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input           pclk;
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input           hsyncn;
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input           vsyncn;
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input [1:0]      r;
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input [1:0]      g;
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input [1:0]      b;
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endmodule

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