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[/] [or1k/] [trunk/] [mp3/] [lib/] [xilinx/] [unisims/] [CY4_16.v] - Blame information for rev 1765

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1 266 lampret
// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/CY4_16.v,v 1.1.1.1 2001-11-04 18:59:46 lampret Exp $
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/*
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FUNCTION        : Carry modes functions
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*/
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`timescale  100 ps / 10 ps
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`celldefine
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module CY4_16 (C0, C1, C2, C3, C4, C5, C6, C7);
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    parameter cds_action = "ignore";
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    output C0, C1, C2, C3, C4, C5, C6, C7;
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        supply1 C7;
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        supply1 C6;
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        supply1 C5;
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        supply0 C4;
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        supply0 C3;
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        supply0 C2;
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        supply0 C1;
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        supply1 C0;
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endmodule
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`endcelldefine

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