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//////////////////////////////////////////////////////////////////////
////                                                              ////
////  Simple Small VGA IP Core                                    ////
////                                                              ////
////  This file is part of the Simple Small VGA project           ////
////                                                              ////
////                                                              ////
////  Description                                                 ////
////  Definitions.                                                ////
////                                                              ////
////  To Do:                                                      ////
////   Nothing                                                    ////
////                                                              ////
////  Author(s):                                                  ////
////      - Damjan Lampret, lampret@opencores.org                 ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.1.1.1  2001/10/06 10:19:09  igorm
// no message
//
//
// 14.4 MHz (400x320)
 
/*
`define PIXEL_NUM       'd128000 // 166668
`define SSVGA_HCW             10
`define SSVGA_VCW             10
`define SSVGA_HTOT          `SSVGA_HCW'd646
`define SSVGA_HPULSE      `SSVGA_HCW'd140
`define SSVGA_HFRONTP   `SSVGA_HCW'd53
`define SSVGA_HBACKP    `SSVGA_HCW'd53
 
`define SSVGA_VTOT          `SSVGA_VCW'd340
`define SSVGA_VPULSE      `SSVGA_VCW'd6
`define SSVGA_VFRONTP   `SSVGA_HCW'd2
`define SSVGA_VBACKP    `SSVGA_HCW'd2
`define SSVGA_VMCW          17
*/
 
// 10 MHz (400x320)
/*`define PIXEL_NUM       'd128000 // 166668
`define SSVGA_HCW             10
`define SSVGA_VCW             10
`define SSVGA_HTOT          `SSVGA_HCW'd516
`define SSVGA_HPULSE      `SSVGA_HCW'd90
`define SSVGA_HFRONTP   `SSVGA_HCW'd13
`define SSVGA_HBACKP    `SSVGA_HCW'd13
 
`define SSVGA_VTOT          `SSVGA_VCW'd323
`define SSVGA_VPULSE      `SSVGA_VCW'd1
`define SSVGA_VFRONTP   `SSVGA_HCW'd1
`define SSVGA_VBACKP    `SSVGA_HCW'd1
`define SSVGA_VMCW          17
*/
 
// 20 MHz (640x480)
//`define PIXEL_NUM       'd307200 // 333270
//`define SSVGA_HCW           10
//`define SSVGA_VCW           10
//`define SSVGA_HTOT        `SSVGA_HCW'd690
//`define SSVGA_HPULSE    `SSVGA_HCW'd40
//`define SSVGA_HFRONTP   `SSVGA_HCW'd5
//`define SSVGA_HBACKP    `SSVGA_HCW'd5
//
//`define SSVGA_VTOT        `SSVGA_VCW'd483
//`define SSVGA_VPULSE    `SSVGA_VCW'd1
//`define SSVGA_VFRONTP   `SSVGA_HCW'd1
//`define SSVGA_VBACKP    `SSVGA_HCW'd1
//`define SSVGA_VMCW        17
 
// 25 MHz (640x480) 
`define PIXEL_NUM       'd307200 // 383330 
`define SSVGA_HCW             10
`define SSVGA_VCW             10
`define SSVGA_HTOT          `SSVGA_HCW'd800
`define SSVGA_HPULSE      `SSVGA_HCW'd96
`define SSVGA_HFRONTP   `SSVGA_HCW'd48
`define SSVGA_HBACKP    `SSVGA_HCW'd16
 
`define SSVGA_VTOT          `SSVGA_VCW'd525
`define SSVGA_VPULSE      `SSVGA_VCW'd2
`define SSVGA_VFRONTP   `SSVGA_HCW'd10
`define SSVGA_VBACKP    `SSVGA_HCW'd33
`define SSVGA_VMCW          17
 
// 23 MHz (640x480) 
//`define PIXEL_NUM       'd307200 // 383330 
//`define SSVGA_HCW           10
//`define SSVGA_VCW           10
//`define SSVGA_HTOT        `SSVGA_HCW'd750
//`define SSVGA_HPULSE    `SSVGA_HCW'd90
//`define SSVGA_HFRONTP   `SSVGA_HCW'd10
//`define SSVGA_HBACKP    `SSVGA_HCW'd10
//
//`define SSVGA_VTOT        `SSVGA_VCW'd511
//`define SSVGA_VPULSE    `SSVGA_VCW'd4
//`define SSVGA_VFRONTP   `SSVGA_HCW'd12
//`define SSVGA_VBACKP    `SSVGA_HCW'd15
//`define SSVGA_VMCW        17
 
//`define XILINX_RAMB4

Line No.	Rev	Author	Line
1	266	lampret	`//////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// Simple Small VGA IP Core ////`
4			`//// ////`
5			`//// This file is part of the Simple Small VGA project ////`
6			`//// ////`
7			`//// ////`
8			`//// Description ////`
9			`//// Definitions. ////`
10			`//// ////`
11			`//// To Do: ////`
12			`//// Nothing ////`
13			`//// ////`
14			`//// Author(s): ////`
15			`//// - Damjan Lampret, lampret@opencores.org ////`
16			`//// ////`
17			`//////////////////////////////////////////////////////////////////////`
18			`//// ////`
19			`//// Copyright (C) 2000 Authors and OPENCORES.ORG ////`
20			`//// ////`
21			`//// This source file may be used and distributed without ////`
22			`//// restriction provided that this copyright statement is not ////`
23			`//// removed from the file and that any derivative work contains ////`
24			`//// the original copyright notice and the associated disclaimer. ////`
25			`//// ////`
26			`//// This source file is free software; you can redistribute it ////`
27			`//// and/or modify it under the terms of the GNU Lesser General ////`
28			`//// Public License as published by the Free Software Foundation; ////`
29			`//// either version 2.1 of the License, or (at your option) any ////`
30			`//// later version. ////`
31			`//// ////`
32			`//// This source is distributed in the hope that it will be ////`
33			`//// useful, but WITHOUT ANY WARRANTY; without even the implied ////`
34			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////`
35			`//// PURPOSE. See the GNU Lesser General Public License for more ////`
36			`//// details. ////`
37			`//// ////`
38			`//// You should have received a copy of the GNU Lesser General ////`
39			`//// Public License along with this source; if not, download it ////`
40			`//// from http://www.opencores.org/lgpl.shtml ////`
41			`//// ////`
42			`//////////////////////////////////////////////////////////////////////`
43			`//`
44			`// CVS Revision History`
45			`//`
46			`// $Log: not supported by cvs2svn $`
47			`// Revision 1.1.1.1 2001/10/06 10:19:09 igorm`
48			`// no message`
49			`//`
50			`//`
51			`// 14.4 MHz (400x320)`
52
53			`/*`
54			`define PIXEL_NUM 'd128000 // 166668
55			`define SSVGA_HCW 10
56			`define SSVGA_VCW 10
57			`define SSVGA_HTOT `SSVGA_HCW'd646
58			`define SSVGA_HPULSE `SSVGA_HCW'd140
59			`define SSVGA_HFRONTP `SSVGA_HCW'd53
60			`define SSVGA_HBACKP `SSVGA_HCW'd53
61
62			`define SSVGA_VTOT `SSVGA_VCW'd340
63			`define SSVGA_VPULSE `SSVGA_VCW'd6
64			`define SSVGA_VFRONTP `SSVGA_HCW'd2
65			`define SSVGA_VBACKP `SSVGA_HCW'd2
66			`define SSVGA_VMCW 17
67			`*/`
68
69			`// 10 MHz (400x320)`
70			/*`define PIXEL_NUM 'd128000 // 166668
71			`define SSVGA_HCW 10
72			`define SSVGA_VCW 10
73			`define SSVGA_HTOT `SSVGA_HCW'd516
74			`define SSVGA_HPULSE `SSVGA_HCW'd90
75			`define SSVGA_HFRONTP `SSVGA_HCW'd13
76			`define SSVGA_HBACKP `SSVGA_HCW'd13
77
78			`define SSVGA_VTOT `SSVGA_VCW'd323
79			`define SSVGA_VPULSE `SSVGA_VCW'd1
80			`define SSVGA_VFRONTP `SSVGA_HCW'd1
81			`define SSVGA_VBACKP `SSVGA_HCW'd1
82			`define SSVGA_VMCW 17
83			`*/`
84
85			`// 20 MHz (640x480)`
86			//`define PIXEL_NUM 'd307200 // 333270
87			//`define SSVGA_HCW 10
88			//`define SSVGA_VCW 10
89			//`define SSVGA_HTOT `SSVGA_HCW'd690
90			//`define SSVGA_HPULSE `SSVGA_HCW'd40
91			//`define SSVGA_HFRONTP `SSVGA_HCW'd5
92			//`define SSVGA_HBACKP `SSVGA_HCW'd5
93			`//`
94			//`define SSVGA_VTOT `SSVGA_VCW'd483
95			//`define SSVGA_VPULSE `SSVGA_VCW'd1
96			//`define SSVGA_VFRONTP `SSVGA_HCW'd1
97			//`define SSVGA_VBACKP `SSVGA_HCW'd1
98			//`define SSVGA_VMCW 17
99
100			`// 25 MHz (640x480)`
101			`define PIXEL_NUM 'd307200 // 383330
102			`define SSVGA_HCW 10
103			`define SSVGA_VCW 10
104			`define SSVGA_HTOT `SSVGA_HCW'd800
105			`define SSVGA_HPULSE `SSVGA_HCW'd96
106			`define SSVGA_HFRONTP `SSVGA_HCW'd48
107			`define SSVGA_HBACKP `SSVGA_HCW'd16
108
109			`define SSVGA_VTOT `SSVGA_VCW'd525
110			`define SSVGA_VPULSE `SSVGA_VCW'd2
111			`define SSVGA_VFRONTP `SSVGA_HCW'd10
112			`define SSVGA_VBACKP `SSVGA_HCW'd33
113			`define SSVGA_VMCW 17
114
115			`// 23 MHz (640x480)`
116			//`define PIXEL_NUM 'd307200 // 383330
117			//`define SSVGA_HCW 10
118			//`define SSVGA_VCW 10
119			//`define SSVGA_HTOT `SSVGA_HCW'd750
120			//`define SSVGA_HPULSE `SSVGA_HCW'd90
121			//`define SSVGA_HFRONTP `SSVGA_HCW'd10
122			//`define SSVGA_HBACKP `SSVGA_HCW'd10
123			`//`
124			//`define SSVGA_VTOT `SSVGA_VCW'd511
125			//`define SSVGA_VPULSE `SSVGA_VCW'd4
126			//`define SSVGA_VFRONTP `SSVGA_HCW'd12
127			//`define SSVGA_VBACKP `SSVGA_HCW'd15
128			//`define SSVGA_VMCW 17
129
130			//`define XILINX_RAMB4

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[/] [or1k/] [trunk/] [mp3/] [rtl/] [verilog/] [ssvga/] [ssvga_defines.v] - Blame information for rev 1765