OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [mp3/] [sw/] [console-xess/] [except.S] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 268 lampret 
        .section .reset
2 
        .extern _reset_support
3 
        .extern _src_beg
4 
        .extern _dst_beg
5 
        .extern _dst_end
6 
        .extern _c_reset
7 
 
8 
_reset:
9 
        l.nop
10 
        l.nop
11 
        l.movhi r0, 0x0
12 
        l.slli  r0,r0,16
13 
        l.addi  r1,r0,0x0
14 
        l.addi  r2,r0,0x0
15 
        l.addi  r3,r0,0x0
16 
        l.addi  r4,r0,0x0
17 
        l.addi  r5,r0,0x0
18 
        l.addi  r6,r0,0x0
19 
        l.addi  r7,r0,0x0
20 
        l.addi  r8,r0,0x0
21 
        l.addi  r9,r0,0x1234
22 
        l.addi  r10,r0,0x0
23 
        l.addi  r11,r0,0x0
24 
        l.addi  r12,r0,0x0
25 
        l.addi  r13,r0,0x0
26 
        l.addi  r14,r0,0x0
27 
        l.addi  r15,r0,0x0
28 
        l.addi  r16,r0,0x0
29 
        l.addi  r17,r0,0x0
30 
        l.addi  r18,r0,0x0
31 
        l.addi  r19,r0,0x0
32 
        l.addi  r20,r0,0x0
33 
        l.addi  r21,r0,0x0
34 
        l.addi  r22,r0,0x0
35 
        l.addi  r23,r0,0x0
36 
        l.addi  r24,r0,0x0
37 
        l.addi  r25,r0,0x0
38 
        l.addi  r26,r0,0x0
39 
        l.addi  r27,r0,0x0
40 
        l.addi  r28,r0,0x0
41 
        l.addi  r29,r0,0x0
42 
        l.addi  r30,r0,0x0
43 
        l.addi  r31,r0,0x0
44 
 
45 
        /* Copy form flash to sram */
46 
 
47 
        l.movhi r3,hi(_src_beg)
48 
        l.ori   r3,r3,lo(_src_beg)
49 
        l.movhi r4,hi(_dst_beg)
50 
        l.ori   r4,r4,lo(_dst_beg)
51 
        l.movhi r5,hi(_dst_end)
52 
        l.ori   r5,r5,lo(_dst_end)
53 
        l.sub   r5,r5,r4
54 
        l.sfeqi r5,0
55 
        l.bf    2f
56 
        l.nop
57 
1:      l.lwz   r6,0(r3)
58 
        l.sw    0(r4),r6
59 
        l.addi  r3,r3,4
60 
        l.addi  r4,r4,4
61 
        l.addi  r5,r5,-4
62 
        l.sfgtsi r5,0
63 
        l.bf    1b
64 
        l.nop
65 
 
66 
2:
67 
 
68 
        /* Verify sram data */
69 
/*      l.movhi r3,hi(_src_beg)
70 
        l.ori   r3,r3,lo(_src_beg)
71 
        l.addi  r3,r3,4
72 
        l.movhi r4,hi(_dst_beg)
73 
        l.ori   r4,r4,lo(_dst_beg)
74 
        l.addi  r4,r4,4
75 
        l.movhi r5,hi(_dst_end)
76 
        l.ori   r5,r5,lo(_dst_end)
77 
        l.sub   r5,r5,r4
78 
        l.sfeqi r5,0
79 
        l.bf    2f
80 
        l.nop
81 
1:      l.lwz   r6,0(r3)
82 
        l.lwz   r7,0(r4)
83 
        l.sfeq  r6,r7
84 
        l.bnf   img_err
85 
        l.nop
86 
        l.addi  r3,r3,4
87 
        l.addi  r4,r4,4
88 
        l.addi  r5,r5,-4
89 
        l.sfgtsi r5,0
90 
        l.bf    1b
91 
        l.nop
92 
2:
93 
*/
94 
        l.movhi r1,hi(0x80020000)
95 
        l.addi  r1,r1,lo(0x80020000)
96 
        l.addi  r1,r1,-4
97 
 
98 
        l.movhi r2,hi(_reset_support)
99 
        l.ori   r2,r2,lo(_reset_support)
100 
        l.jr    r2
101 
        l.addi  r2,r0,0
102 
 
103 
img_err:
104 
        l.movhi r15,hi(0x80000000)
105 
        l.addi  r15,r15,lo(0x80000000)
106 
 
107 
        l.addi  r8,r6,0
108 
        l.addi  r9,r7,0
109 
        l.addi  r10,r3,0
110 
        l.addi  r11,r4,0
111 
 
112 
        l.sw    0(r15),r8
113 
 
114 
        l.srli  r8,r8,8
115 
        l.sw    0(r15),r8
116 
 
117 
        l.srli  r8,r8,8
118 
        l.sw    0(r15),r8
119 
 
120 
        l.srli  r8,r8,8
121 
        l.sw    0(r15),r8
122 
 
123 
        l.sw    0(r15),r10
124 
 
125 
        l.srli  r10,r10,8
126 
        l.sw    0(r15),r10
127 
 
128 
        l.srli  r10,r10,8
129 
        l.sw    0(r15),r10
130 
 
131 
        l.srli  r10,r10,8
132 
        l.sw    0(r15),r10
133 
 
134 
 
135 
        l.sw    0(r15),r9
136 
 
137 
        l.srli  r9,r9,8
138 
        l.sw    0(r15),r9
139 
 
140 
        l.srli  r9,r9,8
141 
        l.sw    0(r15),r9
142 
 
143 
        l.srli  r9,r9,8
144 
        l.sw    0(r15),r9
145 
 
146 
        l.sw    0(r15),r11
147 
 
148 
        l.srli  r11,r11,8
149 
        l.sw    0(r15),r11
150 
 
151 
        l.srli  r11,r11,8
152 
        l.sw    0(r15),r11
153 
 
154 
        l.srli  r11,r11,8
155 
        l.sw    0(r15),r11
156 
 
157 
        l.addi  r8,r0,0xee
158 
        l.sw    0(r15),r8
159 
 
160 
        l.j     img_err
161 
        l.nop

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.