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[/] [or1k/] [trunk/] [mw/] [src/] [drivers/] [vgainit.c] - Blame information for rev 1780

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Line No. Rev Author Line
1 673 markom 
/*
2 
 * Copyright (c) 1999 Greg Haerr <greg@censoft.com>
3 
 * Copyright (c) 1991 David I. Bell
4 
 * Permission is granted to use, distribute, or modify this source,
5 
 * provided that this copyright notice remains intact.
6 
 *
7 
 * Alternate EGA/VGA Screen Driver Init, direct hw programming
8 
 */
9 
#include "device.h"
10 
#include "vgaplan4.h"
11 
 
12 
#ifdef __rtems__
13 
#define ROMFONT         0        /* =0 no bios rom fonts available*/
14 
#else
15 
#define ROMFONT         1       /* =1 uses PC rom fonts */
16 
#endif
17 
 
18 
/* Define one and only one of the following to be nonzero*/
19 
#define VGA_ET4000      0        /* TSENG LABS ET4000 chip 800x600*/
20 
#define VGA_STANDARD    1       /* standard VGA 640x480*/
21 
#define EGA_STANDARD    0        /* standard EGA 640x350*/
22 
 
23 
#define DONE    0
24 
#define IN      1
25 
#define OUT     2
26 
 
27 
#define RAM_SCAN_LINES  32      /* number of scan lines in fonts in RAM */
28 
#define FONT_CHARS      256     /* number of characters in font tables */
29 
#define CHAR_WIDTH      8       /* number of pixels for character width */
30 
 
31 
#define PALREG  0x3c0
32 
#define SEQREG  0x3c4
33 
#define SEQVAL  0x3c5
34 
#define GRREG   0x3ce
35 
#define GRVAL   0x3cf
36 
#define ATTRREG 0x3da
37 
#define CRTCREG 0x3d4
38 
#define CRTCVAL 0x3d5
39 
 
40 
#define GENREG1 0x3c2
41 
#define GENREG2 0x3cc
42 
#define GENREG3 0x3ca
43 
 
44 
#define DATA_ROTATE     3       /* register number for data rotate */
45 
 
46 
typedef struct {
47 
  int action;
48 
  int port1;
49 
  int data1;
50 
  int port2;
51 
  int data2;
52 
} REGIO;
53 
 
54 
/* extern data*/
55 
#if ROMFONT
56 
extern FARADDR          rom_char_addr;          /* address of ROM font*/
57 
extern int              ROM_CHAR_HEIGHT;        /* ROM character height*/
58 
#endif
59 
 
60 
/* local data*/
61 
extern REGIO            graphics_on[];
62 
extern REGIO            graph_off[];
63 
 
64 
/* entry points*/
65 
void            ega_hwinit(void);
66 
void            ega_hwterm(void);
67 
 
68 
/* local routines*/
69 
static void writeregs(REGIO *rp);
70 
static void out_word(unsigned int p,unsigned int d);
71 
static void setmode(int mode);
72 
 
73 
void
74 
ega_hwinit(void)
75 
{
76 
        writeregs(graphics_on);
77 
}
78 
 
79 
void
80 
ega_hwterm(void)
81 
{
82 
  setmode(MWMODE_COPY);
83 
 
84 
  /* Copy character table from ROM back into bit plane 2 before turning
85 
   * off graphics.
86 
   */
87 
  out_word(SEQREG, 0x0100);     /* syn reset */
88 
  out_word(SEQREG, 0x0402);     /* cpu writes only to map 2 */
89 
  out_word(SEQREG, 0x0704);     /* sequential addressing */
90 
  out_word(SEQREG, 0x0300);     /* clear synchronous reset */
91 
 
92 
  out_word(GRREG, 0x0204);      /* select map 2 for CPU reads */
93 
  out_word(GRREG, 0x0005);      /* disable odd-even addressing */
94 
 
95 
#if ROMFONT
96 
  {
97 
          FARADDR       srcoffset;
98 
          FARADDR       destoffset;
99 
          int           data;
100 
          int           ch;
101 
          int           row;
102 
 
103 
          srcoffset = rom_char_addr;
104 
          destoffset = EGA_BASE;
105 
          for (ch = 0; ch < FONT_CHARS; ch++) {
106 
                for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
107 
                        data = GETBYTE_FP(srcoffset++);
108 
                        PUTBYTE_FP(destoffset++, data);
109 
                }
110 
                destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
111 
          }
112 
  }
113 
#endif
114 
 
115 
  /* Finally set the registers back for text mode. */
116 
  writeregs(graph_off);
117 
}
118 
 
119 
/* Set the graphics registers as indicated by the given table */
120 
static void
121 
writeregs(REGIO *rp)
122 
{
123 
  for (; rp->action != DONE; rp++) {
124 
        switch (rp->action) {
125 
            case IN:
126 
                        inp(rp->port1);
127 
                        break;
128 
            case OUT:
129 
                        outp(rp->port1, rp->data1);
130 
                        if (rp->port2)
131 
                                outp(rp->port2, rp->data2);
132 
                        break;
133 
        }
134 
  }
135 
}
136 
 
137 
/* Output a word to an I/O port. */
138 
static void
139 
out_word(unsigned int p,unsigned int d)
140 
{
141 
  outp(p, d & 0xff);
142 
  outp(p + 1, (d >> 8) & 0xff);
143 
}
144 
 
145 
 
146 
/* Values for the data rotate register to implement drawing modes. */
147 
static unsigned char mode_table[MWMODE_MAX + 1] = {
148 
  0x00, 0x18, 0x10, 0x08,       /* COPY, XOR, AND, OR implemented*/
149 
  0x00, 0x00, 0x00, 0x00,       /* no VGA HW for other modes*/
150 
  0x00, 0x00, 0x00, 0x00,
151 
  0x00, 0x00, 0x00, 0x00,
152 
};
153 
 
154 
/* Set the drawing mode.
155 
 * This is either SET, OR, AND, or XOR.
156 
 */
157 
static void
158 
setmode(int mode)
159 
{
160 
  if (mode > MWMODE_MAX)
161 
        return;
162 
  outp(GRREG, DATA_ROTATE);
163 
  outp(GRVAL, mode_table[mode]);
164 
}
165 
 
166 
 
167 
#if VGA_ET4000
168 
 
169 
/* VGA 800x600 16-color graphics (BIOS mode 0x29).
170 
 */
171 
static REGIO graphics_on[] = {
172 
  /* Reset attr F/F */
173 
  IN, ATTRREG, 0, 0, 0,
174 
 
175 
  /* Disable palette */
176 
  OUT, PALREG, 0, 0, 0,
177 
 
178 
  /* Reset sequencer regs */
179 
  OUT, SEQREG, 0, SEQVAL, 0,
180 
  OUT, SEQREG, 1, SEQVAL, 1,
181 
  OUT, SEQREG, 2, SEQVAL, 0x0f,
182 
  OUT, SEQREG, 3, SEQVAL, 0,
183 
  OUT, SEQREG, 4, SEQVAL, 6,
184 
 
185 
  /* Misc out reg */
186 
  OUT, GENREG1, 0xe3, 0, 0,
187 
 
188 
  /* Sequencer enable */
189 
  OUT, SEQREG, 0, SEQVAL, 0x03,
190 
 
191 
  /* Unprotect crtc regs 0-7 */
192 
  OUT, CRTCREG, 0x11, CRTCVAL, 0,
193 
 
194 
  /* Crtc */
195 
  OUT, CRTCREG, 0, CRTCVAL, 0x7a,
196 
  OUT, CRTCREG, 1, CRTCVAL, 0x63,
197 
  OUT, CRTCREG, 2, CRTCVAL, 0x64,
198 
  OUT, CRTCREG, 3, CRTCVAL, 0x1d,
199 
  OUT, CRTCREG, 4, CRTCVAL, 0x68,
200 
  OUT, CRTCREG, 5, CRTCVAL, 0x9a,
201 
  OUT, CRTCREG, 6, CRTCVAL, 0x78,
202 
  OUT, CRTCREG, 7, CRTCVAL, 0xf0,
203 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,
204 
  OUT, CRTCREG, 9, CRTCVAL, 0x60,
205 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,
206 
  OUT, CRTCREG, 11, CRTCVAL, 0x00,
207 
  OUT, CRTCREG, 12, CRTCVAL, 0x00,
208 
  OUT, CRTCREG, 13, CRTCVAL, 0x00,
209 
  OUT, CRTCREG, 14, CRTCVAL, 0x00,
210 
  OUT, CRTCREG, 15, CRTCVAL, 0x00,
211 
  OUT, CRTCREG, 16, CRTCVAL, 0x5c,
212 
  OUT, CRTCREG, 17, CRTCVAL, 0x8e,
213 
  OUT, CRTCREG, 18, CRTCVAL, 0x57,
214 
  OUT, CRTCREG, 19, CRTCVAL, 0x32,
215 
  OUT, CRTCREG, 20, CRTCVAL, 0x00,
216 
  OUT, CRTCREG, 21, CRTCVAL, 0x5b,
217 
  OUT, CRTCREG, 22, CRTCVAL, 0x75,
218 
  OUT, CRTCREG, 23, CRTCVAL, 0xc3,
219 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,
220 
 
221 
  /* Graphics controller */
222 
  OUT, GENREG2, 0x00, 0, 0,
223 
  OUT, GENREG3, 0x01, 0, 0,
224 
  OUT, GRREG, 0, GRVAL, 0x00,
225 
  OUT, GRREG, 1, GRVAL, 0x00,
226 
  OUT, GRREG, 2, GRVAL, 0x00,
227 
  OUT, GRREG, 3, GRVAL, 0x00,
228 
  OUT, GRREG, 4, GRVAL, 0x00,
229 
  OUT, GRREG, 5, GRVAL, 0x00,
230 
  OUT, GRREG, 6, GRVAL, 0x05,
231 
  OUT, GRREG, 7, GRVAL, 0x0f,
232 
  OUT, GRREG, 8, GRVAL, 0xff,
233 
 
234 
  /* Reset attribute flip/flop */
235 
  IN, ATTRREG, 0, 0, 0,
236 
 
237 
  /* Palette */
238 
  OUT, PALREG, 0, PALREG, 0x00,
239 
  OUT, PALREG, 1, PALREG, 0x01,
240 
  OUT, PALREG, 2, PALREG, 0x02,
241 
  OUT, PALREG, 3, PALREG, 0x03,
242 
  OUT, PALREG, 4, PALREG, 0x04,
243 
  OUT, PALREG, 5, PALREG, 0x05,
244 
  OUT, PALREG, 6, PALREG, 0x06,
245 
  OUT, PALREG, 7, PALREG, 0x07,
246 
  OUT, PALREG, 8, PALREG, 0x38,
247 
  OUT, PALREG, 9, PALREG, 0x39,
248 
  OUT, PALREG, 10, PALREG, 0x3a,
249 
  OUT, PALREG, 11, PALREG, 0x3b,
250 
  OUT, PALREG, 12, PALREG, 0x3c,
251 
  OUT, PALREG, 13, PALREG, 0x3d,
252 
  OUT, PALREG, 14, PALREG, 0x3e,
253 
  OUT, PALREG, 15, PALREG, 0x3f,
254 
  OUT, PALREG, 16, PALREG, 0x01,
255 
  OUT, PALREG, 17, PALREG, 0x00,
256 
  OUT, PALREG, 18, PALREG, 0x0f,
257 
  OUT, PALREG, 19, PALREG, 0x00,
258 
 
259 
  /* Enable palette */
260 
  OUT, PALREG, 0x20, 0, 0,
261 
 
262 
  /* End of table */
263 
  DONE, 0, 0, 0, 0
264 
};
265 
 
266 
 
267 
/* VGA 80x25 text (BIOS mode 3).
268 
 */
269 
static REGIO graph_off[] = {
270 
  /* Reset attr F/F */
271 
  IN, ATTRREG, 0, 0, 0,
272 
 
273 
  /* Disable palette */
274 
  OUT, PALREG, 0, 0, 0,
275 
 
276 
  /* Reset sequencer regs */
277 
  OUT, SEQREG, 0, SEQVAL, 1,
278 
  OUT, SEQREG, 1, SEQVAL, 1,
279 
  OUT, SEQREG, 2, SEQVAL, 3,
280 
  OUT, SEQREG, 3, SEQVAL, 0,
281 
  OUT, SEQREG, 4, SEQVAL, 2,
282 
 
283 
  /* Misc out reg */
284 
  OUT, GENREG1, 0x63, 0, 0,
285 
 
286 
  /* Sequencer enable */
287 
  OUT, SEQREG, 0, SEQVAL, 3,
288 
 
289 
  /* Unprotect crtc regs 0-7 */
290 
  OUT, CRTCREG, 0x11, CRTCVAL, 0,
291 
 
292 
  /* Crtc */
293 
  OUT, CRTCREG, 0, CRTCVAL, 0x5f,        /* horiz total */
294 
  OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
295 
  OUT, CRTCREG, 2, CRTCVAL, 0x50,       /* horiz blank */
296 
  OUT, CRTCREG, 3, CRTCVAL, 0x82,       /* end blank */
297 
  OUT, CRTCREG, 4, CRTCVAL, 0x55,       /* horiz retrace */
298 
  OUT, CRTCREG, 5, CRTCVAL, 0x81,       /* end retrace */
299 
  OUT, CRTCREG, 6, CRTCVAL, 0xbf,       /* vert total */
300 
  OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
301 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
302 
  OUT, CRTCREG, 9, CRTCVAL, 0x4f,       /* max scan line */
303 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
304 
  OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
305 
  OUT, CRTCREG, 12, CRTCVAL, 0x0e,      /* start high addr */
306 
  OUT, CRTCREG, 13, CRTCVAL, 0xb0,      /* low addr */
307 
  OUT, CRTCREG, 14, CRTCVAL, 0x16,      /* cursor high */
308 
  OUT, CRTCREG, 15, CRTCVAL, 0x30,      /* cursor low */
309 
  OUT, CRTCREG, 16, CRTCVAL, 0x9c,      /* vert retrace */
310 
  OUT, CRTCREG, 17, CRTCVAL, 0x8e,      /* retrace end */
311 
  OUT, CRTCREG, 18, CRTCVAL, 0x8f,      /* vert end */
312 
  OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
313 
  OUT, CRTCREG, 20, CRTCVAL, 0x1f,      /* underline */
314 
  OUT, CRTCREG, 21, CRTCVAL, 0x96,      /* vert blank */
315 
  OUT, CRTCREG, 22, CRTCVAL, 0xb9,      /* end blank */
316 
  OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
317 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
318 
 
319 
  /* Graphics controller */
320 
  OUT, GENREG2, 0x00, 0, 0,
321 
  OUT, GENREG3, 0x01, 0, 0,
322 
  OUT, GRREG, 0, GRVAL, 0x00,
323 
  OUT, GRREG, 1, GRVAL, 0x00,
324 
  OUT, GRREG, 2, GRVAL, 0x00,
325 
  OUT, GRREG, 3, GRVAL, 0x00,
326 
  OUT, GRREG, 4, GRVAL, 0x00,
327 
  OUT, GRREG, 5, GRVAL, 0x10,
328 
  OUT, GRREG, 6, GRVAL, 0x0e,
329 
  OUT, GRREG, 7, GRVAL, 0x00,
330 
  OUT, GRREG, 8, GRVAL, 0xff,
331 
 
332 
  /* Reset attribute flip/flop */
333 
  IN, ATTRREG, 0, 0, 0,
334 
 
335 
  /* Palette */
336 
  OUT, PALREG, 0, PALREG, 0x00,
337 
  OUT, PALREG, 1, PALREG, 0x01,
338 
  OUT, PALREG, 2, PALREG, 0x02,
339 
  OUT, PALREG, 3, PALREG, 0x03,
340 
  OUT, PALREG, 4, PALREG, 0x04,
341 
  OUT, PALREG, 5, PALREG, 0x05,
342 
  OUT, PALREG, 6, PALREG, 0x06,
343 
  OUT, PALREG, 7, PALREG, 0x07,
344 
  OUT, PALREG, 8, PALREG, 0x10,
345 
  OUT, PALREG, 9, PALREG, 0x11,
346 
  OUT, PALREG, 10, PALREG, 0x12,
347 
  OUT, PALREG, 11, PALREG, 0x13,
348 
  OUT, PALREG, 12, PALREG, 0x14,
349 
  OUT, PALREG, 13, PALREG, 0x15,
350 
  OUT, PALREG, 14, PALREG, 0x16,
351 
  OUT, PALREG, 15, PALREG, 0x17,
352 
  OUT, PALREG, 16, PALREG, 0x08,
353 
  OUT, PALREG, 17, PALREG, 0x00,
354 
  OUT, PALREG, 18, PALREG, 0x0f,
355 
  OUT, PALREG, 19, PALREG, 0x00,
356 
 
357 
  /* Enable palette */
358 
  OUT, PALREG, 0x20, 0, 0,
359 
 
360 
  /* End of table */
361 
  DONE, 0, 0, 0, 0
362 
};
363 
 
364 
#endif
365 
 
366 
 
367 
#if VGA_STANDARD
368 
 
369 
/* VGA 640x480 16-color graphics (BIOS mode 0x12).
370 
 */
371 
static REGIO graphics_on[] = {
372 
  /* Reset attr F/F */
373 
  IN, ATTRREG, 0, 0, 0,
374 
 
375 
  /* Disable palette */
376 
  OUT, PALREG, 0, 0, 0,
377 
 
378 
  /* Reset sequencer regs */
379 
  OUT, SEQREG, 0, SEQVAL, 0,
380 
  OUT, SEQREG, 1, SEQVAL, 1,
381 
  OUT, SEQREG, 2, SEQVAL, 0x0f,
382 
  OUT, SEQREG, 3, SEQVAL, 0,
383 
  OUT, SEQREG, 4, SEQVAL, 6,
384 
 
385 
  /* Misc out reg */
386 
  OUT, GENREG1, 0xe3, 0, 0,
387 
 
388 
  /* Sequencer enable */
389 
  OUT, SEQREG, 0, SEQVAL, 0x03,
390 
 
391 
  /* Unprotect crtc regs 0-7 */
392 
  OUT, CRTCREG, 0x11, CRTCVAL, 0,
393 
 
394 
  /* Crtc */
395 
  OUT, CRTCREG, 0, CRTCVAL, 0x5f,
396 
  OUT, CRTCREG, 1, CRTCVAL, 0x4f,
397 
  OUT, CRTCREG, 2, CRTCVAL, 0x50,
398 
  OUT, CRTCREG, 3, CRTCVAL, 0x82,
399 
  OUT, CRTCREG, 4, CRTCVAL, 0x54,
400 
  OUT, CRTCREG, 5, CRTCVAL, 0x80,
401 
  OUT, CRTCREG, 6, CRTCVAL, 0x0b,
402 
  OUT, CRTCREG, 7, CRTCVAL, 0x3e,
403 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,
404 
  OUT, CRTCREG, 9, CRTCVAL, 0x40,
405 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,
406 
  OUT, CRTCREG, 11, CRTCVAL, 0x00,
407 
  OUT, CRTCREG, 12, CRTCVAL, 0x00,
408 
  OUT, CRTCREG, 13, CRTCVAL, 0x00,
409 
  OUT, CRTCREG, 14, CRTCVAL, 0x00,
410 
  OUT, CRTCREG, 15, CRTCVAL, 0x59,
411 
  OUT, CRTCREG, 16, CRTCVAL, 0xea,
412 
  OUT, CRTCREG, 17, CRTCVAL, 0x8c,
413 
  OUT, CRTCREG, 18, CRTCVAL, 0xdf,
414 
  OUT, CRTCREG, 19, CRTCVAL, 0x28,
415 
  OUT, CRTCREG, 20, CRTCVAL, 0x00,
416 
  OUT, CRTCREG, 21, CRTCVAL, 0xe7,
417 
  OUT, CRTCREG, 22, CRTCVAL, 0x04,
418 
  OUT, CRTCREG, 23, CRTCVAL, 0xe3,
419 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,
420 
 
421 
  /* Graphics controller */
422 
  OUT, GENREG2, 0x00, 0, 0,
423 
  OUT, GENREG3, 0x01, 0, 0,
424 
  OUT, GRREG, 0, GRVAL, 0x00,
425 
  OUT, GRREG, 1, GRVAL, 0x00,
426 
  OUT, GRREG, 2, GRVAL, 0x00,
427 
  OUT, GRREG, 3, GRVAL, 0x00,
428 
  OUT, GRREG, 4, GRVAL, 0x00,
429 
  OUT, GRREG, 5, GRVAL, 0x00,
430 
  OUT, GRREG, 6, GRVAL, 0x05,
431 
  OUT, GRREG, 7, GRVAL, 0x0f,
432 
  OUT, GRREG, 8, GRVAL, 0xff,
433 
 
434 
  /* Reset attribute flip/flop */
435 
  IN, ATTRREG, 0, 0, 0,
436 
 
437 
  /* Palette */
438 
  OUT, PALREG, 0, PALREG, 0x00,
439 
  OUT, PALREG, 1, PALREG, 0x01,
440 
  OUT, PALREG, 2, PALREG, 0x02,
441 
  OUT, PALREG, 3, PALREG, 0x03,
442 
  OUT, PALREG, 4, PALREG, 0x04,
443 
  OUT, PALREG, 5, PALREG, 0x05,
444 
  OUT, PALREG, 6, PALREG, 0x06,
445 
  OUT, PALREG, 7, PALREG, 0x07,
446 
  OUT, PALREG, 8, PALREG, 0x38,
447 
  OUT, PALREG, 9, PALREG, 0x39,
448 
  OUT, PALREG, 10, PALREG, 0x3a,
449 
  OUT, PALREG, 11, PALREG, 0x3b,
450 
  OUT, PALREG, 12, PALREG, 0x3c,
451 
  OUT, PALREG, 13, PALREG, 0x3d,
452 
  OUT, PALREG, 14, PALREG, 0x3e,
453 
  OUT, PALREG, 15, PALREG, 0x3f,
454 
  OUT, PALREG, 16, PALREG, 0x01,
455 
  OUT, PALREG, 17, PALREG, 0x00,
456 
  OUT, PALREG, 18, PALREG, 0x0f,
457 
  OUT, PALREG, 19, PALREG, 0x00,
458 
 
459 
  /* Enable palette */
460 
  OUT, PALREG, 0x20, 0, 0,
461 
 
462 
  /* End of table */
463 
  DONE, 0, 0, 0, 0
464 
};
465 
 
466 
 
467 
/* VGA 80x25 text (BIOS mode 3).
468 
 */
469 
static REGIO graph_off[] = {
470 
  /* Reset attr F/F */
471 
  IN, ATTRREG, 0, 0, 0,
472 
 
473 
  /* Disable palette */
474 
  OUT, PALREG, 0, 0, 0,
475 
 
476 
  /* Reset sequencer regs */
477 
  OUT, SEQREG, 0, SEQVAL, 1,
478 
  OUT, SEQREG, 1, SEQVAL, 1,
479 
  OUT, SEQREG, 2, SEQVAL, 3,
480 
  OUT, SEQREG, 3, SEQVAL, 0,
481 
  OUT, SEQREG, 4, SEQVAL, 2,
482 
 
483 
  /* Misc out reg */
484 
  OUT, GENREG1, 0x63, 0, 0,
485 
 
486 
  /* Sequencer enable */
487 
  OUT, SEQREG, 0, SEQVAL, 3,
488 
 
489 
  /* Unprotect crtc regs 0-7 */
490 
  OUT, CRTCREG, 0x11, CRTCVAL, 0,
491 
 
492 
  /* Crtc */
493 
  OUT, CRTCREG, 0, CRTCVAL, 0x5f,        /* horiz total */
494 
  OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
495 
  OUT, CRTCREG, 2, CRTCVAL, 0x50,       /* horiz blank */
496 
  OUT, CRTCREG, 3, CRTCVAL, 0x82,       /* end blank */
497 
  OUT, CRTCREG, 4, CRTCVAL, 0x55,       /* horiz retrace */
498 
  OUT, CRTCREG, 5, CRTCVAL, 0x81,       /* end retrace */
499 
  OUT, CRTCREG, 6, CRTCVAL, 0xbf,       /* vert total */
500 
  OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
501 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
502 
  OUT, CRTCREG, 9, CRTCVAL, 0x4f,       /* max scan line */
503 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
504 
  OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
505 
  OUT, CRTCREG, 12, CRTCVAL, 0x0e,      /* start high addr */
506 
  OUT, CRTCREG, 13, CRTCVAL, 0xb0,      /* low addr */
507 
  OUT, CRTCREG, 14, CRTCVAL, 0x16,      /* cursor high */
508 
  OUT, CRTCREG, 15, CRTCVAL, 0x30,      /* cursor low */
509 
  OUT, CRTCREG, 16, CRTCVAL, 0x9c,      /* vert retrace */
510 
  OUT, CRTCREG, 17, CRTCVAL, 0x8e,      /* retrace end */
511 
  OUT, CRTCREG, 18, CRTCVAL, 0x8f,      /* vert end */
512 
  OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
513 
  OUT, CRTCREG, 20, CRTCVAL, 0x1f,      /* underline */
514 
  OUT, CRTCREG, 21, CRTCVAL, 0x96,      /* vert blank */
515 
  OUT, CRTCREG, 22, CRTCVAL, 0xb9,      /* end blank */
516 
  OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
517 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
518 
 
519 
  /* Graphics controller */
520 
  OUT, GENREG2, 0x00, 0, 0,
521 
  OUT, GENREG3, 0x01, 0, 0,
522 
  OUT, GRREG, 0, GRVAL, 0x00,
523 
  OUT, GRREG, 1, GRVAL, 0x00,
524 
  OUT, GRREG, 2, GRVAL, 0x00,
525 
  OUT, GRREG, 3, GRVAL, 0x00,
526 
  OUT, GRREG, 4, GRVAL, 0x00,
527 
  OUT, GRREG, 5, GRVAL, 0x10,
528 
  OUT, GRREG, 6, GRVAL, 0x0e,
529 
  OUT, GRREG, 7, GRVAL, 0x00,
530 
  OUT, GRREG, 8, GRVAL, 0xff,
531 
 
532 
  /* Reset attribute flip/flop */
533 
  IN, ATTRREG, 0, 0, 0,
534 
 
535 
  /* Palette */
536 
  OUT, PALREG, 0, PALREG, 0x00,
537 
  OUT, PALREG, 1, PALREG, 0x01,
538 
  OUT, PALREG, 2, PALREG, 0x02,
539 
  OUT, PALREG, 3, PALREG, 0x03,
540 
  OUT, PALREG, 4, PALREG, 0x04,
541 
  OUT, PALREG, 5, PALREG, 0x05,
542 
  OUT, PALREG, 6, PALREG, 0x06,
543 
  OUT, PALREG, 7, PALREG, 0x07,
544 
  OUT, PALREG, 8, PALREG, 0x10,
545 
  OUT, PALREG, 9, PALREG, 0x11,
546 
  OUT, PALREG, 10, PALREG, 0x12,
547 
  OUT, PALREG, 11, PALREG, 0x13,
548 
  OUT, PALREG, 12, PALREG, 0x14,
549 
  OUT, PALREG, 13, PALREG, 0x15,
550 
  OUT, PALREG, 14, PALREG, 0x16,
551 
  OUT, PALREG, 15, PALREG, 0x17,
552 
  OUT, PALREG, 16, PALREG, 0x08,
553 
  OUT, PALREG, 17, PALREG, 0x00,
554 
  OUT, PALREG, 18, PALREG, 0x0f,
555 
  OUT, PALREG, 19, PALREG, 0x00,
556 
 
557 
  /* Enable palette */
558 
  OUT, PALREG, 0x20, 0, 0,
559 
 
560 
  /* End of table */
561 
  DONE, 0, 0, 0, 0
562 
};
563 
 
564 
#endif
565 
 
566 
 
567 
#if EGA_STANDARD
568 
 
569 
/* EGA 640x350 16-color graphics (BIOS mode 0x10).
570 
 */
571 
static REGIO graphics_on[] = {
572 
  /* Reset attr F/F */
573 
  IN, ATTRREG, 0, 0, 0,
574 
 
575 
  /* Disable palette */
576 
  OUT, PALREG, 0, 0, 0,
577 
 
578 
  /* Reset sequencer regs */
579 
  OUT, SEQREG, 0, SEQVAL, 0,
580 
  OUT, SEQREG, 1, SEQVAL, 1,
581 
  OUT, SEQREG, 2, SEQVAL, 0x0f,
582 
  OUT, SEQREG, 3, SEQVAL, 0,
583 
  OUT, SEQREG, 4, SEQVAL, 6,
584 
 
585 
  /* Misc out reg */
586 
  OUT, GENREG1, 0xa7, 0, 0,
587 
 
588 
  /* Sequencer enable */
589 
  OUT, SEQREG, 0, SEQVAL, 0x03,
590 
 
591 
  /* Unprotect crtc regs 0-7 */
592 
  OUT, CRTCREG, 0x11, CRTCVAL, 0,
593 
 
594 
  /* Crtc */
595 
  OUT, CRTCREG, 0, CRTCVAL, 0x5b,
596 
  OUT, CRTCREG, 1, CRTCVAL, 0x4f,
597 
  OUT, CRTCREG, 2, CRTCVAL, 0x53,
598 
  OUT, CRTCREG, 3, CRTCVAL, 0x37,
599 
  OUT, CRTCREG, 4, CRTCVAL, 0x52,
600 
  OUT, CRTCREG, 5, CRTCVAL, 0x00,
601 
  OUT, CRTCREG, 6, CRTCVAL, 0x6c,
602 
  OUT, CRTCREG, 7, CRTCVAL, 0x1f,
603 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,
604 
  OUT, CRTCREG, 9, CRTCVAL, 0x00,
605 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,
606 
  OUT, CRTCREG, 11, CRTCVAL, 0x00,
607 
  OUT, CRTCREG, 12, CRTCVAL, 0x00,
608 
  OUT, CRTCREG, 13, CRTCVAL, 0x00,
609 
  OUT, CRTCREG, 14, CRTCVAL, 0x00,
610 
  OUT, CRTCREG, 15, CRTCVAL, 0x00,
611 
  OUT, CRTCREG, 16, CRTCVAL, 0x5e,
612 
  OUT, CRTCREG, 17, CRTCVAL, 0x2b,
613 
  OUT, CRTCREG, 18, CRTCVAL, 0x5d,
614 
  OUT, CRTCREG, 19, CRTCVAL, 0x28,
615 
  OUT, CRTCREG, 20, CRTCVAL, 0x0f,
616 
  OUT, CRTCREG, 21, CRTCVAL, 0x5f,
617 
  OUT, CRTCREG, 22, CRTCVAL, 0x0a,
618 
  OUT, CRTCREG, 23, CRTCVAL, 0xe3,
619 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,
620 
 
621 
  /* Graphics controller */
622 
  OUT, GENREG2, 0x00, 0, 0,
623 
  OUT, GENREG3, 0x01, 0, 0,
624 
  OUT, GRREG, 0, GRVAL, 0x00,
625 
  OUT, GRREG, 1, GRVAL, 0x00,
626 
  OUT, GRREG, 2, GRVAL, 0x00,
627 
  OUT, GRREG, 3, GRVAL, 0x00,
628 
  OUT, GRREG, 4, GRVAL, 0x00,
629 
  OUT, GRREG, 5, GRVAL, 0x00,
630 
  OUT, GRREG, 6, GRVAL, 0x05,
631 
  OUT, GRREG, 7, GRVAL, 0x0f,
632 
  OUT, GRREG, 8, GRVAL, 0xff,
633 
 
634 
  /* Reset attribute flip/flop */
635 
  IN, ATTRREG, 0, 0, 0,
636 
 
637 
  /* Palette */
638 
  OUT, PALREG, 0, PALREG, 0x00,
639 
  OUT, PALREG, 1, PALREG, 0x01,
640 
  OUT, PALREG, 2, PALREG, 0x02,
641 
  OUT, PALREG, 3, PALREG, 0x03,
642 
  OUT, PALREG, 4, PALREG, 0x04,
643 
  OUT, PALREG, 5, PALREG, 0x05,
644 
  OUT, PALREG, 6, PALREG, 0x06,
645 
  OUT, PALREG, 7, PALREG, 0x07,
646 
  OUT, PALREG, 8, PALREG, 0x38,
647 
  OUT, PALREG, 9, PALREG, 0x39,
648 
  OUT, PALREG, 10, PALREG, 0x3a,
649 
  OUT, PALREG, 11, PALREG, 0x3b,
650 
  OUT, PALREG, 12, PALREG, 0x3c,
651 
  OUT, PALREG, 13, PALREG, 0x3d,
652 
  OUT, PALREG, 14, PALREG, 0x3e,
653 
  OUT, PALREG, 15, PALREG, 0x3f,
654 
  OUT, PALREG, 16, PALREG, 0x01,
655 
  OUT, PALREG, 17, PALREG, 0x00,
656 
  OUT, PALREG, 18, PALREG, 0x0f,
657 
  OUT, PALREG, 19, PALREG, 0x00,
658 
 
659 
  /* Enable palette */
660 
  OUT, PALREG, 0x20, 0, 0,
661 
 
662 
  /* End of table */
663 
  DONE, 0, 0, 0, 0
664 
};
665 
 
666 
 
667 
/* EGA 80x25 text (BIOS mode 3).
668 
 */
669 
static REGIO graph_off[] = {
670 
  /* Reset attr F/F */
671 
  IN, ATTRREG, 0, 0, 0,
672 
 
673 
  /* Disable palette */
674 
  OUT, PALREG, 0, 0, 0,
675 
 
676 
  /* Reset sequencer regs */
677 
  OUT, SEQREG, 0, SEQVAL, 1,
678 
  OUT, SEQREG, 1, SEQVAL, 1,
679 
  OUT, SEQREG, 2, SEQVAL, 3,
680 
  OUT, SEQREG, 3, SEQVAL, 0,
681 
  OUT, SEQREG, 4, SEQVAL, 3,
682 
 
683 
  /* Misc out reg */
684 
  OUT, GENREG1, 0xa7, 0, 0,
685 
 
686 
  /* Sequencer enable */
687 
  OUT, SEQREG, 0, SEQVAL, 3,
688 
 
689 
  /* Crtc */
690 
  OUT, CRTCREG, 0, CRTCVAL, 0x5b,        /* horiz total */
691 
  OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
692 
  OUT, CRTCREG, 2, CRTCVAL, 0x53,       /* horiz blank */
693 
  OUT, CRTCREG, 3, CRTCVAL, 0x37,       /* end blank */
694 
  OUT, CRTCREG, 4, CRTCVAL, 0x51,       /* horiz retrace */
695 
  OUT, CRTCREG, 5, CRTCVAL, 0x5b,       /* end retrace */
696 
  OUT, CRTCREG, 6, CRTCVAL, 0x6c,       /* vert total */
697 
  OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
698 
  OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
699 
  OUT, CRTCREG, 9, CRTCVAL, 0x0d,       /* max scan line */
700 
  OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
701 
  OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
702 
  OUT, CRTCREG, 12, CRTCVAL, 0x00,      /* start high addr */
703 
  OUT, CRTCREG, 13, CRTCVAL, 0x00,      /* low addr */
704 
  OUT, CRTCREG, 14, CRTCVAL, 0x00,      /* cursor high */
705 
  OUT, CRTCREG, 15, CRTCVAL, 0x00,      /* cursor low */
706 
  OUT, CRTCREG, 16, CRTCVAL, 0x5e,      /* vert retrace */
707 
  OUT, CRTCREG, 17, CRTCVAL, 0x2b,      /* retrace end */
708 
  OUT, CRTCREG, 18, CRTCVAL, 0x5d,      /* vert end */
709 
  OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
710 
  OUT, CRTCREG, 20, CRTCVAL, 0x0f,      /* underline */
711 
  OUT, CRTCREG, 21, CRTCVAL, 0x5e,      /* vert blank */
712 
  OUT, CRTCREG, 22, CRTCVAL, 0x0a,      /* end blank */
713 
  OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
714 
  OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
715 
 
716 
  /* Graphics controller */
717 
  OUT, GENREG2, 0x00, 0, 0,
718 
  OUT, GENREG3, 0x01, 0, 0,
719 
  OUT, GRREG, 0, GRVAL, 0x00,
720 
  OUT, GRREG, 1, GRVAL, 0x00,
721 
  OUT, GRREG, 2, GRVAL, 0x00,
722 
  OUT, GRREG, 3, GRVAL, 0x00,
723 
  OUT, GRREG, 4, GRVAL, 0x00,
724 
  OUT, GRREG, 5, GRVAL, 0x10,
725 
  OUT, GRREG, 6, GRVAL, 0x0e,
726 
  OUT, GRREG, 7, GRVAL, 0x00,
727 
  OUT, GRREG, 8, GRVAL, 0xff,
728 
 
729 
  /* Reset attribute flip/flop */
730 
  IN, ATTRREG, 0, 0, 0,
731 
 
732 
  /* Palette */
733 
  OUT, PALREG, 0, PALREG, 0x00,
734 
  OUT, PALREG, 1, PALREG, 0x01,
735 
  OUT, PALREG, 2, PALREG, 0x02,
736 
  OUT, PALREG, 3, PALREG, 0x03,
737 
  OUT, PALREG, 4, PALREG, 0x04,
738 
  OUT, PALREG, 5, PALREG, 0x05,
739 
  OUT, PALREG, 6, PALREG, 0x14,
740 
  OUT, PALREG, 7, PALREG, 0x07,
741 
  OUT, PALREG, 8, PALREG, 0x38,
742 
  OUT, PALREG, 9, PALREG, 0x39,
743 
  OUT, PALREG, 10, PALREG, 0x3a,
744 
  OUT, PALREG, 11, PALREG, 0x3b,
745 
  OUT, PALREG, 12, PALREG, 0x3c,
746 
  OUT, PALREG, 13, PALREG, 0x3d,
747 
  OUT, PALREG, 14, PALREG, 0x3e,
748 
  OUT, PALREG, 15, PALREG, 0x3f,
749 
  OUT, PALREG, 16, PALREG, 0x08,
750 
  OUT, PALREG, 17, PALREG, 0x00,
751 
  OUT, PALREG, 18, PALREG, 0x0f,
752 
  OUT, PALREG, 19, PALREG, 0x00,
753 
 
754 
  /* Enable palette */
755 
  OUT, PALREG, 0x20, 0, 0,
756 
 
757 
  /* End of table */
758 
  DONE, 0, 0, 0, 0
759 
};
760 
 
761 
#endif

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