| 1 |
39 |
lampret |
*** Registers
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| 2 |
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GR0 *always zero
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| 3 |
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GR1 scratch
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| 4 |
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GR2 normal return register
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| 5 |
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GR27 Global Data Pointer (Must be set in crt0)
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| 6 |
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GR30 SP stack pointer
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| 7 |
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GR31 milicode return pointer
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| 8 |
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| 9 |
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SR* Space registers
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| 10 |
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| 11 |
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CR24-31 Temporary Control Registers
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| 12 |
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CR14 Vector Table Register (like VBR on an m68020)
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| 13 |
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CR0 Put in a count, causes exception when decremented to 0.
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| 14 |
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| 15 |
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FORTH's magic number is 031240
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| 16 |
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| 17 |
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***
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| 18 |
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Series 700/800
|
| 19 |
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The following options are also supported:
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| 20 |
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| 21 |
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-snnn set the initial system load (ISL) start address to
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| 22 |
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nnn in the volume label. This is useful when
|
| 23 |
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building boot media for Series 700/800 systems.
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| 24 |
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| 25 |
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-lnnn specifies the length in bytes of the ISL code in
|
| 26 |
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the LIF volume.
|
| 27 |
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| 28 |
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-ennn set the ISL entry point to nnn bytes from the
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| 29 |
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beginning of the ISL. For example, specifying -
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| 30 |
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e3272 means that the ISL entry point is 3272
|
| 31 |
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(decimal) bytes from the beginning of the ISL
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| 32 |
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object module.
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| 33 |
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| 34 |
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-Knnn forces the directory start location to be the
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| 35 |
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nearest multiple of nnn x 1024 bytes from the
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| 36 |
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beginning of the volume. This is necessary for
|
| 37 |
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booting Series 700/800 systems from LIF media.
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| 38 |
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| 39 |
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-n xxx Sets the volume name to be xxx.
|
| 40 |
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lifinit -v64000000 -d64 -nISL10 -K2 -s4096 -l61440 -e5336 this_lif
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| 41 |
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| 42 |
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# lifcp --
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| 43 |
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# -r Forces RAW mode copying. (file type BIN (-23951))
|
| 44 |
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# -T Sets the file type of the directory entry.
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| 45 |
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# -Knnn forces each file copied in to begin on a nnn x
|
| 46 |
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# 1024-byte boundary from the beginning of the volume
|
| 47 |
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# Note: the word echoed below MUST be 10 characters exactly.
|
| 48 |
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#
|
| 49 |
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(echo "FORTH ") | lifcp -r -T-030001 -K2 - this_lif:AUTO
|
| 50 |
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| 51 |
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| 52 |
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#
|
| 53 |
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# somxtract infile outfile --
|
| 54 |
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# converts a series 800 file *only* into a raw image
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| 55 |
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| 56 |
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It turns out the native cc and our current gcc produce series 700
|
| 57 |
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output, so in this case it runs till if fills up the hard disk.
|
| 58 |
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| 59 |
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*** rombootlf5 is a FORTH interpreter in a "boot" image. (it won't run on
|
| 60 |
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the HP742 board)
|
| 61 |
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|
| 62 |
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lifls -l rombootlf5
|
| 63 |
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volume ISL10 data size 249984 directory size 8 94/04/20 10:26:36
|
| 64 |
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filename type start size implement created
|
| 65 |
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===============================================================
|
| 66 |
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ISL -12800 16 240 0 94/04/20 10:26:36
|
| 67 |
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HPUX -12928 256 496 0 94/04/20 10:26:37
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| 68 |
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IOMAP -12960 752 1504 0 94/04/20 10:26:37
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| 69 |
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AUTO -12289 2256 1 0 94/04/20 10:26:38
|
| 70 |
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FORTH -12960 2264 208 0 94/04/20 10:26:38
|
| 71 |
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HPFORTH ASCII 2472 420 0 94/04/20 10:26:38
|
| 72 |
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BOOTROM ASCII 2896 3849 0 94/04/20 10:26:40
|
| 73 |
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PAD1 -12290 6752 1172 0 94/04/20 10:26:40
|
| 74 |
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| 75 |
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*** The ISL is only needed when booting the raw hardware. As we're runing
|
| 76 |
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on a monitor (barely) all we need is a crt0 that initiallizes the GR27
|
| 77 |
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Global Data Pointer and zero's bss.
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| 78 |
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| 79 |
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*** Initial Program Load
|
| 80 |
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--------------------
|
| 81 |
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From page 11-56, architecture book.
|
| 82 |
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0x00000000 +------------------------------------+ 0
|
| 83 |
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| LIF_MAGIC | |
|
| 84 |
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0x00000004 +------------------------------------+ 4
|
| 85 |
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| |
|
| 86 |
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0x000000F0 +------------------------------------+ 240
|
| 87 |
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| IPL_ADDR |
|
| 88 |
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0x000000F4 +------------------------------------+ 244
|
| 89 |
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| IPL_SIZE |
|
| 90 |
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0x000000F8 +------------------------------------+ 248
|
| 91 |
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| IPL_ENTRY |
|
| 92 |
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0x000000FC +------------------------------------+ 252
|
| 93 |
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| |
|
| 94 |
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IPL_ADDR +------------------------------------+ IPL_ADDR
|
| 95 |
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| Position Independant |
|
| 96 |
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| IPL Code |
|
| 97 |
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| (including IPL_CHECKSUM) |
|
| 98 |
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+------------------------------------+ IPL_ADDR + IPL_SIZE
|
| 99 |
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| |
|
| 100 |
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+------------------------------------+
|
| 101 |
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| 102 |
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IPL_ADDR 2 Kbyte aligned, nonzero
|
| 103 |
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IPL_SIZE Multiple of 2Kbytes, <= 256 Kbytes
|
| 104 |
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IPL_ENTRY Word aligned, less than IPL_SIZE
|
| 105 |
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| 106 |
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Loads at IPL_START
|
| 107 |
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| 108 |
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This is based on Cobra/Coral hardware:
|
| 109 |
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LED register at 0xf080024
|
| 110 |
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I/O status register at 0xf0800000
|
| 111 |
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EEPROM at 0xf0810000 (LAN ID begins at byte 0)
|
| 112 |
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|
| 113 |
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Here's a dump of the LIF volume header using "xd" (od with hex output)
|
| 114 |
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| 115 |
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*
|
| 116 |
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00000f0 0000 1000 0000 9800 0000 0000 0000 0000
|
| 117 |
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^^^^
|
| 118 |
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This is the size
|
| 119 |
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*
|
| 120 |
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0000800 5445 5354 2020 2020 2020 a271 0000 0010
|
| 121 |
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^^^^ ^^^^ ^^^^ ^^^^ ^^^^ ^^^^<-- this is the ipl offset
|
| 122 |
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this is the vol name ^^^^<- this is the type
|
| 123 |
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|
| 124 |
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0000810 0000 0098 9407 1919 1426 8001 0000 0000
|
| 125 |
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^^^^
|
| 126 |
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This is the ipl size
|
| 127 |
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|
| 128 |
|
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Interupts
|
| 129 |
|
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---------
|
| 130 |
|
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The vector table is access by %iva (%cr14). The address here must be a
|
| 131 |
|
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multiple of 2048. The indexes are:
|
| 132 |
|
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1 high-priority
|
| 133 |
|
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2 power failure
|
| 134 |
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3 recovery counter
|
| 135 |
|
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4 external interrupt
|
| 136 |
|
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5 low-priority machine check
|
| 137 |
|
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6 instruction TLB miss/instruction page fault
|
| 138 |
|
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7 instruction memory protection
|
| 139 |
|
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8 illegal instruction
|
| 140 |
|
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9 break instruction
|
| 141 |
|
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10 priviledged operation
|
| 142 |
|
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11 priviledged register
|
| 143 |
|
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12 overflow
|
| 144 |
|
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13 conditional
|
| 145 |
|
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14 assist exception
|
| 146 |
|
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15 data TLB miss fault/data page fault
|
| 147 |
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16 non access instruction TLB miss fault
|
| 148 |
|
|
17 non access page TLB miss fault/non access data page fault
|
| 149 |
|
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18 data memory protection/unaligned data reference
|
| 150 |
|
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19 data memory break
|
| 151 |
|
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20 TLB dirty bit
|
| 152 |
|
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21 page reference
|
| 153 |
|
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22 assist emulation
|
| 154 |
|
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23 higher-priority transfer
|
| 155 |
|
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24 lower-priority transfe
|
| 156 |
|
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25 taken branch
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