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[/] [or1k/] [trunk/] [newlib/] [newlib/] [libc/] [machine/] [hppa/] [strcpy.S] - Blame information for rev 1765

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1 39 lampret
/*
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 *  (c) Copyright 1986 HEWLETT-PACKARD COMPANY
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 *
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 *  To anyone who acknowledges that this file is provided "AS IS"
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 *  without any express or implied warranty:
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 *      permission to use, copy, modify, and distribute this file
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 *  for any purpose is hereby granted without fee, provided that
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 *  the above copyright notice and this notice appears in all
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 *  copies, and that the name of Hewlett-Packard Company not be
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 *  used in advertising or publicity pertaining to distribution
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 *  of the software without specific, written prior permission.
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 *  Hewlett-Packard Company makes no representations about the
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 *  suitability of this software for any purpose.
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 */
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/*
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        A faster strcpy.
18
 
19
        by
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21
        Jerry Huck (aligned case)
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        Daryl Odnert (equal-alignment case)
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        Edgar Circenis (non-aligned case)
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*/
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/*
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 * strcpy(s1, s2)
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 *
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 * Copy string s2 to s1.  s1 must be large enough.
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 * return s1
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 */
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#include "DEFS.h"
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#define d_addr          r26
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#define s_addr          r25
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#define tmp6            r24
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#define tmp1            r19
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#define evenside        r19
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#define tmp2            r20
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#define oddside         r20
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#define tmp3            r21
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#define tmp4            r22
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#define tmp5            arg3
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#define save            r1
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46
 
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ENTRY(strcpy)
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/* Do some quick alignment checking on and fast path both word aligned */
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        extru,<>   s_addr,31,2,tmp6    /*Is source word aligned? */
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        ldwm       4(0,s_addr),oddside /*Assume yes and guess that it
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                                          is double-word aligned. */
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        dep,=      d_addr,29,2,tmp6    /*Is target word aligned? */
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        b          case_analysis
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        copy       d_addr,ret0
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/* Both are aligned.  First source word already loaded assuming that
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   source was oddword aligned.  Fall through (therefore fastest) code
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   shuffles the registers to join the main loop */
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bothaligned:
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        bb,>=    s_addr,29,twoatatime  /*Branch if source was odd aligned*/
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        uxor,nbz oddside,r0,save
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62
/* Even aligned source.  save holds that operand.
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   Do one iteration of the main copy loop juggling the registers to avoid
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   one copy. */
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        b,n      nullfound
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        ldwm     4(s_addr),oddside
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        stwm     save,4(d_addr)
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        uxor,nbz oddside,r0,save
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        b,n      nullfound
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        ldwm     4(s_addr),evenside
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        stwm     oddside,4(d_addr)
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        uxor,nbz evenside,r0,save
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        b,n      nullfound
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        ldwm     4(s_addr),oddside
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/* Main loop body.  Entry expects evenside still to be stored, oddside
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   just loaded. */
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loop:
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        stwm     evenside,4(d_addr)
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        uxor,nbz oddside,r0,save
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82
/* mid loop entry */
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twoatatime:
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        b,n      nullfound
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        ldwm     4(s_addr),evenside
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        stwm     oddside,4(d_addr)
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        uxor,sbz evenside,r0,save
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        b        loop
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        ldwm     4(s_addr),oddside
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91
/* fall through when null found in evenside.  oddside actually loaded */
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nullfound:                              /* adjust d_addr and store final word */
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94
        extru,<>        save,7,8,r0         /* pick up leftmost byte */
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        addib,tr,n      1,d_addr,store_final
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        extru,<>        save,15,8,r0
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        addib,tr,n      2,d_addr,store_final
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        extru,<>        save,23,8,r0
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        addib,tr        3,d_addr,store_final2
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        bv              0(rp)
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        stw             save,0(d_addr)
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103
store_final:
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        bv              0(rp)
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store_final2:
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        stbys,e         save,0(d_addr)  /* delay slot */
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108
case_analysis:
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110
        blr         tmp6,r0
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        nop
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        /* NOTE: the delay slots for the non-aligned cases load a   */
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        /* shift quantity which is TGT-SRC into tmp3.               */
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        /* Note also, the case for both strings being word aligned  */
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        /* is already checked before the BLR is executed, so that   */
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        /* case can never occur.                                    */
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119
                                       /* TGT SRC */
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        nop                            /* 00  00  can't happen */
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        nop
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        b           neg_aligned_copy   /* 00  01  */
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        ldi         -1,tmp3            /* load shift quantity. delay slot */
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        b           neg_aligned_copy   /* 00  10  */
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        ldi         -2,tmp3            /* load shift quantity. delay slot */
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        b           neg_aligned_copy   /* 00  11  */
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        ldi         -3,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy0  /* 01  00  */
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        ldi         1,tmp3            /* load shift quantity. delay slot */
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        b           equal_alignment_1  /* 01  01  */
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        ldbs,ma     1(s_addr),tmp1
132
        b           neg_aligned_copy   /* 01  10  */
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        ldi         -1,tmp3            /* load shift quantity. delay slot */
134
        b           neg_aligned_copy   /* 01  11  */
135
        ldi         -2,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy0  /* 10  00  */
137
        ldi         2,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy   /* 10  01  */
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        ldi         1,tmp3            /* load shift quantity. delay slot */
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        b           equal_alignment_2  /* 10  10  */
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        ldhs,ma     2(s_addr),tmp1
142
        b           neg_aligned_copy   /* 10  11  */
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        ldi         -1,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy0  /* 11  00  */
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        ldi         3,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy   /* 11  01  */
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        ldi         2,tmp3            /* load shift quantity. delay slot */
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        b           pos_aligned_copy   /* 11  10  */
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        ldi         1,tmp3            /* load shift quantity. delay slot */
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        ldbs,ma     1(s_addr),tmp1     /* 11  11  */
151
        comiclr,<>  r0,tmp1,r0
152
        bv          0(rp)              /* return if 1st byte was null */
153
        stbs,ma     tmp1,1(d_addr)     /* store a byte to dst string  */
154
        b           bothaligned       /* can now goto word_aligned   */
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        ldwm        4(s_addr),oddside     /* load next word of source    */
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157
equal_alignment_1:
158
        comiclr,<>  r0,tmp1,r0      /* nullify next if tmp1 <> 0  */
159
        bv          0(rp)           /* return if null byte found  */
160
        stbs,ma     tmp1,1(d_addr)  /* store a byte to dst string */
161
        ldhs,ma     2(s_addr),tmp1  /* load next halfword         */
162
equal_alignment_2:
163
        extru,<>    tmp1,23,8,tmp6  /* look at left byte of halfword */
164
        bv          0(rp)           /* return if 1st byte was null */
165
        stbs,ma     tmp6,1(d_addr)
166
        extru,<>    tmp1,31,8,r0
167
        bv          0(rp)           /* return if 2nd byte was null */
168
        stbs,ma     tmp1,1(d_addr)
169
        b           bothaligned
170
        ldwm        4(s_addr),oddside  /* load next word              */
171
 
172
/* source and destination are not aligned, so we do it the hard way. */
173
 
174
/* target alignment is greater than source alignment */
175
pos_aligned_copy0:
176
        addi            -4,s_addr,s_addr
177
pos_aligned_copy:
178
        extru       d_addr,31,2,tmp6   /* Extract low 2 bits of the dest addr */
179
        extru       s_addr,31,2,tmp1   /* Extract low 2 bits of the src addr */
180
        dep         r0,31,2,s_addr     /* Compute word address of the source. */
181
        sh3add          tmp3,r0,tmp4        /* compute shift amt */
182
        ldwm            4(0,s_addr),tmp2    /* get 1st source word */
183
        sh3add          tmp1,r0,save        /* setup mask shift amount */
184
        mtctl           save,r11            /* set-up cr11 for mask */
185
        zvdepi          -2,32,save          /* create mask */
186
        or              save,tmp2,tmp2      /* mask unused bytes in src */
187
        ldi             -1,tmp1             /* load tmp1 with 0xffffffff */
188
        mtctl           tmp4,r11            /* shift count -> shift count reg */
189
        vshd            tmp1,tmp2,tmp3      /* position data ! */
190
        uxor,nbz        tmp3,r0,save
191
        b,n             first_null
192
        uxor,nbz        tmp2,r0,save
193
        b               nullfound1
194
        mtctl           tmp4,r11            /* re-load shift cnt (delay slot) */
195
        b               loop_entry
196
        ldwm            4(0,s_addr),tmp1    /* get next word. delay slot */
197
 
198
neg_aligned_copy:
199
        extru       d_addr,31,2,tmp6   /* Extract low 2 bits of the dest addr */
200
        extru       s_addr,31,2,tmp2   /* Extract low 2 bits of the src addr */
201
        dep         r0,31,2,s_addr     /* Compute word address of the source. */
202
        sh3add          tmp3,r0,tmp4        /* compute shift amt */
203
        ldwm            4(0,s_addr),tmp1    /* load first word from source. */
204
/* check to see if next word can be read safely */
205
        sh3add          tmp2,r0,save
206
        mtctl           save,r11            /* shift count -> shift count reg */
207
        zvdepi          -2,32,save
208
        or              save, tmp1, tmp1
209
        uxor,nbz        tmp1,r0,save        /* any nulls in first word? */
210
        b               first_null0
211
        mtctl           tmp4,r11
212
        ldwm            4(0,s_addr),tmp2    /* load second word from source */
213
        combt,=         tmp6,r0,chunk1      /* don't mask if whole word valid */
214
        vshd            tmp1,tmp2,tmp3      /* position data ! */
215
        sh3add          tmp6,r0,save        /* setup r1 */
216
        mtctl           save,r11            /* set-up cr11 for mask */
217
        zvdepi          -2,32,save
218
        or              save, tmp3, tmp3
219
        uxor,nbz        tmp3,r0,save
220
        b,n             first_null
221
        uxor,nbz        tmp2,r0,save
222
        b               nullfound1
223
        mtctl           tmp4,r11            /* re-load shift cnt (delay slot) */
224
        b               loop_entry
225
        ldwm            4(0,s_addr),tmp1    /* get next word. delay slot */
226
 
227
chunk1:
228
        uxor,nbz        tmp2,r0,save
229
        b               nullfound0
230
        vshd            tmp1,tmp2,tmp3
231
did_mask:
232
        ldwm            4(0,s_addr),tmp1    /* get next word !  */
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loop_entry:
234
        stbys,b,m       tmp3,4(0,d_addr)    /* store !  */
235
 
236
        uxor,nbz        tmp1, r0, save
237
        b               nullfound2
238
        vshd            tmp2,tmp1,tmp3      /* position data !  */
239
        ldwm            4(s_addr),tmp2
240
        stwm            tmp3,4(d_addr)
241
        uxor,sbz        tmp2,r0,save
242
        b               did_mask
243
nullfound0:
244
        vshd            tmp1,tmp2,tmp3      /* delay slot */
245
        uxor,nbz        tmp3,r0,save
246
        b,n             nullfound
247
nullfound1:
248
        stbys,b,m       tmp3,4(0,d_addr)
249
        b               nullfound
250
        vshd            tmp2,r0,save        /* delay slot */
251
 
252
nullfound2:
253
        uxor,nbz        tmp3,r0,save
254
        b,n             nullfound
255
        stwm            tmp3,4(d_addr)
256
        b               nullfound
257
        /* notice that delay slot is in next routine */
258
 
259
first_null0:    /* null found in first word of non-aligned (wrt d_addr) */
260
        vshd            tmp1,r0,save        /* delay slot */
261
        combt,=         tmp6,r0,check4
262
        extru           save,7,8,tmp4
263
first_null:
264
        addibt,=        -1,tmp6,check3  /* check last 3 bytes of word */
265
        extru           save,15,8,tmp4
266
        addibt,=,n      -1,tmp6,check2  /* check last 2 bytes */
267
        bv              0(rp)           /* null in last byte--store and exit */
268
        stbys,b         save, 0(d_addr)
269
 
270
check4:
271
        combt,=         tmp4,r0,done
272
        stbs,ma         tmp4,1(d_addr)
273
        extru,<>        save,15,8,tmp4
274
check3:
275
        combt,=         tmp4,r0,done
276
        stbs,ma         tmp4,1(d_addr)
277
check2:
278
        extru,<>        save,23,8,tmp4
279
        bv              0(rp)
280
        stbs,ma         tmp4,1(d_addr)
281
        bv              0(rp)
282
        stbs            r0,0(d_addr)
283
 
284
done:
285
EXIT(strcpy)

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