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[/] [or1k/] [trunk/] [newlib/] [newlib/] [libc/] [sys/] [a29khif/] [crt0.s] - Blame information for rev 1765

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1 39 lampret
; @(#)crt0.s    2.7 90/10/15 13:17:57, AMD
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright 1988, 1989, 1990 Advanced Micro Devices, Inc.
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;
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; This software is the property of Advanced Micro Devices, Inc  (AMD)  which
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; specifically  grants the user the right to modify, use and distribute this
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; software provided this notice is not removed or altered.  All other rights
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; are reserved by AMD.
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;
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; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
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; SOFTWARE.  IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
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; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
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; USE OF THIS SOFTWARE.
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;
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; So that all may benefit from your experience, please report  any  problems
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; or  suggestions about this software to the 29K Technical Support Center at
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; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131  in  the  UK,  or
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; 0031-11-1129 in Japan, toll free.  The direct dial number is 512-462-4118.
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;
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; Advanced Micro Devices, Inc.
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; 29K Support Products
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; Mail Stop 573
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; 5900 E. Ben White Blvd.
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; Austin, TX 78741
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; 800-292-9263
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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        .file   "crt0.s"
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; crt0.s version 2.1-7
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;
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; This module gets control from the OS.
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; It saves away the Am29027 Mode register settings and
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; then sets up the pointers to the resident spill and fill
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; trap handlers. It then establishes argv and argc for passing
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; to main. It then calls _main. If main returns, it calls _exit.
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;
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;       void = start( );
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;       NOTE - not C callable (no lead underscore)
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;
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        .include        "sys/sysmac.h"
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;
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;
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        .extern V_SPILL, V_FILL
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        .comm   __29027Mode, 8  ; A shadow of the mode register
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        .comm   __LibInit, 4
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        .comm   __environ, 4    ; Environment variables, currently none.
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        .text
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        .extern _main, _exit
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        .extern _memset
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        .word   0                        ; Terminating tag word
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        .global start
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start:
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        sub     gr1, gr1, 6 * 4
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        asgeu   V_SPILL, gr1, rab       ; better not ever happen
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        add     lr1, gr1, 6 * 4
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;
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; Initialize the .bss section to zero by using the memset library function.
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; The .bss initialization section below has been commented out as it breaks
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; XRAY29K that has been released. The operators sizeof and startof create
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; new sections that are not recognized by XRAY29k, but will be implemented
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; in the next release (2.0).
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;
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;       const   lr4, $sizeof(.bss)      ; get size of .bss section to zero out
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;       consth  lr4, $sizeof(.bss)
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;       const   lr2, $startof(.bss)     ; Get start address of .bss section
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;       consth  lr2, $startof(.bss)
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;       const   lr0, _memset            ; address of memset function
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;       consth  lr0, _memset
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;       calli   lr0, lr0                ; call memset function
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;       const   lr3, 0
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; Save the initial value of the Am29027's Mode register
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; If your const tav,HIF_does @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1 not enter crt0 with value for Am29027's Mode register
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; in gr96 and gr97, and also if the coprocessor is active uncomment the
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; next 4 lines.
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;       const   gr96, 0xfc00820
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;       consth  gr96, 0xfc00820
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;       const   gr97, 0x1375
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;       store   1, 3, gr96, gr97
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;
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        const   gr98, __29027Mode
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        consth  gr98, __29027Mode
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        store   0, 0, gr96, gr98
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        add     gr98, gr98, 4
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        store   0, 0, gr97, gr98
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;
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; Now call the const tav,HIF_to @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1 setup the spill and fill trap handlers
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;
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        const   lr3, spill
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        consth  lr3, spill
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        const   lr2, V_SPILL
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        const tav,HIF_setvec @ asneq V_SYSCALL,gr1,gr1
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        const   lr3, fill
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        consth  lr3, fill
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        const   lr2, V_FILL
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        const tav,HIF_setvec @ asneq V_SYSCALL,gr1,gr1
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;
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; Set up dividu handler, since native one don't work?!
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; Set it up by hand (FIXME) since HIF_settrap doesn't work either!
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;
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;       const   lr3,Edividu
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;       consth  lr3,Edividu
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;
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;       const   lr2,35
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;       const tav,HIF_settrap @ asneq V_SYSCALL,gr1,gr1
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;       asge    0x50,gr121,0    ; check whether it failed
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;       const   lr2,0x8000008c  ; abs addr of dividu trap handler on EB
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;       consth  lr2,0x8000008c
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;       store   0,0,lr3,lr2     ; Clobber vector FIXME
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;
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;       Get the argv base address and calculate argc.
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;
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        const tav,HIF_getargs @ asneq V_SYSCALL,gr1,gr1
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        add     lr3, v0, 0               ; argv
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        add     lr4, v0, 0
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        constn  lr2, -1
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argcloop:                               ; scan for NULL terminator
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        load    0, 0, gr97, lr4
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        add     lr4, lr4, 4
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        cpeq    gr97, gr97, 0
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        jmpf    gr97, argcloop
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        add     lr2, lr2, 1
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;
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; Now call LibInit, if there is one. To aid runtime libraries
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; that need to do some startup initialization, we have created
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; a bss variable called LibInit. If the library doesn't need
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; any run-time initialization, the variable is still 0. If the
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; library does need run-time initialization, the library will
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; contain a definition like
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; void (*_LibInit)(void) = LibInitFunction;
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; The linker will match up our bss LibInit with this data LibInit
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; and the variable will not be 0.
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;
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        const   lr0, __LibInit
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        consth  lr0, __LibInit
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        load    0, 0, lr0, lr0
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        cpeq    gr96, lr0, 0
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        jmpt    gr96, NoLibInit
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        nop
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        calli   lr0, lr0
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        nop
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NoLibInit:
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;
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; call main, passing it 2 arguments. main( argc, argv )
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;
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        const   lr0, _main
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        consth  lr0, _main
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        calli   lr0, lr0
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        nop
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;
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; call exit
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;
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        const   lr0, _exit
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        consth  lr0, _exit
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        calli   lr0, lr0
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        add     lr2, gr96, 0
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;
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; Should never get here, but just in case
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;
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loop:
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        const tav,HIF_exit @ asneq V_SYSCALL,gr1,gr1
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        jmp     loop
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        nop
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        .sbttl  "Spill and Fill trap handlers"
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        .eject
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;
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;       SPILL, FILL trap handlers
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;
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; Note that these Spill and Fill trap handlers allow the OS to
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; assume that the only registers of use are between gr1 and rfb.
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; Therefore, if the OS desires to, it may simply preserve from
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; lr0 for (rfb-gr1)/4 registers when doing a context save.
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;
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;
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; Here is the spill handler
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;
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; spill registers from [*gr1..*rab)
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; and move rab downto where gr1 points
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;
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; rab must change before rfb for signals to work
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;
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; On entry:     rfb - rab = windowsize, gr1 < rab
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; Near the end: rfb - rab > windowsize, gr1 == rab
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; On exit:      rfb - rab = windowsize, gr1 == rab
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;
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        .global spill
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spill:
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        sub     tav, rab, gr1   ; tav = number of bytes to spill
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        srl     tav, tav, 2     ; change byte count to word count
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        sub     tav, tav, 1     ; make count zero based
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        mtsr    cr, tav         ; set Count Remaining register
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        sub     tav, rab, gr1
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        sub     tav, rfb, tav   ; pull down free bound and save it in rab
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        add     rab, gr1, 0      ; first pull down allocate bound
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        storem  0, 0, lr0, tav    ; store lr0..lr(tav) into rfb
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        jmpi    tpc             ; return...
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          add   rfb, tav, 0
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;
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; Here is the fill handler
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;
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; fill registers from [*rfb..*lr1)
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; and move rfb upto where lr1 points.
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;
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; rab must change before rfb for signals to work
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;
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; On entry:     rfb - rab = windowsize, lr1 > rfb
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; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize
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; On exit:      rfb - rab = windowsize, lr1 == rfb
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;
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        .global fill
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fill:
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        const   tav, 0x80 << 2
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        or      tav, tav, rfb   ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2
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        mtsr    ipa, tav        ; ipa = [rfb]<<2 == 1st reg to fill
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                                ; gr0 is now the first reg to spill
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        sub     tav, lr1, rfb   ; tav = number of bytes to spill
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        add     rab, rab, tav   ; push up allocate bound
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        srl     tav, tav, 2     ; change byte count to word count
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        sub     tav, tav, 1     ; make count zero based
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        mtsr    cr, tav         ; set Count Remaining register
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        loadm   0, 0, gr0, rfb    ; load registers
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        jmpi    tpc             ; return...
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          add   rfb, lr1, 0      ; ... first pushing up free bound
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        .end

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