OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32/] [op.c] - Blame information for rev 1717

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1452 nogj
/* op.c -- Micro operations for the recompiler
2
   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
3
 
4
This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program; if not, write to the Free Software
18
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
 
20
 
21
#include <stdio.h>
22
#include <stdint.h>
23
#include <stdlib.h>
24
 
25
#include "config.h"
26
 
27
#ifdef HAVE_INTTYPES_H
28
#include <inttypes.h>
29
#endif
30
 
31
#include "port.h"
32
#include "arch.h"
33
#include "spr_defs.h"
34
#include "opcode/or32.h"
35
#include "sim-config.h"
36
#include "except.h"
37
#include "abstract.h"
38
#include "execute.h"
39
#include "sprs.h"
40
#include "sched.h"
41 1717 nogj
#include "immu.h"
42 1452 nogj
 
43
#include "op_support.h"
44
 
45
#include "i386_regs.h"
46
 
47
#include "dyn_rec.h"
48
 
49
register struct cpu_state *env asm(CPU_STATE_REG);
50
 
51
#include "op_i386.h"
52
 
53
/*
54 1549 nogj
 * WARNING: Before going of and wildly editing everything in this file remember
55 1452 nogj
 * the following about its contents:
56
 * 1) The `functions' don't EVER return.  In otherwords haveing return state-
57
 *    ments _anywere_ in this file is likely not to work.  This is because
58
 *    dyngen just strips away the ret from the end of the function and just uses
59
 *    the function `body'.  If a ret statement is executed _anyware_ inside the
60
 *    dynamicly generated code, then it is undefined were we shall jump to.
61
 * 2) Because of 1), try not to have overly complicated functions.  In too
62
 *    complicated functions, gcc may decide to generate premature `exits'.  This
63
 *    is what passing the -fno-reorder-blocks command line switch to gcc helps
64
 *    with.  This is ofcourse not desired and is rather flaky as we don't (and
65
 *    can't) control the kind of code that gcc generates: It may work for one
66
 *    and break for another.  The less branches there are the less likely it is
67
 *    that a premature return shall occur.
68
 * 3) If gcc decides that it is going to be a basterd then it will optimise a
69
 *    very simple condition (if/switch) with a premature exit.  But gcc can't
70
 *    fuck ME over!  Just stick a FORCE_RET; at the END of the offending
71
 *    function.
72
 * 4) All operations must start with `op_'.  dyngen ignores all other functions.
73
 * 5) Local variables are depriciated: They hinder performance.
74
 * 6) Function calls are expensive as the stack has to be shifted (twice).
75
 */
76
 
77
/*#define __or_dynop __attribute__((noreturn))*/
78
#define __or_dynop
79
 
80
/* Temporaries to hold the (simulated) registers in */
81
register uint32_t t0 asm(T0_REG);
82
register uint32_t t1 asm(T1_REG);
83
register uint32_t t2 asm(T2_REG);
84
 
85
#define OP_PARAM1 ((uorreg_t)(&__op_param1))
86
#define OP_PARAM2 ((uorreg_t)(&__op_param2))
87
#define OP_PARAM3 ((uorreg_t)(&__op_param3))
88
 
89
extern uorreg_t __op_param1;
90
extern uorreg_t __op_param2;
91
extern uorreg_t __op_param3;
92
 
93
 
94 1678 nogj
static inline void save_t_bound(oraddr_t pc)
95 1452 nogj
{
96 1678 nogj
  int reg;
97
 
98 1717 nogj
  pc = (pc & immu_state->page_offset_mask) / 4;
99 1678 nogj
  reg = env->curr_page->ts_bound[pc];
100
 
101
  if(reg & 0x1f)
102
    env->reg[reg & 0x1f] = t0;
103
 
104
  if((reg >> 5) & 0x1f)
105
    env->reg[(reg >> 5) & 0x1f] = t1;
106
 
107
  if((reg >> 10) & 0x1f)
108
    env->reg[(reg >> 10) & 0x1f] = t2;
109 1452 nogj
}
110
 
111
void do_sched_wrap(void)
112
{
113 1687 nogj
  env->pc += 4;
114
  //runtime.cpu.instructions++;
115
  runtime.sim.cycles -= env->cycles_dec;
116
  scheduler.job_queue->time += env->cycles_dec;
117
  if(scheduler.job_queue->time <= 0) {
118
    save_t_bound(env->pc - 4);
119
    do_scheduler();
120
  }
121 1452 nogj
}
122
 
123 1481 nogj
/* do_scheduler wrapper for instructions that are in the delay slot */
124
void do_sched_wrap_delay(void)
125
{
126 1687 nogj
  /* FIXME: Can't this be eliminated? */
127
  env->pc += 4;
128
  //runtime.cpu.instructions++;
129
  runtime.sim.cycles -= env->cycles_dec;
130
  scheduler.job_queue->time += env->cycles_dec;
131
  if(scheduler.job_queue->time <= 0)
132
    do_scheduler();
133 1481 nogj
}
134
 
135
void enter_dyn_code(oraddr_t addr, struct dyn_page *dp)
136
{
137 1678 nogj
  uint16_t reg = 0;
138 1692 nogj
  uint32_t t0_reg = t0, t1_reg = t1, t2_reg = t2;
139
  struct cpu_state *cpu_reg = env;
140 1481 nogj
 
141 1717 nogj
  addr &= immu_state->page_offset_mask;
142 1481 nogj
  addr >>= 2;
143
 
144 1678 nogj
  if(addr)
145
    reg = dp->ts_bound[addr - 1];
146 1481 nogj
 
147 1691 nogj
  t0 = cpu_state.reg[reg & 0x1f];
148
  t1 = cpu_state.reg[(reg >> 5) & 0x1f];
149 1481 nogj
 
150 1691 nogj
  /* Don't we all love gcc?  For some heavenly reason gcc 3.2 _knows_ that if I
151
   * don't put a condition around the assignment of t2, _all_ the assignments to
152
   * t{0,1,2} are useless and not needed.  I'm pleasently happy that gcc is so
153
   * bright, but on the other hand, t{0,1,2} are globals (!) how can you assume
154
   * that the value of a global won't be used in a function further up or
155
   * further down the stack?? */
156
  if(addr)
157 1481 nogj
    t2 = cpu_state.reg[(reg >> 10) & 0x1f];
158
 
159 1692 nogj
  env = &cpu_state;
160
 
161
  ((gen_code_ent *)dp->locs)[addr]();
162
  t0 = t0_reg;
163
  t1 = t1_reg;
164
  t2 = t2_reg;
165
  env = (struct cpu_state *)cpu_reg;
166 1481 nogj
}
167
 
168
__or_dynop void op_set_pc_pc_delay(void)
169 1452 nogj
{
170 1687 nogj
  env->sprs[SPR_PPC] = env->pc;
171 1481 nogj
  /* pc_delay is pulled back 4 since imediatly after this is run, the scheduler
172
   * runs which also increments it by 4 */
173 1687 nogj
  env->pc = env->pc_delay - 4;
174 1452 nogj
}
175
 
176
__or_dynop void op_set_pc_delay_imm(void)
177
{
178 1687 nogj
  env->pc_delay = env->pc + (orreg_t)OP_PARAM1;
179 1452 nogj
  env->delay_insn = 1;
180
}
181
 
182
__or_dynop void op_set_pc_delay_pc(void)
183
{
184 1687 nogj
  env->pc_delay = env->pc;
185 1452 nogj
  env->delay_insn = 1;
186
}
187
 
188
__or_dynop void op_clear_pc_delay(void)
189
{
190
  env->pc_delay = 0;
191
  env->delay_insn = 1;
192
}
193
 
194
__or_dynop void op_do_jump(void)
195
{
196 1692 nogj
  RET_FROM_DYN_CODE;
197 1481 nogj
}
198
 
199
__or_dynop void op_do_jump_delay(void)
200
{
201 1692 nogj
  env->pc = env->pc_delay;
202
  RET_FROM_DYN_CODE;
203 1452 nogj
}
204
 
205 1481 nogj
__or_dynop void op_clear_delay_insn(void)
206 1452 nogj
{
207 1481 nogj
  env->delay_insn = 0;
208 1452 nogj
}
209
 
210 1481 nogj
__or_dynop void op_set_delay_insn(void)
211 1452 nogj
{
212 1481 nogj
  env->delay_insn = 1;
213 1452 nogj
}
214
 
215 1481 nogj
__or_dynop void op_check_delay_slot(void)
216 1452 nogj
{
217 1481 nogj
  if(!env->delay_insn)
218
    OP_JUMP(OP_PARAM1);
219 1452 nogj
}
220
 
221
__or_dynop void op_jmp_imm(void)
222
{
223
  OP_JUMP(OP_PARAM1);
224
}
225
 
226
__or_dynop void op_set_flag(void)
227
{
228
  env->sprs[SPR_SR] |= SPR_SR_F;
229
}
230
 
231
__or_dynop void op_clear_flag(void)
232
{
233
  env->sprs[SPR_SR] &= ~SPR_SR_F;
234
}
235
 
236 1481 nogj
/* Used for the l.bf instruction.  Therefore if the flag is not set, jump over
237
 * all the jumping stuff */
238 1452 nogj
__or_dynop void op_check_flag(void)
239
{
240 1481 nogj
  if(!(env->sprs[SPR_SR] & SPR_SR_F)) {
241 1687 nogj
    SPEEDY_CALL(do_sched_wrap);
242 1481 nogj
    OP_JUMP(OP_PARAM1);
243
  }
244
}
245
 
246
/* Used for l.bf if the delay slot instruction is on another page */
247
__or_dynop void op_check_flag_delay(void)
248
{
249 1452 nogj
  if(env->sprs[SPR_SR] & SPR_SR_F) {
250 1481 nogj
    env->delay_insn = 1;
251 1687 nogj
    env->pc_delay = env->pc + (orreg_t)OP_PARAM1;
252 1452 nogj
  }
253
}
254
 
255 1481 nogj
/* Used for the l.bnf instruction.  Therefore if the flag is set, jump over all
256
 * the jumping stuff */
257 1452 nogj
__or_dynop void op_check_not_flag(void)
258
{
259 1481 nogj
  if(env->sprs[SPR_SR] & SPR_SR_F) {
260 1687 nogj
    SPEEDY_CALL(do_sched_wrap);
261 1481 nogj
    OP_JUMP(OP_PARAM1);
262
  }
263
}
264
 
265
/* Used for l.bnf if the delay slot instruction is on another page */
266
__or_dynop void op_check_not_flag_delay(void)
267
{
268 1452 nogj
  if(!(env->sprs[SPR_SR] & SPR_SR_F)) {
269 1481 nogj
    env->delay_insn = 1;
270 1687 nogj
    env->pc_delay = env->pc + (orreg_t)OP_PARAM1;
271 1452 nogj
  }
272
}
273
 
274 1481 nogj
__or_dynop void op_add_pc(void)
275 1452 nogj
{
276 1687 nogj
  env->pc += OP_PARAM1;
277 1452 nogj
}
278
 
279
__or_dynop void op_nop_exit(void)
280
{
281
  op_support_nop_exit();
282
  FORCE_RET;
283
}
284
 
285
__or_dynop void op_nop_reset(void)
286
{
287
  op_support_nop_reset();
288 1692 nogj
  env->pc = EXCEPT_RESET;
289
  RET_FROM_DYN_CODE;
290 1452 nogj
}
291
 
292
__or_dynop void op_nop_printf(void)
293
{
294
  op_support_nop_printf();
295
  FORCE_RET;
296
}
297
 
298
__or_dynop void op_nop_report(void)
299
{
300
  op_support_nop_report();
301
  FORCE_RET;
302
}
303
 
304
__or_dynop void op_nop_report_imm(void)
305
{
306
  op_support_nop_report_imm(OP_PARAM1);
307
}
308
 
309 1657 nogj
__or_dynop void op_analysis(void)
310 1452 nogj
{
311 1657 nogj
  op_support_analysis();
312
  FORCE_RET;
313 1452 nogj
}
314
 
315 1657 nogj
__or_dynop void op_move_gpr1_pc_delay(void)
316
{
317
  env->pc_delay = env->reg[1];
318
  env->delay_insn = 1;
319
}
320 1452 nogj
 
321 1657 nogj
__or_dynop void op_move_gpr2_pc_delay(void)
322 1452 nogj
{
323 1657 nogj
  env->pc_delay = env->reg[2];
324
  env->delay_insn = 1;
325 1452 nogj
}
326
 
327 1657 nogj
__or_dynop void op_move_gpr3_pc_delay(void)
328 1452 nogj
{
329 1657 nogj
  env->pc_delay = env->reg[3];
330
  env->delay_insn = 1;
331 1452 nogj
}
332
 
333 1657 nogj
__or_dynop void op_move_gpr4_pc_delay(void)
334
{
335
  env->pc_delay = env->reg[4];
336
  env->delay_insn = 1;
337
}
338 1452 nogj
 
339 1657 nogj
__or_dynop void op_move_gpr5_pc_delay(void)
340 1452 nogj
{
341 1657 nogj
  env->pc_delay = env->reg[5];
342
  env->delay_insn = 1;
343 1452 nogj
}
344
 
345 1657 nogj
__or_dynop void op_move_gpr6_pc_delay(void)
346 1452 nogj
{
347 1657 nogj
  env->pc_delay = env->reg[6];
348
  env->delay_insn = 1;
349 1452 nogj
}
350
 
351 1657 nogj
__or_dynop void op_move_gpr7_pc_delay(void)
352 1452 nogj
{
353 1657 nogj
  env->pc_delay = env->reg[7];
354
  env->delay_insn = 1;
355 1452 nogj
}
356
 
357 1657 nogj
__or_dynop void op_move_gpr8_pc_delay(void)
358 1452 nogj
{
359 1657 nogj
  env->pc_delay = env->reg[8];
360
  env->delay_insn = 1;
361 1452 nogj
}
362
 
363 1657 nogj
__or_dynop void op_move_gpr9_pc_delay(void)
364
{
365
  env->pc_delay = env->reg[9];
366
  env->delay_insn = 1;
367
}
368
 
369
__or_dynop void op_move_gpr10_pc_delay(void)
370
{
371
  env->pc_delay = env->reg[10];
372
  env->delay_insn = 1;
373
}
374
 
375
__or_dynop void op_move_gpr11_pc_delay(void)
376
{
377
  env->pc_delay = env->reg[11];
378
  env->delay_insn = 1;
379
}
380
 
381
__or_dynop void op_move_gpr12_pc_delay(void)
382
{
383
  env->pc_delay = env->reg[12];
384
  env->delay_insn = 1;
385
}
386
 
387
__or_dynop void op_move_gpr13_pc_delay(void)
388
{
389
  env->pc_delay = env->reg[13];
390
  env->delay_insn = 1;
391
}
392
 
393
__or_dynop void op_move_gpr14_pc_delay(void)
394
{
395
  env->pc_delay = env->reg[14];
396
  env->delay_insn = 1;
397
}
398
 
399
__or_dynop void op_move_gpr15_pc_delay(void)
400
{
401
  env->pc_delay = env->reg[15];
402
  env->delay_insn = 1;
403
}
404
 
405
__or_dynop void op_move_gpr16_pc_delay(void)
406
{
407
  env->pc_delay = env->reg[16];
408
  env->delay_insn = 1;
409
}
410
 
411
__or_dynop void op_move_gpr17_pc_delay(void)
412
{
413
  env->pc_delay = env->reg[17];
414
  env->delay_insn = 1;
415
}
416
 
417
__or_dynop void op_move_gpr18_pc_delay(void)
418
{
419
  env->pc_delay = env->reg[18];
420
  env->delay_insn = 1;
421
}
422
 
423
__or_dynop void op_move_gpr19_pc_delay(void)
424
{
425
  env->pc_delay = env->reg[19];
426
  env->delay_insn = 1;
427
}
428
 
429
__or_dynop void op_move_gpr20_pc_delay(void)
430
{
431
  env->pc_delay = env->reg[20];
432
  env->delay_insn = 1;
433
}
434
 
435
__or_dynop void op_move_gpr21_pc_delay(void)
436
{
437
  env->pc_delay = env->reg[21];
438
  env->delay_insn = 1;
439
}
440
 
441
__or_dynop void op_move_gpr22_pc_delay(void)
442
{
443
  env->pc_delay = env->reg[22];
444
  env->delay_insn = 1;
445
}
446
 
447
__or_dynop void op_move_gpr23_pc_delay(void)
448
{
449
  env->pc_delay = env->reg[23];
450
  env->delay_insn = 1;
451
}
452
 
453
__or_dynop void op_move_gpr24_pc_delay(void)
454
{
455
  env->pc_delay = env->reg[24];
456
  env->delay_insn = 1;
457
}
458
 
459
__or_dynop void op_move_gpr25_pc_delay(void)
460
{
461
  env->pc_delay = env->reg[25];
462
  env->delay_insn = 1;
463
}
464
 
465
__or_dynop void op_move_gpr26_pc_delay(void)
466
{
467
  env->pc_delay = env->reg[26];
468
  env->delay_insn = 1;
469
}
470
 
471
__or_dynop void op_move_gpr27_pc_delay(void)
472
{
473
  env->pc_delay = env->reg[27];
474
  env->delay_insn = 1;
475
}
476
 
477
__or_dynop void op_move_gpr28_pc_delay(void)
478
{
479
  env->pc_delay = env->reg[28];
480
  env->delay_insn = 1;
481
}
482
 
483
__or_dynop void op_move_gpr29_pc_delay(void)
484
{
485
  env->pc_delay = env->reg[29];
486
  env->delay_insn = 1;
487
}
488
 
489
__or_dynop void op_move_gpr30_pc_delay(void)
490
{
491
  env->pc_delay = env->reg[30];
492
  env->delay_insn = 1;
493
}
494
 
495
__or_dynop void op_move_gpr31_pc_delay(void)
496
{
497
  env->pc_delay = env->reg[31];
498
  env->delay_insn = 1;
499
}
500
 
501
#define OP_FILE "op_1t_op.h"
502
#include "op_1t.h"
503
#undef OP_FILE
504 1658 nogj
 
505
#define OP_FILE "op_2t_op.h"
506
#include "op_2t.h"
507
#undef OP_FILE
508 1660 nogj
 
509
#define OP_FILE "op_3t_op.h"
510
#include "op_3t.h"
511
#undef OP_FILE
512
 
513 1661 nogj
#define OP_FILE "op_arith_op.h"
514 1452 nogj
#define OP_EXTRA
515
 
516
#define OP /
517 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
518 1452 nogj
#define OP_NAME div
519 1661 nogj
#include "op_3t.h"
520 1452 nogj
#undef OP_NAME
521
#undef OP_CAST
522
#undef OP
523
 
524
#define OP /
525 1661 nogj
#define OP_CAST(x) (x)
526 1452 nogj
#define OP_NAME divu
527 1661 nogj
#include "op_3t.h"
528 1452 nogj
#undef OP_NAME
529
#undef OP_CAST
530
#undef OP
531
 
532
#define OP *
533 1661 nogj
#define OP_CAST(x) (x)
534 1452 nogj
#define OP_NAME mulu
535 1661 nogj
#include "op_3t.h"
536 1452 nogj
#undef OP_NAME
537
#undef OP_CAST
538
#undef OP
539
 
540
#define OP -
541 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
542 1452 nogj
#define OP_NAME sub
543 1661 nogj
#include "op_3t.h"
544 1452 nogj
#undef OP_NAME
545
#undef OP_CAST
546
#undef OP
547
 
548
#undef OP_EXTRA
549
 
550
#define OP_EXTRA + ((env->sprs[SPR_SR] & SPR_SR_CY) >> 10)
551
#define OP +
552 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
553 1452 nogj
#define OP_NAME addc
554 1661 nogj
#include "op_3t.h"
555
#include "op_2t.h"
556 1452 nogj
#undef OP_NAME
557
#undef OP_CAST
558
#undef OP
559
 
560
#undef OP_EXTRA
561
#define OP_EXTRA
562
 
563
#define OP +
564 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
565 1452 nogj
#define OP_NAME add
566 1661 nogj
#include "op_3t.h"
567
#include "op_2t.h"
568 1452 nogj
#undef OP_NAME
569
#undef OP_CAST
570
#undef OP
571
 
572
#define OP &
573 1661 nogj
#define OP_CAST(x) (x)
574 1452 nogj
#define OP_NAME and
575 1661 nogj
#include "op_3t.h"
576
#include "op_2t.h"
577 1452 nogj
#undef OP_NAME
578
#undef OP_CAST
579
#undef OP
580
 
581
#define OP *
582 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
583 1452 nogj
#define OP_NAME mul
584 1661 nogj
#include "op_3t.h"
585
#include "op_2t.h"
586 1452 nogj
#undef OP_NAME
587
#undef OP_CAST
588
#undef OP
589
 
590
#define OP |
591 1661 nogj
#define OP_CAST(x) (x)
592 1452 nogj
#define OP_NAME or
593 1661 nogj
#include "op_3t.h"
594
#include "op_2t.h"
595 1452 nogj
#undef OP_NAME
596
#undef OP_CAST
597
#undef OP
598
 
599
#define OP <<
600 1661 nogj
#define OP_CAST(x) (x)
601 1452 nogj
#define OP_NAME sll
602 1661 nogj
#include "op_3t.h"
603
#include "op_2t.h"
604 1452 nogj
#undef OP_NAME
605
#undef OP_CAST
606
#undef OP
607
 
608
#define OP >>
609 1661 nogj
#define OP_CAST(x) (orreg_t)(x)
610 1452 nogj
#define OP_NAME sra
611 1661 nogj
#include "op_3t.h"
612
#include "op_2t.h"
613 1452 nogj
#undef OP_NAME
614
#undef OP_CAST
615
#undef OP
616
 
617
#define OP >>
618 1661 nogj
#define OP_CAST(x) (x)
619 1452 nogj
#define OP_NAME srl
620 1661 nogj
#include "op_3t.h"
621
#include "op_2t.h"
622 1452 nogj
#undef OP_NAME
623
#undef OP_CAST
624
#undef OP
625
 
626
#define OP ^
627 1661 nogj
#define OP_CAST(x) (x)
628 1452 nogj
#define OP_NAME xor
629 1661 nogj
#include "op_3t.h"
630
#include "op_2t.h"
631 1452 nogj
#undef OP_NAME
632
#undef OP_CAST
633
#undef OP
634
 
635
#undef OP_EXTRA
636 1661 nogj
#undef OP_FILE
637 1452 nogj
 
638 1662 nogj
#define OP_FILE "op_extend_op.h"
639
 
640 1452 nogj
#define EXT_NAME extbs
641
#define EXT_TYPE int8_t
642
#define EXT_CAST (orreg_t)
643 1662 nogj
#include "op_2t.h"
644 1452 nogj
#undef EXT_CAST
645
#undef EXT_TYPE
646
#undef EXT_NAME
647
 
648
#define EXT_NAME extbz
649
#define EXT_TYPE uint8_t
650
#define EXT_CAST (uorreg_t)
651 1662 nogj
#include "op_2t.h"
652 1452 nogj
#undef EXT_CAST
653
#undef EXT_TYPE
654
#undef EXT_NAME
655
 
656
#define EXT_NAME exths
657
#define EXT_TYPE int16_t
658
#define EXT_CAST (orreg_t)
659 1662 nogj
#include "op_2t.h"
660 1452 nogj
#undef EXT_CAST
661
#undef EXT_TYPE
662
#undef EXT_NAME
663
 
664
#define EXT_NAME exthz
665
#define EXT_TYPE uint16_t
666
#define EXT_CAST (uorreg_t)
667 1662 nogj
#include "op_2t.h"
668 1452 nogj
#undef EXT_CAST
669
#undef EXT_TYPE
670
#undef EXT_NAME
671
 
672 1662 nogj
#undef OP_FILE
673
 
674 1663 nogj
#define OP_FILE "op_comp_op.h"
675
 
676 1452 nogj
#define COMP ==
677
#define COMP_NAME sfeq
678 1663 nogj
#define COMP_CAST(x) (x)
679
#include "op_2t.h"
680
#include "op_1t.h"
681 1452 nogj
#undef COMP_CAST
682
#undef COMP_NAME
683
#undef COMP
684
 
685
#define COMP !=
686
#define COMP_NAME sfne
687 1663 nogj
#define COMP_CAST(x) (x)
688
#include "op_2t.h"
689
#include "op_1t.h"
690 1452 nogj
#undef COMP_CAST
691
#undef COMP_NAME
692
#undef COMP
693
 
694
#define COMP >
695
#define COMP_NAME sfgtu
696 1663 nogj
#define COMP_CAST(x) (x)
697
#include "op_2t.h"
698
#include "op_1t.h"
699 1452 nogj
#undef COMP_CAST
700
#undef COMP_NAME
701
#undef COMP
702
 
703
#define COMP >=
704
#define COMP_NAME sfgeu
705 1663 nogj
#define COMP_CAST(x) (x)
706
#include "op_2t.h"
707
#include "op_1t.h"
708 1452 nogj
#undef COMP_CAST
709
#undef COMP_NAME
710
#undef COMP
711
 
712
#define COMP <
713
#define COMP_NAME sfltu
714 1663 nogj
#define COMP_CAST(x) (x)
715
#include "op_2t.h"
716
#include "op_1t.h"
717 1452 nogj
#undef COMP_CAST
718
#undef COMP_NAME
719
#undef COMP
720
 
721
#define COMP <=
722
#define COMP_NAME sfleu
723 1663 nogj
#define COMP_CAST(x) (x)
724
#include "op_2t.h"
725
#include "op_1t.h"
726 1452 nogj
#undef COMP_CAST
727
#undef COMP_NAME
728
#undef COMP
729
 
730
#define COMP >
731
#define COMP_NAME sfgts
732 1663 nogj
#define COMP_CAST(x) (orreg_t)(x)
733
#include "op_2t.h"
734
#include "op_1t.h"
735 1452 nogj
#undef COMP_CAST
736
#undef COMP_NAME
737
#undef COMP
738
 
739
#define COMP >=
740
#define COMP_NAME sfges
741 1663 nogj
#define COMP_CAST(x) (orreg_t)(x)
742
#include "op_2t.h"
743
#include "op_1t.h"
744 1452 nogj
#undef COMP_CAST
745
#undef COMP_NAME
746
#undef COMP
747
 
748
#define COMP <
749
#define COMP_NAME sflts
750 1663 nogj
#define COMP_CAST(x) (orreg_t)(x)
751
#include "op_2t.h"
752
#include "op_1t.h"
753 1452 nogj
#undef COMP_CAST
754
#undef COMP_NAME
755
#undef COMP
756
 
757
#define COMP <=
758
#define COMP_NAME sfles
759 1663 nogj
#define COMP_CAST(x) (orreg_t)(x)
760
#include "op_2t.h"
761
#include "op_1t.h"
762 1452 nogj
#undef COMP_CAST
763
#undef COMP_NAME
764
#undef COMP
765
 
766 1663 nogj
#undef OP_FILE
767
 
768 1657 nogj
#define OP_FILE "op_t_reg_mov_op.h"
769
#include "op_1t.h"
770
#undef OP_FILE
771 1452 nogj
 
772 1664 nogj
#define OP_FILE "op_mftspr_op.h"
773
#include "op_1t.h"
774
#include "op_2t.h"
775
#undef OP_FILE
776 1452 nogj
#include "op_mftspr_op.h"
777
 
778 1665 nogj
#define OP_FILE "op_mac_op.h"
779 1452 nogj
 
780
#define OP +=
781
#define OP_NAME mac
782 1665 nogj
#include "op_2t.h"
783 1452 nogj
#undef OP_NAME
784
#undef OP
785
 
786
#define OP -=
787
#define OP_NAME msb
788 1665 nogj
#include "op_2t.h"
789 1452 nogj
#undef OP_NAME
790
#undef OP
791
 
792 1665 nogj
#undef OP_FILE
793
 
794 1666 nogj
#define OP_FILE "op_lwhb_op.h"
795
 
796 1452 nogj
#define LS_OP_NAME lbz
797
#define LS_OP_CAST
798
#define LS_OP_FUNC eval_mem8
799 1666 nogj
#include "op_2t.h"
800
#include "op_1t.h"
801 1452 nogj
#undef LS_OP_FUNC
802
#undef LS_OP_CAST
803
#undef LS_OP_NAME
804
 
805
#define LS_OP_NAME lbs
806
#define LS_OP_CAST (int8_t)
807
#define LS_OP_FUNC eval_mem8
808 1666 nogj
#include "op_2t.h"
809
#include "op_1t.h"
810 1452 nogj
#undef LS_OP_FUNC
811
#undef LS_OP_CAST
812
#undef LS_OP_NAME
813
 
814
#define LS_OP_NAME lhz
815
#define LS_OP_CAST
816
#define LS_OP_FUNC eval_mem16
817 1666 nogj
#include "op_2t.h"
818
#include "op_1t.h"
819 1452 nogj
#undef LS_OP_FUNC
820
#undef LS_OP_CAST
821
#undef LS_OP_NAME
822
 
823
#define LS_OP_NAME lhs
824
#define LS_OP_CAST (int16_t)
825
#define LS_OP_FUNC eval_mem16
826 1666 nogj
#include "op_2t.h"
827
#include "op_1t.h"
828 1452 nogj
#undef LS_OP_FUNC
829
#undef LS_OP_CAST
830
#undef LS_OP_NAME
831
 
832
#define LS_OP_NAME lwz
833
#define LS_OP_CAST
834
#define LS_OP_FUNC eval_mem32
835 1666 nogj
#include "op_2t.h"
836
#include "op_1t.h"
837 1452 nogj
#undef LS_OP_FUNC
838
#undef LS_OP_CAST
839
#undef LS_OP_NAME
840
 
841
#define LS_OP_NAME lws
842
#define LS_OP_CAST (int32_t)
843
#define LS_OP_FUNC eval_mem32
844 1666 nogj
#include "op_2t.h"
845
#include "op_1t.h"
846 1452 nogj
#undef LS_OP_FUNC
847
#undef LS_OP_CAST
848
#undef LS_OP_NAME
849
 
850 1666 nogj
#undef OP_FILE
851
 
852 1667 nogj
#define OP_FILE "op_swhb_op.h"
853
 
854 1452 nogj
#define S_OP_NAME sb
855
#define S_FUNC set_mem8
856
#include "op_swhb_op.h"
857 1667 nogj
#include "op_2t.h"
858
#include "op_1t.h"
859 1452 nogj
#undef S_FUNC
860
#undef S_OP_NAME
861
 
862
#define S_OP_NAME sh
863
#define S_FUNC set_mem16
864
#include "op_swhb_op.h"
865 1667 nogj
#include "op_2t.h"
866
#include "op_1t.h"
867 1452 nogj
#undef S_FUNC
868
#undef S_OP_NAME
869
 
870
#define S_OP_NAME sw
871
#define S_FUNC set_mem32
872
#include "op_swhb_op.h"
873 1667 nogj
#include "op_2t.h"
874
#include "op_1t.h"
875 1452 nogj
#undef S_FUNC
876
#undef S_OP_NAME
877
 
878
__or_dynop void op_join_mem_cycles(void)
879
{
880 1687 nogj
  runtime.sim.cycles += runtime.sim.mem_cycles;
881
  scheduler.job_queue->time -= runtime.sim.mem_cycles;
882
  runtime.sim.mem_cycles = 0;
883 1452 nogj
}
884
 
885
__or_dynop void op_store_link_addr_gpr(void)
886
{
887 1687 nogj
  env->reg[LINK_REGNO] = env->pc + 8;
888 1452 nogj
}
889
 
890
__or_dynop void op_prep_rfe(void)
891
{
892
  env->sprs[SPR_SR] = env->sprs[SPR_ESR_BASE] | SPR_SR_FO;
893 1687 nogj
  env->sprs[SPR_PPC] = env->pc;
894
  env->pc = env->sprs[SPR_EPCR_BASE] - 4;
895 1452 nogj
}
896
 
897
static inline void prep_except(oraddr_t epcr_base)
898
{
899
  env->sprs[SPR_EPCR_BASE] = epcr_base;
900
 
901
  env->sprs[SPR_ESR_BASE] = env->sprs[SPR_SR];
902
 
903
  /* Address translation is always disabled when starting exception. */
904
  env->sprs[SPR_SR] &= ~SPR_SR_DME;
905
  env->sprs[SPR_SR] &= ~SPR_SR_IME;
906
 
907
  env->sprs[SPR_SR] &= ~SPR_SR_OVE;   /* Disable overflow flag exception. */
908
 
909
  env->sprs[SPR_SR] |= SPR_SR_SM;     /* SUPV mode */
910
  env->sprs[SPR_SR] &= ~(SPR_SR_IEE | SPR_SR_TEE);    /* Disable interrupts. */
911
}
912
 
913
__or_dynop void op_set_except_pc(void)
914
{
915 1687 nogj
  env->pc = OP_PARAM1;
916 1452 nogj
}
917
 
918
/* Before the code in op_{sys,trap}{,_delay} gets run, the scheduler runs.
919
 * Therefore the pc will point to the instruction after the l.sys or l.trap
920
 * instruction */
921
__or_dynop void op_prep_sys_delay(void)
922
{
923
  env->delay_insn = 0;
924 1687 nogj
  prep_except(env->pc - 4);
925
  env->pc = EXCEPT_SYSCALL - 4;
926 1452 nogj
}
927
 
928
__or_dynop void op_prep_sys(void)
929
{
930 1687 nogj
  prep_except(env->pc + 4);
931
  env->pc = EXCEPT_SYSCALL - 4;
932 1452 nogj
}
933
 
934
__or_dynop void op_prep_trap_delay(void)
935
{
936
  env->delay_insn = 0;
937 1687 nogj
  prep_except(env->pc - 4);
938
  env->pc = EXCEPT_TRAP - 4;
939 1452 nogj
}
940
 
941
__or_dynop void op_prep_trap(void)
942
{
943 1687 nogj
  prep_except(env->pc);
944
  env->pc = EXCEPT_TRAP - 4;
945 1452 nogj
}
946
 
947
/* FIXME: This `instruction' should be split up like the l.trap and l.sys
948
 * instructions are done */
949
__or_dynop void op_illegal_delay(void)
950
{
951
  env->delay_insn = 0;
952 1687 nogj
  env->sprs[SPR_EEAR_BASE] = env->pc - 4;
953 1692 nogj
  env->pc = EXCEPT_ILLEGAL - 4;
954
  RET_FROM_DYN_CODE;
955 1452 nogj
}
956
 
957
__or_dynop void op_illegal(void)
958
{
959 1687 nogj
  env->sprs[SPR_EEAR_BASE] = env->pc;
960 1692 nogj
  env->pc = EXCEPT_ILLEGAL;
961
  RET_FROM_DYN_CODE;
962 1452 nogj
}
963
 
964
__or_dynop void op_do_sched(void)
965
{
966 1687 nogj
  SPEEDY_CALL(do_sched_wrap);
967 1452 nogj
}
968
 
969 1481 nogj
__or_dynop void op_do_sched_delay(void)
970
{
971 1687 nogj
  SPEEDY_CALL(do_sched_wrap_delay);
972 1481 nogj
}
973
 
974 1452 nogj
__or_dynop void op_macc(void)
975
{
976
  env->sprs[SPR_MACLO] = 0;
977
  env->sprs[SPR_MACHI] = 0;
978
}
979
 
980
__or_dynop void op_store_insn_ea(void)
981
{
982
  env->insn_ea = OP_PARAM1;
983
}
984
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.