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[/] [or1k/] [trunk/] [or1ksim/] [peripheral/] [gpio.c] - Blame information for rev 1774

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/* gpio.h -- GPIO code simulation
 
   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
   Copyright (C) 2008 Embecosm Limited
 
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.
 
   This program is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   more details.
 
   You should have received a copy of the GNU General Public License along
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
/* This program is commented throughout in a fashion suitable for processing
   with Doxygen. */
 
 
/* Autoconf and/or portability configuration */
#include "config.h"
#include "port.h"
 
/* System includes */
#include <stdlib.h>
 
/* Package includes */
#include "sim-config.h"
#include "arch.h"
#include "vapi.h"
#include "sched.h"
#include "pic.h"
#include "abstract.h"
#include "toplevel-support.h"
#include "sim-cmd.h"
 
 
/* Address space required by one GPIO */
#define GPIO_ADDR_SPACE      0x20
 
/* Relative Register Addresses */
#define RGPIO_IN             0x00
#define RGPIO_OUT            0x04
#define RGPIO_OE             0x08
#define RGPIO_INTE           0x0C
#define RGPIO_PTRIG          0x10
#define RGPIO_AUX            0x14
#define RGPIO_CTRL           0x18
#define RGPIO_INTS           0x1C
 
/* Fields inside RGPIO_CTRL */
#define RGPIO_CTRL_ECLK      0x00000001
#define RGPIO_CTRL_NEC       0x00000002
#define RGPIO_CTRL_INTE      0x00000004
#define RGPIO_CTRL_INTS      0x00000008
 
 
/*
 * The various VAPI IDs each GPIO device has
 */
enum
{ GPIO_VAPI_DATA = 0,
  GPIO_VAPI_AUX,
  GPIO_VAPI_CLOCK,
  GPIO_VAPI_RGPIO_OE,
  GPIO_VAPI_RGPIO_INTE,
  GPIO_VAPI_RGPIO_PTRIG,
  GPIO_VAPI_RGPIO_AUX,
  GPIO_VAPI_RGPIO_CTRL,
  GPIO_NUM_VAPI_IDS
};
 
/*
 * Implementatino of GPIO Code Registers and State
 */
struct gpio_device
{
  /* Is peripheral enabled */
  int enabled;
 
  /* Base address in memory */
  oraddr_t baseaddr;
 
  /* Which IRQ to generate */
  int irq;
 
  /* Which GPIO is this? */
  unsigned gpio_number;
 
  /* VAPI IDs */
  unsigned long base_vapi_id;
 
  /* Auxiliary inputs */
  unsigned long auxiliary_inputs;
 
  /* Visible registers */
  struct
  {
    unsigned long in;
    unsigned long out;
    unsigned long oe;
    unsigned long inte;
    unsigned long ptrig;
    unsigned long aux;
    unsigned long ctrl;
    unsigned long ints;
 
    int external_clock;
  } curr, next;
};
 
static void gpio_vapi_read (unsigned long id, unsigned long data, void *dat);
static void gpio_external_clock (unsigned long value,
                                 struct gpio_device *gpio);
static void gpio_device_clock (struct gpio_device *gpio);
static void gpio_clock (void *dat);
 
/* Initialize all parameters and state */
static void
gpio_reset (void *dat)
{
  struct gpio_device *gpio = dat;
 
  if (gpio->baseaddr != 0)
    {
      /* Possibly connect to VAPI */
      if (gpio->base_vapi_id)
        {
          vapi_install_multi_handler (gpio->base_vapi_id, GPIO_NUM_VAPI_IDS,
                                      gpio_vapi_read, dat);
        }
    }
  SCHED_ADD (gpio_clock, dat, 1);
}
 
 
/* Dump status */
static void
gpio_status (void *dat)
{
  struct gpio_device *gpio = dat;
 
  if (gpio->baseaddr == 0)
    return;
 
  PRINTF ("\nGPIO at 0x%" PRIxADDR ":\n", gpio->baseaddr);
  PRINTF ("RGPIO_IN     : 0x%08lX\n", gpio->curr.in);
  PRINTF ("RGPIO_OUT    : 0x%08lX\n", gpio->curr.out);
  PRINTF ("RGPIO_OE     : 0x%08lX\n", gpio->curr.oe);
  PRINTF ("RGPIO_INTE   : 0x%08lX\n", gpio->curr.inte);
  PRINTF ("RGPIO_PTRIG  : 0x%08lX\n", gpio->curr.ptrig);
  PRINTF ("RGPIO_AUX    : 0x%08lX\n", gpio->curr.aux);
  PRINTF ("RGPIO_CTRL   : 0x%08lX\n", gpio->curr.ctrl);
  PRINTF ("RGPIO_INTS   : 0x%08lX\n", gpio->curr.ints);
}
 
 
/* Wishbone read */
static uint32_t
gpio_read32 (oraddr_t addr, void *dat)
{
  struct gpio_device *gpio = dat;
 
  switch (addr)
    {
    case RGPIO_IN:
      return gpio->curr.in | gpio->curr.out;
    case RGPIO_OUT:
      return gpio->curr.out;
    case RGPIO_OE:
      return gpio->curr.oe;
    case RGPIO_INTE:
      return gpio->curr.inte;
    case RGPIO_PTRIG:
      return gpio->curr.ptrig;
    case RGPIO_AUX:
      return gpio->curr.aux;
    case RGPIO_CTRL:
      return gpio->curr.ctrl;
    case RGPIO_INTS:
      return gpio->curr.ints;
    }
 
  return 0;
}
 
 
/* Wishbone write */
static void
gpio_write32 (oraddr_t addr, uint32_t value, void *dat)
{
  struct gpio_device *gpio = dat;
 
  switch (addr)
    {
    case RGPIO_IN:
      break;
    case RGPIO_OUT:
      gpio->next.out = value;
      break;
    case RGPIO_OE:
      gpio->next.oe = value;
      break;
    case RGPIO_INTE:
      gpio->next.inte = value;
      break;
    case RGPIO_PTRIG:
      gpio->next.ptrig = value;
      break;
    case RGPIO_AUX:
      gpio->next.aux = value;
      break;
    case RGPIO_CTRL:
      gpio->next.ctrl = value;
      break;
    case RGPIO_INTS:
      if (gpio->next.ints && !value)
        clear_interrupt (gpio->irq);
      gpio->next.ints = value;
      break;
    }
}
 
 
/* Input from "outside world" */
static void
gpio_vapi_read (unsigned long id, unsigned long data, void *dat)
{
  unsigned which;
  struct gpio_device *gpio = dat;
 
  which = id - gpio->base_vapi_id;
 
  switch (which)
    {
    case GPIO_VAPI_DATA:
      gpio->next.in = data;
      break;
    case GPIO_VAPI_AUX:
      gpio->auxiliary_inputs = data;
      break;
    case GPIO_VAPI_RGPIO_OE:
      gpio->next.oe = data;
      break;
    case GPIO_VAPI_RGPIO_INTE:
      gpio->next.inte = data;
      break;
    case GPIO_VAPI_RGPIO_PTRIG:
      gpio->next.ptrig = data;
      break;
    case GPIO_VAPI_RGPIO_AUX:
      gpio->next.aux = data;
      break;
    case GPIO_VAPI_RGPIO_CTRL:
      gpio->next.ctrl = data;
      break;
    case GPIO_VAPI_CLOCK:
      gpio_external_clock (data, gpio);
      break;
    }
}
 
/* System Clock. */
static void
gpio_clock (void *dat)
{
  struct gpio_device *gpio = dat;
 
  /* Clock the device */
  if (!(gpio->curr.ctrl & RGPIO_CTRL_ECLK))
    gpio_device_clock (gpio);
  SCHED_ADD (gpio_clock, dat, 1);
}
 
/* External Clock. */
static void
gpio_external_clock (unsigned long value, struct gpio_device *gpio)
{
  int use_external_clock =
    ((gpio->curr.ctrl & RGPIO_CTRL_ECLK) == RGPIO_CTRL_ECLK);
  int negative_edge = ((gpio->curr.ctrl & RGPIO_CTRL_NEC) == RGPIO_CTRL_NEC);
 
  /* "Normalize" clock value */
  value = (value != 0);
 
  gpio->next.external_clock = value;
 
  if (use_external_clock
      && (gpio->next.external_clock != gpio->curr.external_clock)
      && (value != negative_edge))
    /* Make sure that in vapi_read, we don't clock the device */
    if (gpio->curr.ctrl & RGPIO_CTRL_ECLK)
      gpio_device_clock (gpio);
}
 
/* Report an interrupt to the sim */
static void
gpio_do_int (void *dat)
{
  struct gpio_device *gpio = dat;
 
  report_interrupt (gpio->irq);
}
 
/* Clock as handld by one device. */
static void
gpio_device_clock (struct gpio_device *gpio)
{
  /* Calculate new inputs and outputs */
  gpio->next.in &= ~gpio->next.oe;      /* Only input bits */
  /* Replace requested output bits with aux input */
  gpio->next.out =
    (gpio->next.out & ~gpio->next.aux) | (gpio->auxiliary_inputs & gpio->next.
                                          aux);
  gpio->next.out &= gpio->next.oe;      /* Only output-enabled bits */
 
  /* If any outputs changed, notify the world (i.e. vapi) */
  if (gpio->next.out != gpio->curr.out)
    {
      if (gpio->base_vapi_id)
        vapi_send (gpio->base_vapi_id + GPIO_VAPI_DATA, gpio->next.out);
    }
 
  /* If any inputs changed and interrupt enabled, generate interrupt */
  if (gpio->next.in != gpio->curr.in)
    {
      if (gpio->next.ctrl & RGPIO_CTRL_INTE)
        {
          unsigned changed_bits = gpio->next.in ^ gpio->curr.in;        /* inputs that have changed */
          unsigned set_bits = changed_bits & gpio->next.in;     /* inputs that have been set */
          unsigned cleared_bits = changed_bits & gpio->curr.in; /* inputs that have been cleared */
          unsigned relevant_bits =
            (gpio->next.ptrig & set_bits) | (~gpio->next.
                                             ptrig & cleared_bits);
 
          if (relevant_bits & gpio->next.inte)
            {
              gpio->next.ctrl |= RGPIO_CTRL_INTS;
              gpio->next.ints |= relevant_bits & gpio->next.inte;
              /* Since we can't report an interrupt during a readmem/writemem
               * schedule the scheduler to do it.  Read the comment above
               * report_interrupt in pic/pic.c */
              SCHED_ADD (gpio_do_int, gpio, 1);
            }
        }
    }
 
  /* Switch to values for next clock */
  memcpy (&(gpio->curr), &(gpio->next), sizeof (gpio->curr));
}
 
/*---------------------------------------------------[ GPIO configuration ]---*/
static void
gpio_baseaddr (union param_val val, void *dat)
{
  struct gpio_device *gpio = dat;
  gpio->baseaddr = val.addr_val;
}
 
static void
gpio_irq (union param_val val, void *dat)
{
  struct gpio_device *gpio = dat;
  gpio->irq = val.int_val;
}
 
static void
gpio_base_vapi_id (union param_val val, void *dat)
{
  struct gpio_device *gpio = dat;
  gpio->base_vapi_id = val.int_val;
}
 
static void
gpio_enabled (union param_val val, void *dat)
{
  struct gpio_device *gpio = dat;
  gpio->enabled = val.int_val;
}
 
static void *
gpio_sec_start (void)
{
  struct gpio_device *new = malloc (sizeof (struct gpio_device));
 
  if (!new)
    {
      fprintf (stderr, "Peripheral gpio: Run out of memory\n");
      exit (-1);
    }
 
  new->auxiliary_inputs = 0;
  memset (&new->curr, 0, sizeof (new->curr));
  memset (&new->next, 0, sizeof (new->next));
 
  new->enabled = 1;
  new->baseaddr = 0;
  new->irq = 0;
  new->base_vapi_id = 0;
 
  return new;
}
 
static void
gpio_sec_end (void *dat)
{
  struct gpio_device *gpio = dat;
  struct mem_ops ops;
 
  if (!gpio->enabled)
    {
      free (dat);
      return;
    }
 
  memset (&ops, 0, sizeof (struct mem_ops));
 
  ops.readfunc32 = gpio_read32;
  ops.writefunc32 = gpio_write32;
  ops.write_dat32 = dat;
  ops.read_dat32 = dat;
 
  /* FIXME: Correct delays? */
  ops.delayr = 2;
  ops.delayw = 2;
 
  /* Register memory range */
  reg_mem_area (gpio->baseaddr, GPIO_ADDR_SPACE, 0, &ops);
 
  reg_sim_reset (gpio_reset, dat);
  reg_sim_stat (gpio_status, dat);
}
 
void
reg_gpio_sec (void)
{
  struct config_section *sec =
    reg_config_sec ("gpio", gpio_sec_start, gpio_sec_end);
 
  reg_config_param (sec, "enabled", paramt_int, gpio_enabled);
  reg_config_param (sec, "baseaddr", paramt_addr, gpio_baseaddr);
  reg_config_param (sec, "irq", paramt_int, gpio_irq);
  reg_config_param (sec, "vapi_id", paramt_int, gpio_base_vapi_id);
  reg_config_param (sec, "base_vapi_id", paramt_int, gpio_base_vapi_id);
}

Line No.	Rev	Author	Line
1	444	erez	`/* gpio.h -- GPIO code simulation`
2	1748	jeremybenn
3	444	erez	`Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org`
4	1748	jeremybenn	`Copyright (C) 2008 Embecosm Limited`
5	444	erez
6	1748	jeremybenn	`Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>`
7	444	erez
8	1748	jeremybenn	`This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.`
9	444	erez
10	1748	jeremybenn	`This program is free software; you can redistribute it and/or modify it`
11			`under the terms of the GNU General Public License as published by the Free`
12			`Software Foundation; either version 3 of the License, or (at your option)`
13			`any later version.`
14
15			`This program is distributed in the hope that it will be useful, but WITHOUT`
16			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
17			`FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for`
18			`more details.`
19
20			`You should have received a copy of the GNU General Public License along`
21			`with this program. If not, see <http://www.gnu.org/licenses/>. */`
22
23			`/* This program is commented throughout in a fashion suitable for processing`
24			`with Doxygen. */`
25
26
27			`/* Autoconf and/or portability configuration */`
28	1350	nogj	`#include "config.h"`
29	1748	jeremybenn	`#include "port.h"`
30	1350	nogj
31	1748	jeremybenn	`/* System includes */`
32			`#include <stdlib.h>`
33	1350	nogj
34	1748	jeremybenn	`/* Package includes */`
35			`#include "sim-config.h"`
36	1350	nogj	`#include "arch.h"`
37	444	erez	`#include "vapi.h"`
38	1374	nogj	`#include "sched.h"`
39	1748	jeremybenn	`#include "pic.h"`
40			`#include "abstract.h"`
41			`#include "toplevel-support.h"`
42			`#include "sim-cmd.h"`
43	444	erez
44	1489	nogj
45	1748	jeremybenn	`/* Address space required by one GPIO */`
46			`#define GPIO_ADDR_SPACE 0x20`
47	1724	nogj
48	1748	jeremybenn	`/* Relative Register Addresses */`
49			`#define RGPIO_IN 0x00`
50			`#define RGPIO_OUT 0x04`
51			`#define RGPIO_OE 0x08`
52			`#define RGPIO_INTE 0x0C`
53			`#define RGPIO_PTRIG 0x10`
54			`#define RGPIO_AUX 0x14`
55			`#define RGPIO_CTRL 0x18`
56			`#define RGPIO_INTS 0x1C`
57
58			`/* Fields inside RGPIO_CTRL */`
59			`#define RGPIO_CTRL_ECLK 0x00000001`
60			`#define RGPIO_CTRL_NEC 0x00000002`
61			`#define RGPIO_CTRL_INTE 0x00000004`
62			`#define RGPIO_CTRL_INTS 0x00000008`
63
64
65	1724	nogj	`/*`
66			`* The various VAPI IDs each GPIO device has`
67			`*/`
68	1748	jeremybenn	`enum`
69			`{ GPIO_VAPI_DATA = 0,`
70			`GPIO_VAPI_AUX,`
71			`GPIO_VAPI_CLOCK,`
72			`GPIO_VAPI_RGPIO_OE,`
73			`GPIO_VAPI_RGPIO_INTE,`
74			`GPIO_VAPI_RGPIO_PTRIG,`
75			`GPIO_VAPI_RGPIO_AUX,`
76			`GPIO_VAPI_RGPIO_CTRL,`
77			`GPIO_NUM_VAPI_IDS`
78			`};`
79	1724	nogj
80			`/*`
81			`* Implementatino of GPIO Code Registers and State`
82			`*/`
83	1748	jeremybenn	`struct gpio_device`
84	1724	nogj	`{`
85			`/* Is peripheral enabled */`
86			`int enabled;`
87
88			`/* Base address in memory */`
89			`oraddr_t baseaddr;`
90
91			`/* Which IRQ to generate */`
92			`int irq;`
93
94			`/* Which GPIO is this? */`
95			`unsigned gpio_number;`
96
97			`/* VAPI IDs */`
98			`unsigned long base_vapi_id;`
99
100			`/* Auxiliary inputs */`
101			`unsigned long auxiliary_inputs;`
102
103			`/* Visible registers */`
104			`struct`
105			`{`
106			`unsigned long in;`
107			`unsigned long out;`
108			`unsigned long oe;`
109			`unsigned long inte;`
110			`unsigned long ptrig;`
111			`unsigned long aux;`
112			`unsigned long ctrl;`
113			`unsigned long ints;`
114
115			`int external_clock;`
116			`} curr, next;`
117			`};`
118
119	1748	jeremybenn	`static void gpio_vapi_read (unsigned long id, unsigned long data, void *dat);`
120			`static void gpio_external_clock (unsigned long value,`
121			`struct gpio_device *gpio);`
122			`static void gpio_device_clock (struct gpio_device *gpio);`
123			`static void gpio_clock (void *dat);`
124	444	erez
125			`/* Initialize all parameters and state */`
126	1748	jeremybenn	`static void`
127			`gpio_reset (void *dat)`
128	444	erez	`{`
129	1374	nogj	`struct gpio_device *gpio = dat;`
130	444	erez
131	1748	jeremybenn	`if (gpio->baseaddr != 0)`
132			`{`
133			`/* Possibly connect to VAPI */`
134			`if (gpio->base_vapi_id)`
135			`{`
136			`vapi_install_multi_handler (gpio->base_vapi_id, GPIO_NUM_VAPI_IDS,`
137			`gpio_vapi_read, dat);`
138			`}`
139	444	erez	`}`
140	1748	jeremybenn	`SCHED_ADD (gpio_clock, dat, 1);`
141	444	erez	`}`
142
143
144			`/* Dump status */`
145	1748	jeremybenn	`static void`
146			`gpio_status (void *dat)`
147	444	erez	`{`
148	1374	nogj	`struct gpio_device *gpio = dat;`
149	1748	jeremybenn
150			`if (gpio->baseaddr == 0)`
151	1374	nogj	`return;`
152	444	erez
153	1748	jeremybenn	`PRINTF ("\nGPIO at 0x%" PRIxADDR ":\n", gpio->baseaddr);`
154			`PRINTF ("RGPIO_IN : 0x%08lX\n", gpio->curr.in);`
155			`PRINTF ("RGPIO_OUT : 0x%08lX\n", gpio->curr.out);`
156			`PRINTF ("RGPIO_OE : 0x%08lX\n", gpio->curr.oe);`
157			`PRINTF ("RGPIO_INTE : 0x%08lX\n", gpio->curr.inte);`
158			`PRINTF ("RGPIO_PTRIG : 0x%08lX\n", gpio->curr.ptrig);`
159			`PRINTF ("RGPIO_AUX : 0x%08lX\n", gpio->curr.aux);`
160			`PRINTF ("RGPIO_CTRL : 0x%08lX\n", gpio->curr.ctrl);`
161			`PRINTF ("RGPIO_INTS : 0x%08lX\n", gpio->curr.ints);`
162	444	erez	`}`
163
164
165			`/* Wishbone read */`
166	1748	jeremybenn	`static uint32_t`
167			`gpio_read32 (oraddr_t addr, void *dat)`
168	444	erez	`{`
169	1374	nogj	`struct gpio_device *gpio = dat;`
170	444	erez
171	1748	jeremybenn	`switch (addr)`
172			`{`
173			`case RGPIO_IN:`
174			`return gpio->curr.in \| gpio->curr.out;`
175			`case RGPIO_OUT:`
176			`return gpio->curr.out;`
177			`case RGPIO_OE:`
178			`return gpio->curr.oe;`
179			`case RGPIO_INTE:`
180			`return gpio->curr.inte;`
181			`case RGPIO_PTRIG:`
182			`return gpio->curr.ptrig;`
183			`case RGPIO_AUX:`
184			`return gpio->curr.aux;`
185			`case RGPIO_CTRL:`
186			`return gpio->curr.ctrl;`
187			`case RGPIO_INTS:`
188			`return gpio->curr.ints;`
189			`}`
190	1374	nogj
191			`return 0;`
192	444	erez	`}`
193
194
195			`/* Wishbone write */`
196	1748	jeremybenn	`static void`
197			`gpio_write32 (oraddr_t addr, uint32_t value, void *dat)`
198	444	erez	`{`
199	1374	nogj	`struct gpio_device *gpio = dat;`
200	444	erez
201	1748	jeremybenn	`switch (addr)`
202			`{`
203			`case RGPIO_IN:`
204			`break;`
205			`case RGPIO_OUT:`
206			`gpio->next.out = value;`
207			`break;`
208			`case RGPIO_OE:`
209			`gpio->next.oe = value;`
210			`break;`
211			`case RGPIO_INTE:`
212			`gpio->next.inte = value;`
213			`break;`
214			`case RGPIO_PTRIG:`
215			`gpio->next.ptrig = value;`
216			`break;`
217			`case RGPIO_AUX:`
218			`gpio->next.aux = value;`
219			`break;`
220			`case RGPIO_CTRL:`
221			`gpio->next.ctrl = value;`
222			`break;`
223			`case RGPIO_INTS:`
224			`if (gpio->next.ints && !value)`
225			`clear_interrupt (gpio->irq);`
226			`gpio->next.ints = value;`
227			`break;`
228			`}`
229	444	erez	`}`
230
231
232			`/* Input from "outside world" */`
233	1748	jeremybenn	`static void`
234			`gpio_vapi_read (unsigned long id, unsigned long data, void *dat)`
235	444	erez	`{`
236			`unsigned which;`
237	1374	nogj	`struct gpio_device *gpio = dat;`
238	444	erez
239	1374	nogj	`which = id - gpio->base_vapi_id;`
240	444	erez
241	1748	jeremybenn	`switch (which)`
242			`{`
243			`case GPIO_VAPI_DATA:`
244			`gpio->next.in = data;`
245			`break;`
246			`case GPIO_VAPI_AUX:`
247			`gpio->auxiliary_inputs = data;`
248			`break;`
249			`case GPIO_VAPI_RGPIO_OE:`
250			`gpio->next.oe = data;`
251			`break;`
252			`case GPIO_VAPI_RGPIO_INTE:`
253			`gpio->next.inte = data;`
254			`break;`
255			`case GPIO_VAPI_RGPIO_PTRIG:`
256			`gpio->next.ptrig = data;`
257			`break;`
258			`case GPIO_VAPI_RGPIO_AUX:`
259			`gpio->next.aux = data;`
260			`break;`
261			`case GPIO_VAPI_RGPIO_CTRL:`
262			`gpio->next.ctrl = data;`
263			`break;`
264			`case GPIO_VAPI_CLOCK:`
265			`gpio_external_clock (data, gpio);`
266			`break;`
267			`}`
268	1564	nogj	`}`
269	444	erez
270	1564	nogj	`/* System Clock. */`
271	1748	jeremybenn	`static void`
272			`gpio_clock (void *dat)`
273	1564	nogj	`{`
274			`struct gpio_device *gpio = dat;`
275
276	1374	nogj	`/* Clock the device */`
277	1748	jeremybenn	`if (!(gpio->curr.ctrl & RGPIO_CTRL_ECLK))`
278			`gpio_device_clock (gpio);`
279			`SCHED_ADD (gpio_clock, dat, 1);`
280	444	erez	`}`
281
282			`/* External Clock. */`
283	1748	jeremybenn	`static void`
284			`gpio_external_clock (unsigned long value, struct gpio_device *gpio)`
285	444	erez	`{`
286	1748	jeremybenn	`int use_external_clock =`
287			`((gpio->curr.ctrl & RGPIO_CTRL_ECLK) == RGPIO_CTRL_ECLK);`
288	1374	nogj	`int negative_edge = ((gpio->curr.ctrl & RGPIO_CTRL_NEC) == RGPIO_CTRL_NEC);`
289	444	erez
290	477	erez	`/* "Normalize" clock value */`
291	444	erez	`value = (value != 0);`
292
293	1374	nogj	`gpio->next.external_clock = value;`
294	1748	jeremybenn
295			`if (use_external_clock`
296			`&& (gpio->next.external_clock != gpio->curr.external_clock)`
297			`&& (value != negative_edge))`
298	1374	nogj	`/* Make sure that in vapi_read, we don't clock the device */`
299	1748	jeremybenn	`if (gpio->curr.ctrl & RGPIO_CTRL_ECLK)`
300			`gpio_device_clock (gpio);`
301	444	erez	`}`
302
303	1374	nogj	`/* Report an interrupt to the sim */`
304	1748	jeremybenn	`static void`
305			`gpio_do_int (void *dat)`
306	1374	nogj	`{`
307			`struct gpio_device *gpio = dat;`
308	477	erez
309	1748	jeremybenn	`report_interrupt (gpio->irq);`
310	1374	nogj	`}`
311
312	444	erez	`/* Clock as handld by one device. */`
313	1748	jeremybenn	`static void`
314			`gpio_device_clock (struct gpio_device *gpio)`
315	444	erez	`{`
316	445	erez	`/* Calculate new inputs and outputs */`
317	1748	jeremybenn	`gpio->next.in &= ~gpio->next.oe; /* Only input bits */`
318	445	erez	`/* Replace requested output bits with aux input */`
319	1748	jeremybenn	`gpio->next.out =`
320			`(gpio->next.out & ~gpio->next.aux) \| (gpio->auxiliary_inputs & gpio->next.`
321			`aux);`
322			`gpio->next.out &= gpio->next.oe; /* Only output-enabled bits */`
323
324	444	erez	`/* If any outputs changed, notify the world (i.e. vapi) */`
325	1748	jeremybenn	`if (gpio->next.out != gpio->curr.out)`
326			`{`
327			`if (gpio->base_vapi_id)`
328			`vapi_send (gpio->base_vapi_id + GPIO_VAPI_DATA, gpio->next.out);`
329			`}`
330
331	445	erez	`/* If any inputs changed and interrupt enabled, generate interrupt */`
332	1748	jeremybenn	`if (gpio->next.in != gpio->curr.in)`
333			`{`
334			`if (gpio->next.ctrl & RGPIO_CTRL_INTE)`
335			`{`
336			`unsigned changed_bits = gpio->next.in ^ gpio->curr.in; /* inputs that have changed */`
337			`unsigned set_bits = changed_bits & gpio->next.in; /* inputs that have been set */`
338			`unsigned cleared_bits = changed_bits & gpio->curr.in; /* inputs that have been cleared */`
339			`unsigned relevant_bits =`
340			`(gpio->next.ptrig & set_bits) \| (~gpio->next.`
341			`ptrig & cleared_bits);`
342
343			`if (relevant_bits & gpio->next.inte)`
344			`{`
345			`gpio->next.ctrl \|= RGPIO_CTRL_INTS;`
346			`gpio->next.ints \|= relevant_bits & gpio->next.inte;`
347			`/* Since we can't report an interrupt during a readmem/writemem`
348			`* schedule the scheduler to do it. Read the comment above`
349			`* report_interrupt in pic/pic.c */`
350			`SCHED_ADD (gpio_do_int, gpio, 1);`
351			`}`
352			`}`
353	444	erez	`}`
354	1748	jeremybenn
355	444	erez	`/* Switch to values for next clock */`
356	1748	jeremybenn	`memcpy (&(gpio->curr), &(gpio->next), sizeof (gpio->curr));`
357	444	erez	`}`
358	1358	nogj
359			`/---------------------------------------------------[ GPIO configuration ]---/`
360	1748	jeremybenn	`static void`
361			`gpio_baseaddr (union param_val val, void *dat)`
362	1358	nogj	`{`
363	1374	nogj	`struct gpio_device *gpio = dat;`
364			`gpio->baseaddr = val.addr_val;`
365	1358	nogj	`}`
366
367	1748	jeremybenn	`static void`
368			`gpio_irq (union param_val val, void *dat)`
369	1358	nogj	`{`
370	1374	nogj	`struct gpio_device *gpio = dat;`
371			`gpio->irq = val.int_val;`
372	1358	nogj	`}`
373
374	1748	jeremybenn	`static void`
375			`gpio_base_vapi_id (union param_val val, void *dat)`
376	1358	nogj	`{`
377	1374	nogj	`struct gpio_device *gpio = dat;`
378			`gpio->base_vapi_id = val.int_val;`
379	1358	nogj	`}`
380
381	1748	jeremybenn	`static void`
382			`gpio_enabled (union param_val val, void *dat)`
383	1461	nogj	`{`
384			`struct gpio_device *gpio = dat;`
385			`gpio->enabled = val.int_val;`
386			`}`
387
388	1748	jeremybenn	`static void *`
389			`gpio_sec_start (void)`
390	1374	nogj	`{`
391	1748	jeremybenn	`struct gpio_device *new = malloc (sizeof (struct gpio_device));`
392	1374	nogj
393	1748	jeremybenn	`if (!new)`
394			`{`
395			`fprintf (stderr, "Peripheral gpio: Run out of memory\n");`
396			`exit (-1);`
397			`}`
398	1374	nogj
399			`new->auxiliary_inputs = 0;`
400	1748	jeremybenn	`memset (&new->curr, 0, sizeof (new->curr));`
401			`memset (&new->next, 0, sizeof (new->next));`
402	1374	nogj
403	1461	nogj	`new->enabled = 1;`
404	1748	jeremybenn	`new->baseaddr = 0;`
405			`new->irq = 0;`
406			`new->base_vapi_id = 0;`
407	1461	nogj
408	1374	nogj	`return new;`
409			`}`
410
411	1748	jeremybenn	`static void`
412			`gpio_sec_end (void *dat)`
413	1374	nogj	`{`
414			`struct gpio_device *gpio = dat;`
415	1486	nogj	`struct mem_ops ops;`
416	1374	nogj
417	1748	jeremybenn	`if (!gpio->enabled)`
418			`{`
419			`free (dat);`
420			`return;`
421			`}`
422	1461	nogj
423	1748	jeremybenn	`memset (&ops, 0, sizeof (struct mem_ops));`
424	1486	nogj
425			`ops.readfunc32 = gpio_read32;`
426			`ops.writefunc32 = gpio_write32;`
427			`ops.write_dat32 = dat;`
428			`ops.read_dat32 = dat;`
429
430			`/* FIXME: Correct delays? */`
431			`ops.delayr = 2;`
432			`ops.delayw = 2;`
433
434	1374	nogj	`/* Register memory range */`
435	1748	jeremybenn	`reg_mem_area (gpio->baseaddr, GPIO_ADDR_SPACE, 0, &ops);`
436	1374	nogj
437	1748	jeremybenn	`reg_sim_reset (gpio_reset, dat);`
438			`reg_sim_stat (gpio_status, dat);`
439	1374	nogj	`}`
440
441	1748	jeremybenn	`void`
442			`reg_gpio_sec (void)`
443	1358	nogj	`{`
444	1748	jeremybenn	`struct config_section *sec =`
445			`reg_config_sec ("gpio", gpio_sec_start, gpio_sec_end);`
446	1358	nogj
447	1748	jeremybenn	`reg_config_param (sec, "enabled", paramt_int, gpio_enabled);`
448			`reg_config_param (sec, "baseaddr", paramt_addr, gpio_baseaddr);`
449			`reg_config_param (sec, "irq", paramt_int, gpio_irq);`
450			`reg_config_param (sec, "vapi_id", paramt_int, gpio_base_vapi_id);`
451			`reg_config_param (sec, "base_vapi_id", paramt_int, gpio_base_vapi_id);`
452	1358	nogj	`}`

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[/] [or1k/] [trunk/] [or1ksim/] [peripheral/] [gpio.c] - Blame information for rev 1774