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/* mc.c -- Simulation of Memory Controller

         Copyright (C) 2001 by Marko Mlinar, markom@opencores.org

         This file is part of OpenRISC 1000 Architectural Simulator.

         This program is free software; you can redistribute it and/or modify

         it under the terms of the GNU General Public License as published by

         the Free Software Foundation; either version 2 of the License, or

         (at your option) any later version.

         This program is distributed in the hope that it will be useful,

         but WITHOUT ANY WARRANTY; without even the implied warranty of

         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.    See the

         GNU General Public License for more details.

         You should have received a copy of the GNU General Public License

         along with this program; if not, write to the Free Software

         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/

/* Prototypes */

void mc_reset();

inline void mc_clock();

#define N_CE        (8)

#define MC_CSR      (0x00)

#define MC_POC      (0x04)

#define MC_BA_MASK  (0x08)

#define MC_CSC(i)   (0x10 + (i) * 4)

#define MC_TMS(i)   (0x14 + (i) * 4)

#define MC_ADDR_SPACE (MC_CSC(N_CE))

struct mc {

  unsigned long csr;

  unsigned long poc;

  unsigned long ba_mask;

  unsigned long csc[N_CE];

  unsigned long tms[N_CE];

};