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/* sim-cmd.c -- Simulator command parsing
 
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
   Copyright (C) 2005 Gy�rgy `nog' Jeney, nog@sdf.lonestar.org
   Copyright (C) 2008 Embecosm Limited
 
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.
 
   This program is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   more details.
 
   You should have received a copy of the GNU General Public License along
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
/* This program is commented throughout in a fashion suitable for processing
   with Doxygen. */
 
 
/* Autoconf and/or portability configuration */
#include "config.h"
 
/* System includes */
#include <stdlib.h>
#include <unistd.h>
#include <stdio.h>
 
#ifdef HAVE_LIBREADLINE
#include <readline/readline.h>
#include <readline/history.h>
#endif /* HAVE_LIBREADLINE */
 
/* Package includes */
#include "sim-cmd.h"
#include "sim-config.h"
#include "execute.h"
#include "labels.h"
#include "gdbcomm.h"
#include "sched.h"
#include "toplevel-support.h"
#include "dumpverilog.h"
#include "profiler.h"
#include "mprofiler.h"
#include "trace.h"
#include "debug-unit.h"
#include "stats.h"
#include "sprs.h"
#include "dcache-model.h"
#include "branch-predict.h"
#include "debug.h"
#include "cuc.h"
#include "rsp-server.h"
 
 
/* The number of instructions to execute before droping into interactive mode */
static long long to_insn_num;
 
struct sim_stat
{
  void (*stat_func) (void *dat);
  void *dat;
  struct sim_stat *next;
};
 
static struct sim_stat *sim_stats = NULL;
 
/* Registers a status printing callback */
void
reg_sim_stat (void (*stat_func) (void *dat), void *dat)
{
  struct sim_stat *new = malloc (sizeof (struct sim_stat));
 
  if (!new)
    {
      fprintf (stderr, "reg_sim_stat: Out-of-memory\n");
      exit (1);
    }
 
  new->stat_func = stat_func;
  new->dat = dat;
  new->next = sim_stats;
  sim_stats = new;
}
 
/* Scheduler job that drops us back into interactive mode after the next
 * instruction has executed */
void
reenter_int (void *dat)
{
  if (!runtime.sim.hush)
    dumpreg ();
  handle_sim_command ();
}
 
static int
sim_cmd_quit (int argc, char **argv)    /* quit */
{
  PRINTF ("\n");
  sim_done ();
  return 0;
}
 
static int
sim_cmd_help (int argc, char **argv)    /* help */
{
  PRINTF ("q                              - quit simulator\n");
  PRINTF ("r                              - display all registers\n");
  PRINTF ("t                              - execute next instruction\n");
  PRINTF
    ("run <instructions> [<hush>]    - execute <instruction> instructions, no reg\n");
  PRINTF ("                                 dump if hush\n");
  PRINTF
    ("pr <r> <value>                 - patch register <r> with <value>\n");
  PRINTF
    ("dm <fromaddr> [<toaddr>]       - display memory from <fromaddr> to <toaddr>\n");
  PRINTF ("de <fromaddr> [<toaddr>]       - debug insn memory\n");
  PRINTF
    ("pm <addr> <value>              - patch memory location <addr> with <value>\n");
  PRINTF
    ("pc <value>                     - patch PC register with <value>\n");
  PRINTF ("cm <fromaddr> <toaddr> <size>  - copy memory\n");
  PRINTF
    ("break <addr>                   - toggle breakpoint at address <addr>\n");
  PRINTF ("breaks                         - print all set breakpoints\n");
  PRINTF ("reset                          - simulator reset\n");
  PRINTF ("hist                           - execution history\n");
  PRINTF
    ("stall                          - stalls the processor and gives control to\n");
  PRINTF ("                                 the debugger\n");
  PRINTF ("unstall                        - unstalls the processor\n");
  PRINTF
    ("stats <num|clear>              - execution statistics num or clear it.\n");
  PRINTF
    ("info                           - configuration info (caches etc.)\n");
  PRINTF
    ("dv <fromaddr> [<toaddr>] [<m>] - dumps memory as verilog module <m>\n");
  PRINTF ("                                 (use redirect to capture)\n");
  PRINTF
    ("dh <fromaddr> [<toaddr>]       - dumps memory as hex code (use redirect)\n");
  PRINTF ("setdbch                        - toggles debug channels on/off\n");
  PRINTF
    ("set <section> <item> = <param> - set configuration.  See sim.cfg for more\n");
  PRINTF ("                                 information.\n");
  PRINTF ("debug                          - toggles simulator debug mode\n");
  PRINTF
    ("cuc                            - enters Custom Unit Compiler command prompt\n");
  PRINTF
    ("help                           - available commands (this list)\n");
  PRINTF
    ("<cmd> > <filename>             - redirect simulator stdout to <filename>\n");
  PRINTF ("                                 (and not emulated PRINTF)\n\n");
  (void)main_mprofiler (0, NULL, 1);
  PRINTF ("\n");
  (void)main_profiler (0, NULL, 1);
  return 0;
}
 
static int
sim_cmd_trace (int argc, char **argv)   /* trace */
{
  runtime.sim.hush = 0;
  sched_next_insn (reenter_int, NULL);
  return 1;
}
 
static int
sim_cmd_dm (int argc, char **argv)      /* dump memory */
{
  static oraddr_t from = 0, to = 0;
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        from = eval_label (argv[1]);
      else
        from = strtoul (argv[1], NULL, 0);
      to = from + 0x40;
    }
  if (argc >= 3)
    to = strtoul (argv[2], NULL, 0);
  dump_memory (from, to);
  PRINTF ("\n");
  return 0;
}
 
static int
sim_cmd_dv (int argc, char **argv)      /* dump memory as verilog */
{
  static oraddr_t from = 0, to = 0;
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        from = eval_label (argv[1]);
      else
        from = strtoul (argv[1], NULL, 0);
      to = from + 0x40;
    }
  if (argc >= 3)
    to = strtoul (argv[2], NULL, 0);
 
  if (argc < 4)
    dumpverilog ("or1k_mem", from, to);
  else
    dumpverilog (argv[3], from, to);
 
  PRINTF ("\n");
  return 0;
}
 
static int
sim_cmd_dh (int argc, char **argv)      /* dump memory as hex */
{
  static oraddr_t from = 0, to = 0;
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        from = eval_label (argv[1]);
      else
        from = strtoul (argv[1], NULL, 0);
      to = from + 0x40;
    }
  if (argc >= 3)
    to = strtoul (argv[2], NULL, 0);
 
  dumphex (from, to);
  PRINTF ("\n");
  return 0;
}
 
static int
sim_cmd_pm (int argc, char **argv)      /* patch memory */
{
  static oraddr_t addr = 0;
  int breakpoint = 0;
 
  if (argc != 3)
    {
      PRINTF ("pm <address> <value>\n");
      return 0;
    }
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        addr = eval_label (argv[1]);
      else
        addr = strtoul (argv[1], NULL, 0);
    }
  set_mem32 (addr, strtoul (argv[2], NULL, 0), &breakpoint);
  return 0;
}
 
static int
sim_cmd_cm (int argc, char **argv)      /* copy memory 2004-01-20 hpanther */
{
  static oraddr_t from = 0, to = 0;
  static unsigned int size = 0;
  int i;
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        from = eval_label (argv[1]);
      else
        from = strtoul (argv[1], NULL, 0);
    }
 
  if (argc >= 3)
    {
      if (argv[2][0] == '_')
        to = eval_label (argv[2]);
      else
        to = strtoul (argv[2], NULL, 0);
    }
 
  if (argc >= 4)
    {
      if (argv[3][0] == '_')
        size = eval_label (argv[3]);
      else
        size = strtoul (argv[3], NULL, 0);
    }
 
  for (i = 0; i < size; i += 4)
    set_direct32 (to + i, eval_direct32 (from + i, 0, 0), 0, 0);
  return 0;
}
 
static int
sim_cmd_pr (int argc, char **argv)      /* patch regs */
{
  if (argc != 3)
    {
      PRINTF ("pr <register> <value>\n");
      return 0;
    }
  setsim_reg (strtoul (argv[1], NULL, 0), strtoul (argv[2], NULL, 0));
#if DYNAMIC_EXECUTION
  PRINTF
    ("WARNING: Patching registers may not work with the dynamic execution model\n");
#endif
  return 0;
}
 
static int
sim_cmd_pc (int argc, char **argv)      /* patch PC */
{
#if DYNAMIC_EXECUTION
  PRINTF ("Patching the pc in the dynamic execution model doesn't work\n");
#else
  if (argc != 2)
    {
      PRINTF ("pc <value>\n");
      return 0;
    }
 
  cpu_state.pc = strtoul (argv[1], NULL, 0);
  pcnext = cpu_state.pc + 4;
#endif
  return 0;
}
 
static int
sim_cmd_breaks (int argc, char **argv)  /* print breakpoints */
{
  print_breakpoints ();
  return 0;
}
 
static int
sim_cmd_break (int argc, char **argv)   /* set/clear breakpoint */
{
#if DYNAMIC_EXECUTION
  PRINTF
    ("Setting simulator breakpoints is not support with the recompiler\n");
  return 0;
#else
  char *p;
  oraddr_t addr;
  struct label_entry *l;
 
  if (argc != 2)
    {
      PRINTF ("break <label or address>\n");
      return 0;
    }
 
  addr = strtoul (argv[1], &p, 0);
  if (*p)
    {
      l = find_label (argv[1]);
      if (l)
        set_insnbrkpoint (l->addr);
      else
        PRINTF ("Label `%s' does not exist\n", argv[1]);
    }
  else
    set_insnbrkpoint (addr);
  return 0;
#endif
}
 
static int
sim_cmd_r (int argc, char **argv)       /* dump regs */
{
  dumpreg ();
  return 0;
}
 
static int
sim_cmd_de (int argc, char **argv)      /* disassemble */
{
  static oraddr_t from = 0, to = 0;
 
  if (argc >= 2)
    {
      if (argv[1][0] == '_')
        from = eval_label (argv[1]);
      else
        from = strtoul (argv[1], NULL, 0);
      to = from + 0x40;
    }
 
  if (argc >= 3)
    to = strtoul (argv[2], NULL, 0);
 
  disassemble_memory (from, to, 1);
  PRINTF ("\n");
  return 0;
}
 
static int
sim_cmd_reset (int argc, char **argv)   /* reset simulator */
{
  sim_reset ();
  return 0;
}
 
static int
sim_cmd_hist (int argc, char **argv)    /* dump history */
{
  int i;
  struct hist_exec *cur;
  if (!config.sim.history)
    {
      PRINTF ("Simulation history disabled.\n");
      return 0;
    }
  for (i = HISTEXEC_LEN, cur = hist_exec_tail->next; i; i--, cur = cur->next)
    disassemble_memory (cur->addr, cur->addr + 4, 1);
  PRINTF ("\n");
  return 0;
}
 
/* Called when it is suspisous that runtime.sim.instructions has reached
 * to_insn_num */
void
check_insn_exec (void *dat)
{
  if (runtime.cpu.instructions < to_insn_num)
    {
      /* Instruction count has not yet been reached, reschedule */
      long long int delta = to_insn_num - runtime.cpu.instructions;
      SCHED_ADD (check_insn_exec, NULL,
                 (delta > INT32_MAX) ? INT32_MAX : delta);
      return;
    }
  handle_sim_command ();
}
 
void
print_insn_exec (void *dat)
{
  dumpreg ();
  if (runtime.cpu.instructions < to_insn_num)
    {
      /* Instruction count has not yet been reached, reschedule */
      sched_next_insn (print_insn_exec, NULL);
      return;
    }
  handle_sim_command ();
}
 
static int
sim_cmd_run (int argc, char **argv)     /* run */
{
  runtime.sim.hush = 0;
  if (argc >= 3)
    {
      if (!strcmp (argv[2], "hush"))
        runtime.sim.hush = 1;
    }
 
  if (argc >= 2)
    {
      if ((to_insn_num = strtoll (argv[1], NULL, 0)) != -1)
        {
          if (runtime.sim.hush)
            {
              /* Schedule a job to run in to_insn_num cycles time since an instruction
               * may execute in only 1 cycle.  check_insn_exec will check if the right
               * number of instructions have been executed.  If not it will
               * reschedule.  */
              SCHED_ADD (check_insn_exec, NULL,
                         (to_insn_num > INT32_MAX) ? INT32_MAX : to_insn_num);
            }
          else
            {
              /* The user wants to see the execution dumps.  Schedule a task to show
               * it to him after each cycle */
              sched_next_insn (print_insn_exec, NULL);
            }
          to_insn_num += runtime.cpu.instructions;
        }
      else
        {
          if (!runtime.sim.hush)
            sched_next_insn (print_insn_exec, NULL);
        }
    }
  else
    /* Run 0 instructions */
    return 0;
 
  return 1;
}
 
static int
sim_cmd_stall (int argc, char **argv)   /* Added by CZ 210801 */
{
#if DYNAMIC_EXECUTION
  PRINTF ("Can't stall the cpu with the dynamic recompiler\n");
  return 0;
#else
  set_stall_state (1);
  runtime.sim.iprompt = 0;
  runtime.sim.hush = 1;
  return 1;
#endif
}
 
static int
sim_cmd_unstall (int argc, char **argv) /* Added by CZ 210801 */
{
#if DYNAMIC_EXECUTION
  PRINTF ("Can't unstall the cpu with the dynamic recompiler\n");
  return 0;
#else
  set_stall_state (0);
  return 0;
#endif
}
 
static int
sim_cmd_stats (int argc, char **argv)   /* stats */
{
  if (argc != 2)
    {
      PRINTF ("stats <stat no. or `clear'>\n");
      return 0;
    }
 
  if (strcmp (argv[1], "clear") == 0)
    {
      initstats ();
      PRINTF ("Cleared.\n");
    }
  else
    {
      printstats (strtoul (argv[1], NULL, 0));
    }
  return 0;
}
 
static int
sim_cmd_info (int argc, char **argv)    /* configuration info */
{
  struct sim_stat *cur_stat = sim_stats;
 
  /* Display info about various modules */
  sprs_status ();
  PRINTF ("\n");
  memory_table_status ();
  if (config.dc.enabled)
    dc_info ();
 
  if (config.bpb.enabled)
    bpb_info ();
  if (config.bpb.btic)
    btic_info ();
 
  while (cur_stat)
    {
      cur_stat->stat_func (cur_stat->dat);
      cur_stat = cur_stat->next;
    }
 
  return 0;
}
 
static int
sim_cmd_setdbch (int argc, char **argv) /* Toggle debug channel on/off */
{
  if (argc != 2)
    {
      PRINTF ("setdbch <channel>\n");
      return 0;
    }
  parse_dbchs (argv[1]);
  return 0;
}
 
static int
sim_cmd_debug (int argc, char **argv)   /* debug mode */
{
  config.sim.debug ^= 1;
  return 0;
}
 
static int
sim_cmd_profile (int argc, char **argv) /* run profiler utility */
{
  return  main_profiler (argc, argv, 0);
}
 
static int
sim_cmd_mprofile (int argc, char **argv)        /* run mprofiler utility */
{
  return  main_mprofiler (argc, argv, 0);
}
 
static int
sim_cmd_cuc (int argc, char **argv)     /* run Custom Unit Compiler */
{
  main_cuc (runtime.sim.filename);
  return 0;
}
 
static int
sim_cmd_set (int argc, char **argv)     /* configuration info */
{
  set_config_command (argc, argv);
  return 0;
}
 
static char *
strip_space (char *str)
{
  while (isblank (*str) && *str)
    str++;
  return str;
}
 
struct sim_command
{
  const char *name;
  int (*cmd_handle) (int argc, char **argv);
};
 
static const struct sim_command sim_commands[] = {
  {"q", sim_cmd_quit},
  {"help", sim_cmd_help},
  {"t", sim_cmd_trace},
  {"dm", sim_cmd_dm},
  {"dv", sim_cmd_dv},
  {"dh", sim_cmd_dh},
  {"pm", sim_cmd_pm},
  {"cm", sim_cmd_cm},
  {"pr", sim_cmd_pr},
  {"pc", sim_cmd_pc},
  {"breaks", sim_cmd_breaks},
  {"break", sim_cmd_break},
  {"r", sim_cmd_r},
  {"de", sim_cmd_de},
  {"reset", sim_cmd_reset},
  {"hist", sim_cmd_hist},
  {"stall", sim_cmd_stall},
  {"unstall", sim_cmd_unstall},
  {"stats", sim_cmd_stats},
  {"info", sim_cmd_info},
  {"run", sim_cmd_run},
  {"setdbch", sim_cmd_setdbch},
  {"debug", sim_cmd_debug},
  {"profile", sim_cmd_profile},
  {"mprofile", sim_cmd_mprofile},
  {"cuc", sim_cmd_cuc},
  {"set", sim_cmd_set},
  {NULL, NULL}
};
 
#ifdef HAVE_LIBREADLINE
static void initialize_readline (void);
#endif
 
void
handle_sim_command (void)
{
  char *redirstr;
  int argc;
  char *argv[5];
  char *cur_arg;
  const struct sim_command *cur_cmd;
#ifdef HAVE_LIBREADLINE
  static char *prev_str = NULL;
#else
  char b2[500];
  static char prev_str[500] = { 0 };
#endif
 
  runtime.sim.iprompt_run = 1;
 
  /* Make sure that check_insn_exec is not left hanging in the scheduler (and
   * breaking the sim when the user doesn't want it to break). */
  SCHED_FIND_REMOVE (check_insn_exec, NULL);
  SCHED_FIND_REMOVE (print_insn_exec, NULL);
 
#ifdef HAVE_LIBREADLINE
  initialize_readline ();       /* Bind our completer. */
#endif
 
  for (;;)
    {
#ifdef HAVE_LIBREADLINE
      cur_arg = readline ("(sim) ");
#else
      PRINTF ("(sim) ");
 
      /* RSP does not get involved during CLI, so only check legacy interface
         here. */
      if (config.debug.gdb_enabled)
        {
          fflush (stdout);
          handle_server_socket (TRUE);  /* block & check_stdin = true */
        }
 
      cur_arg = fgets (b2, sizeof (b2), stdin);
 
      if (!cur_arg)
        sim_done ();
 
      if (!*cur_arg)
        {
          usleep (1000);
          continue;
        }
#endif
 
#ifdef HAVE_LIBREADLINE
      if (!*cur_arg)
        {
          if (prev_str)
            {
              free (cur_arg);
              cur_arg = prev_str;
            }
        }
      else
        {
          prev_str = cur_arg;
          add_history (cur_arg);
        }
#else
      cur_arg = strip_space (cur_arg);
      if (*cur_arg == '\n')
        strcpy (cur_arg, prev_str);
      else
        strcpy (prev_str, cur_arg);
#endif
 
      if ((redirstr = strchr (cur_arg, '>')))
        {
          redirstr = strip_space (++redirstr);
 
          while (!isspace (*redirstr) && *redirstr)
            redirstr++;
          *redirstr = '\0';
 
          redirstr = strchr (cur_arg, '>');
          *redirstr = '\0';
 
          redirstr = strip_space (++redirstr);
          runtime.sim.fout = fopen (redirstr, "w+");
          if (!runtime.sim.fout)
            runtime.sim.fout = stdout;
        }
 
      if (*cur_arg)
        {
          argc = 0;
          while (*cur_arg)
            {
              argv[argc] = cur_arg;
              argc++;
              while (!isspace (*cur_arg) && *cur_arg)
                cur_arg++;
              if (*cur_arg)
                {
                  *cur_arg = '\0';
                  cur_arg = strip_space (cur_arg + 1);
                }
              else
                *cur_arg = '\0';
              if (argc == 5)
                {
                  fprintf (stderr,
                           "Too many arguments given to command `%s'\n",
                           argv[0]);
                  break;
                }
            }
 
          for (cur_cmd = sim_commands; cur_cmd->name; cur_cmd++)
            {
              if (!strcmp (cur_cmd->name, argv[0]))
                {
                  if (cur_cmd->cmd_handle (argc, argv))
                    {
                      runtime.sim.iprompt = 0;
                      runtime.sim.iprompt_run = 0;
                      return;
                    }
                  break;
                }
            }
 
          if (!cur_cmd->name)
            PRINTF ("%s: Unknown command.\n", argv[0]);
        }
 
      if (redirstr)
        {
          redirstr = NULL;
          fclose (runtime.sim.fout);
          runtime.sim.fout = stdout;
        }
 
    }
}
 
#ifdef HAVE_LIBREADLINE
 
int
check_gdb_comm (void)
{
  /* Only do anything for legacy debug interface. RSP does not get involved
     when the CLI is active */
  if (config.debug.gdb_enabled)
    {
      handle_server_socket (TRUE);      /* block & check_stdin = true */
    }
 
  return 0;
}
 
char *command_generator ();
char **sim_completion ();
 
/* Tell the GNU readline library how to complete.  We want to try to complete
   on command names if this is the first word in the line, or on filenames
   if not. */
static void
initialize_readline (void)
{
  /* Allow conditional parsing of the ~/.inputrc file. */
  rl_readline_name = "or1ksim";
 
  /* Tell the completer that we want a crack first. */
  rl_attempted_completion_function = sim_completion;
 
  /* Handle the gdb socket while waiting for input */
  rl_event_hook = check_gdb_comm;
}
 
/* Attempt to complete on the contents of TEXT.  START and END bound the
   region of rl_line_buffer that contains the word to complete.  TEXT is
   the word to complete.  We can use the entire contents of rl_line_buffer
   in case we want to do some simple parsing.  Return the array of matches,
   or NULL if there aren't any. */
/* FIXME: Handle arguments to the `set' command */
char **
sim_completion (char *text, int start, int end)
{
  char **matches;
 
  matches = NULL;
 
  /* If this word is at the start of the line, then it is a command
     to complete.  Otherwise it is the name of a file in the current
     directory. */
  if (!start)
    matches = rl_completion_matches (text, command_generator);
 
  return matches;
}
 
/* Generator function for command completion.  STATE lets us know whether
   to start from scratch; without any state (i.e. STATE == 0), then we
   start at the top of the list. */
char *
command_generator (char *text, int state)
{
  static int list_index, len;
  const char *name;
 
  /* If this is a new word to complete, initialize now.  This includes
     saving the length of TEXT for efficiency, and initializing the index
     variable to 0. */
  if (!state)
    {
      list_index = 0;
      len = strlen (text);
    }
 
  /* Return the next name which partially matches from the command list. */
  while ((name = sim_commands[list_index].name))
    {
      list_index++;
 
      if (strncmp (name, text, len) == 0)
        return strdup (name);
    }
 
  /* If no names matched, then return NULL. */
  return NULL;
}
 
/* Repeats the last command.  */
char *
repeat_last_command ()
{
  int offset = where_history ();
  HIST_ENTRY *hist;
 
  if ((hist = history_get (offset)))
    return strdup (hist->line);
  return 0;
}
 
#endif

Line No.	Rev	Author	Line
1	1353	nogj	`/* sim-cmd.c -- Simulator command parsing`
2	1748	jeremybenn
3	1353	nogj	`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
4			Copyright (C) 2005 Gy�rgy `nog' Jeney, nog@sdf.lonestar.org
5	1748	jeremybenn	`Copyright (C) 2008 Embecosm Limited`
6	1353	nogj
7	1748	jeremybenn	`Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>`
8	1353	nogj
9	1748	jeremybenn	`This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.`
10	1353	nogj
11	1748	jeremybenn	`This program is free software; you can redistribute it and/or modify it`
12			`under the terms of the GNU General Public License as published by the Free`
13			`Software Foundation; either version 3 of the License, or (at your option)`
14			`any later version.`
15	1353	nogj
16	1748	jeremybenn	`This program is distributed in the hope that it will be useful, but WITHOUT`
17			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
18			`FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for`
19			`more details.`
20	1353	nogj
21	1748	jeremybenn	`You should have received a copy of the GNU General Public License along`
22			`with this program. If not, see <http://www.gnu.org/licenses/>. */`
23	1353	nogj
24	1748	jeremybenn	`/* This program is commented throughout in a fashion suitable for processing`
25			`with Doxygen. */`
26
27
28			`/* Autoconf and/or portability configuration */`
29	1353	nogj	`#include "config.h"`
30
31	1748	jeremybenn	`/* System includes */`
32			`#include <stdlib.h>`
33			`#include <unistd.h>`
34			`#include <stdio.h>`
35
36	1353	nogj	`#ifdef HAVE_LIBREADLINE`
37			`#include <readline/readline.h>`
38			`#include <readline/history.h>`
39			`#endif /* HAVE_LIBREADLINE */`
40
41	1748	jeremybenn	`/* Package includes */`
42			`#include "sim-cmd.h"`
43			`#include "sim-config.h"`
44			`#include "execute.h"`
45	1353	nogj	`#include "labels.h"`
46	1748	jeremybenn	`#include "gdbcomm.h"`
47			`#include "sched.h"`
48			`#include "toplevel-support.h"`
49			`#include "dumpverilog.h"`
50			`#include "profiler.h"`
51	1353	nogj	`#include "mprofiler.h"`
52			`#include "trace.h"`
53	1748	jeremybenn	`#include "debug-unit.h"`
54	1353	nogj	`#include "stats.h"`
55	1748	jeremybenn	`#include "sprs.h"`
56			`#include "dcache-model.h"`
57			`#include "branch-predict.h"`
58			`#include "debug.h"`
59	1353	nogj	`#include "cuc.h"`
60	1751	jeremybenn	`#include "rsp-server.h"`
61	1353	nogj
62
63	1471	nogj	`/* The number of instructions to execute before droping into interactive mode */`
64			`static long long to_insn_num;`
65
66	1748	jeremybenn	`struct sim_stat`
67			`{`
68			`void (stat_func) (void dat);`
69	1363	nogj	`void *dat;`
70			`struct sim_stat *next;`
71			`};`
72
73			`static struct sim_stat *sim_stats = NULL;`
74
75			`/* Registers a status printing callback */`
76	1748	jeremybenn	`void`
77			`reg_sim_stat (void (stat_func) (void dat), void *dat)`
78	1363	nogj	`{`
79	1748	jeremybenn	`struct sim_stat *new = malloc (sizeof (struct sim_stat));`
80	1363	nogj
81	1748	jeremybenn	`if (!new)`
82			`{`
83			`fprintf (stderr, "reg_sim_stat: Out-of-memory\n");`
84			`exit (1);`
85			`}`
86	1363	nogj
87			`new->stat_func = stat_func;`
88			`new->dat = dat;`
89			`new->next = sim_stats;`
90			`sim_stats = new;`
91			`}`
92
93	1471	nogj	`/* Scheduler job that drops us back into interactive mode after the next`
94			`* instruction has executed */`
95	1748	jeremybenn	`void`
96			`reenter_int (void *dat)`
97	1471	nogj	`{`
98	1748	jeremybenn	`if (!runtime.sim.hush)`
99			`dumpreg ();`
100			`handle_sim_command ();`
101	1471	nogj	`}`
102
103	1748	jeremybenn	`static int`
104			`sim_cmd_quit (int argc, char *argv) / quit */`
105	1353	nogj	`{`
106			`PRINTF ("\n");`
107	1748	jeremybenn	`sim_done ();`
108	1353	nogj	`return 0;`
109			`}`
110
111	1748	jeremybenn	`static int`
112			`sim_cmd_help (int argc, char *argv) / help */`
113	1353	nogj	`{`
114	1748	jeremybenn	`PRINTF ("q - quit simulator\n");`
115			`PRINTF ("r - display all registers\n");`
116			`PRINTF ("t - execute next instruction\n");`
117			`PRINTF`
118			`("run <instructions> [<hush>] - execute <instruction> instructions, no reg\n");`
119			`PRINTF (" dump if hush\n");`
120			`PRINTF`
121			`("pr <r> <value> - patch register <r> with <value>\n");`
122			`PRINTF`
123			`("dm <fromaddr> [<toaddr>] - display memory from <fromaddr> to <toaddr>\n");`
124			`PRINTF ("de <fromaddr> [<toaddr>] - debug insn memory\n");`
125			`PRINTF`
126			`("pm <addr> <value> - patch memory location <addr> with <value>\n");`
127			`PRINTF`
128			`("pc <value> - patch PC register with <value>\n");`
129			`PRINTF ("cm <fromaddr> <toaddr> <size> - copy memory\n");`
130			`PRINTF`
131			`("break <addr> - toggle breakpoint at address <addr>\n");`
132			`PRINTF ("breaks - print all set breakpoints\n");`
133			`PRINTF ("reset - simulator reset\n");`
134			`PRINTF ("hist - execution history\n");`
135			`PRINTF`
136			`("stall - stalls the processor and gives control to\n");`
137			`PRINTF (" the debugger\n");`
138			`PRINTF ("unstall - unstalls the processor\n");`
139			`PRINTF`
140			`("stats <num\|clear> - execution statistics num or clear it.\n");`
141			`PRINTF`
142			`("info - configuration info (caches etc.)\n");`
143			`PRINTF`
144			`("dv <fromaddr> [<toaddr>] [<m>] - dumps memory as verilog module <m>\n");`
145			`PRINTF (" (use redirect to capture)\n");`
146			`PRINTF`
147			`("dh <fromaddr> [<toaddr>] - dumps memory as hex code (use redirect)\n");`
148			`PRINTF ("setdbch - toggles debug channels on/off\n");`
149			`PRINTF`
150			`("set <section> <item> = <param> - set configuration. See sim.cfg for more\n");`
151			`PRINTF (" information.\n");`
152			`PRINTF ("debug - toggles simulator debug mode\n");`
153			`PRINTF`
154			`("cuc - enters Custom Unit Compiler command prompt\n");`
155			`PRINTF`
156			`("help - available commands (this list)\n");`
157			`PRINTF`
158			`("<cmd> > <filename> - redirect simulator stdout to <filename>\n");`
159			`PRINTF (" (and not emulated PRINTF)\n\n");`
160			`(void)main_mprofiler (0, NULL, 1);`
161			`PRINTF ("\n");`
162			`(void)main_profiler (0, NULL, 1);`
163	1353	nogj	`return 0;`
164			`}`
165
166	1748	jeremybenn	`static int`
167			`sim_cmd_trace (int argc, char *argv) / trace */`
168	1353	nogj	`{`
169	1471	nogj	`runtime.sim.hush = 0;`
170	1748	jeremybenn	`sched_next_insn (reenter_int, NULL);`
171	1353	nogj	`return 1;`
172			`}`
173
174	1748	jeremybenn	`static int`
175			`sim_cmd_dm (int argc, char *argv) / dump memory */`
176	1353	nogj	`{`
177			`static oraddr_t from = 0, to = 0;`
178
179	1748	jeremybenn	`if (argc >= 2)`
180			`{`
181			`if (argv[1][0] == '_')`
182			`from = eval_label (argv[1]);`
183			`else`
184			`from = strtoul (argv[1], NULL, 0);`
185			`to = from + 0x40;`
186			`}`
187			`if (argc >= 3)`
188			`to = strtoul (argv[2], NULL, 0);`
189			`dump_memory (from, to);`
190			`PRINTF ("\n");`
191	1353	nogj	`return 0;`
192			`}`
193
194	1748	jeremybenn	`static int`
195			`sim_cmd_dv (int argc, char *argv) / dump memory as verilog */`
196	1353	nogj	`{`
197			`static oraddr_t from = 0, to = 0;`
198	1748	jeremybenn
199			`if (argc >= 2)`
200			`{`
201			`if (argv[1][0] == '_')`
202			`from = eval_label (argv[1]);`
203			`else`
204			`from = strtoul (argv[1], NULL, 0);`
205			`to = from + 0x40;`
206			`}`
207			`if (argc >= 3)`
208			`to = strtoul (argv[2], NULL, 0);`
209
210			`if (argc < 4)`
211			`dumpverilog ("or1k_mem", from, to);`
212	1353	nogj	`else`
213	1748	jeremybenn	`dumpverilog (argv[3], from, to);`
214	1353	nogj
215	1748	jeremybenn	`PRINTF ("\n");`
216	1353	nogj	`return 0;`
217			`}`
218
219	1748	jeremybenn	`static int`
220			`sim_cmd_dh (int argc, char *argv) / dump memory as hex */`
221	1353	nogj	`{`
222			`static oraddr_t from = 0, to = 0;`
223
224	1748	jeremybenn	`if (argc >= 2)`
225			`{`
226			`if (argv[1][0] == '_')`
227			`from = eval_label (argv[1]);`
228			`else`
229			`from = strtoul (argv[1], NULL, 0);`
230			`to = from + 0x40;`
231			`}`
232			`if (argc >= 3)`
233			`to = strtoul (argv[2], NULL, 0);`
234	1353	nogj
235	1748	jeremybenn	`dumphex (from, to);`
236			`PRINTF ("\n");`
237	1353	nogj	`return 0;`
238			`}`
239
240	1748	jeremybenn	`static int`
241			`sim_cmd_pm (int argc, char *argv) / patch memory */`
242	1353	nogj	`{`
243			`static oraddr_t addr = 0;`
244			`int breakpoint = 0;`
245
246	1748	jeremybenn	`if (argc != 3)`
247			`{`
248			`PRINTF ("pm <address> <value>\n");`
249			`return 0;`
250			`}`
251	1353	nogj
252	1748	jeremybenn	`if (argc >= 2)`
253			`{`
254			`if (argv[1][0] == '_')`
255			`addr = eval_label (argv[1]);`
256			`else`
257			`addr = strtoul (argv[1], NULL, 0);`
258			`}`
259			`set_mem32 (addr, strtoul (argv[2], NULL, 0), &breakpoint);`
260	1353	nogj	`return 0;`
261			`}`
262
263	1748	jeremybenn	`static int`
264			`sim_cmd_cm (int argc, char *argv) / copy memory 2004-01-20 hpanther */`
265	1353	nogj	`{`
266			`static oraddr_t from = 0, to = 0;`
267			`static unsigned int size = 0;`
268			`int i;`
269
270	1748	jeremybenn	`if (argc >= 2)`
271			`{`
272			`if (argv[1][0] == '_')`
273			`from = eval_label (argv[1]);`
274			`else`
275			`from = strtoul (argv[1], NULL, 0);`
276			`}`
277	1353	nogj
278	1748	jeremybenn	`if (argc >= 3)`
279			`{`
280			`if (argv[2][0] == '_')`
281			`to = eval_label (argv[2]);`
282			`else`
283			`to = strtoul (argv[2], NULL, 0);`
284			`}`
285	1353	nogj
286	1748	jeremybenn	`if (argc >= 4)`
287			`{`
288			`if (argv[3][0] == '_')`
289			`size = eval_label (argv[3]);`
290			`else`
291			`size = strtoul (argv[3], NULL, 0);`
292			`}`
293	1353	nogj
294	1748	jeremybenn	`for (i = 0; i < size; i += 4)`
295			`set_direct32 (to + i, eval_direct32 (from + i, 0, 0), 0, 0);`
296	1353	nogj	`return 0;`
297			`}`
298
299	1748	jeremybenn	`static int`
300			`sim_cmd_pr (int argc, char *argv) / patch regs */`
301	1353	nogj	`{`
302	1748	jeremybenn	`if (argc != 3)`
303			`{`
304			`PRINTF ("pr <register> <value>\n");`
305			`return 0;`
306			`}`
307			`setsim_reg (strtoul (argv[1], NULL, 0), strtoul (argv[2], NULL, 0));`
308	1471	nogj	`#if DYNAMIC_EXECUTION`
309	1748	jeremybenn	`PRINTF`
310			`("WARNING: Patching registers may not work with the dynamic execution model\n");`
311	1471	nogj	`#endif`
312	1353	nogj	`return 0;`
313			`}`
314
315	1748	jeremybenn	`static int`
316			`sim_cmd_pc (int argc, char *argv) / patch PC */`
317	1353	nogj	`{`
318	1471	nogj	`#if DYNAMIC_EXECUTION`
319	1748	jeremybenn	`PRINTF ("Patching the pc in the dynamic execution model doesn't work\n");`
320	1471	nogj	`#else`
321	1748	jeremybenn	`if (argc != 2)`
322			`{`
323			`PRINTF ("pc <value>\n");`
324			`return 0;`
325			`}`
326	1353	nogj
327	1748	jeremybenn	`cpu_state.pc = strtoul (argv[1], NULL, 0);`
328	1432	nogj	`pcnext = cpu_state.pc + 4;`
329	1471	nogj	`#endif`
330	1353	nogj	`return 0;`
331			`}`
332
333	1748	jeremybenn	`static int`
334			`sim_cmd_breaks (int argc, char *argv) / print breakpoints */`
335	1353	nogj	`{`
336	1748	jeremybenn	`print_breakpoints ();`
337	1353	nogj	`return 0;`
338			`}`
339
340	1748	jeremybenn	`static int`
341			`sim_cmd_break (int argc, char *argv) / set/clear breakpoint */`
342	1353	nogj	`{`
343	1479	nogj	`#if DYNAMIC_EXECUTION`
344	1748	jeremybenn	`PRINTF`
345			`("Setting simulator breakpoints is not support with the recompiler\n");`
346	1479	nogj	`return 0;`
347			`#else`
348	1353	nogj	`char *p;`
349			`oraddr_t addr;`
350			`struct label_entry *l;`
351
352	1748	jeremybenn	`if (argc != 2)`
353			`{`
354			`PRINTF ("break <label or address>\n");`
355			`return 0;`
356			`}`
357	1353	nogj
358	1748	jeremybenn	`addr = strtoul (argv[1], &p, 0);`
359			`if (*p)`
360			`{`
361			`l = find_label (argv[1]);`
362			`if (l)`
363			`set_insnbrkpoint (l->addr);`
364			`else`
365			PRINTF ("Label `%s' does not exist\n", argv[1]);
366			`}`
367			`else`
368			`set_insnbrkpoint (addr);`
369	1353	nogj	`return 0;`
370	1479	nogj	`#endif`
371	1353	nogj	`}`
372
373	1748	jeremybenn	`static int`
374			`sim_cmd_r (int argc, char *argv) / dump regs */`
375	1353	nogj	`{`
376	1748	jeremybenn	`dumpreg ();`
377	1353	nogj	`return 0;`
378			`}`
379
380	1748	jeremybenn	`static int`
381			`sim_cmd_de (int argc, char *argv) / disassemble */`
382	1353	nogj	`{`
383			`static oraddr_t from = 0, to = 0;`
384
385	1748	jeremybenn	`if (argc >= 2)`
386			`{`
387			`if (argv[1][0] == '_')`
388			`from = eval_label (argv[1]);`
389			`else`
390			`from = strtoul (argv[1], NULL, 0);`
391			`to = from + 0x40;`
392			`}`
393	1353	nogj
394	1748	jeremybenn	`if (argc >= 3)`
395			`to = strtoul (argv[2], NULL, 0);`
396	1353	nogj
397	1748	jeremybenn	`disassemble_memory (from, to, 1);`
398			`PRINTF ("\n");`
399	1353	nogj	`return 0;`
400			`}`
401
402	1748	jeremybenn	`static int`
403			`sim_cmd_reset (int argc, char *argv) / reset simulator */`
404	1353	nogj	`{`
405	1748	jeremybenn	`sim_reset ();`
406	1353	nogj	`return 0;`
407			`}`
408
409	1748	jeremybenn	`static int`
410			`sim_cmd_hist (int argc, char *argv) / dump history */`
411	1353	nogj	`{`
412			`int i;`
413			`struct hist_exec *cur;`
414	1748	jeremybenn	`if (!config.sim.history)`
415			`{`
416			`PRINTF ("Simulation history disabled.\n");`
417			`return 0;`
418			`}`
419			`for (i = HISTEXEC_LEN, cur = hist_exec_tail->next; i; i--, cur = cur->next)`
420			`disassemble_memory (cur->addr, cur->addr + 4, 1);`
421			`PRINTF ("\n");`
422	1353	nogj	`return 0;`
423			`}`
424
425	1471	nogj	`/* Called when it is suspisous that runtime.sim.instructions has reached`
426			`* to_insn_num */`
427	1748	jeremybenn	`void`
428			`check_insn_exec (void *dat)`
429	1471	nogj	`{`
430	1748	jeremybenn	`if (runtime.cpu.instructions < to_insn_num)`
431			`{`
432			`/* Instruction count has not yet been reached, reschedule */`
433			`long long int delta = to_insn_num - runtime.cpu.instructions;`
434			`SCHED_ADD (check_insn_exec, NULL,`
435			`(delta > INT32_MAX) ? INT32_MAX : delta);`
436			`return;`
437			`}`
438			`handle_sim_command ();`
439	1471	nogj	`}`
440
441	1748	jeremybenn	`void`
442			`print_insn_exec (void *dat)`
443	1471	nogj	`{`
444	1748	jeremybenn	`dumpreg ();`
445			`if (runtime.cpu.instructions < to_insn_num)`
446			`{`
447			`/* Instruction count has not yet been reached, reschedule */`
448			`sched_next_insn (print_insn_exec, NULL);`
449			`return;`
450			`}`
451			`handle_sim_command ();`
452	1471	nogj	`}`
453
454	1748	jeremybenn	`static int`
455			`sim_cmd_run (int argc, char *argv) / run */`
456	1353	nogj	`{`
457	1471	nogj	`runtime.sim.hush = 0;`
458	1748	jeremybenn	`if (argc >= 3)`
459			`{`
460			`if (!strcmp (argv[2], "hush"))`
461			`runtime.sim.hush = 1;`
462			`}`
463	1353	nogj
464	1748	jeremybenn	`if (argc >= 2)`
465			`{`
466			`if ((to_insn_num = strtoll (argv[1], NULL, 0)) != -1)`
467			`{`
468			`if (runtime.sim.hush)`
469			`{`
470			`/* Schedule a job to run in to_insn_num cycles time since an instruction`
471			`* may execute in only 1 cycle. check_insn_exec will check if the right`
472			`* number of instructions have been executed. If not it will`
473			`* reschedule. */`
474			`SCHED_ADD (check_insn_exec, NULL,`
475			`(to_insn_num > INT32_MAX) ? INT32_MAX : to_insn_num);`
476			`}`
477			`else`
478			`{`
479			`/* The user wants to see the execution dumps. Schedule a task to show`
480			`* it to him after each cycle */`
481			`sched_next_insn (print_insn_exec, NULL);`
482			`}`
483			`to_insn_num += runtime.cpu.instructions;`
484			`}`
485			`else`
486			`{`
487			`if (!runtime.sim.hush)`
488			`sched_next_insn (print_insn_exec, NULL);`
489			`}`
490	1471	nogj	`}`
491	1748	jeremybenn	`else`
492	1471	nogj	`/* Run 0 instructions */`
493			`return 0;`
494
495	1353	nogj	`return 1;`
496			`}`
497
498	1748	jeremybenn	`static int`
499			`sim_cmd_stall (int argc, char *argv) / Added by CZ 210801 */`
500	1353	nogj	`{`

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