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[/] [or1k/] [trunk/] [or1ksim/] [testbench/] [basic.S] - Blame information for rev 1767

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Line No. Rev Author Line
1 432 markom 
/* Basic instruction set test */
2 
#include "spr_defs.h"
3 970 simons 
#include "board.h"
4 432 markom 
 
5 970 simons 
#define MEM_RAM 0x00000000
6 432 markom 
 
7 970 simons 
#define MC_CSR          (0x00)
8 
#define MC_POC          (0x04)
9 
#define MC_BA_MASK      (0x08)
10 
#define MC_CSC(i)       (0x10 + (i) * 8)
11 
#define MC_TMS(i)       (0x14 + (i) * 8)
12 
 
13 
  .section .except, "ax"
14 
  l.addi    r1,r0,0
15 
 
16 
  .section .text
17 
 
18 432 markom 
        .org 0x100
19 
_reset:
20 970 simons 
  l.movhi r1,hi(_init_mc)
21 
  l.ori   r1,r1,lo(_init_mc)
22 432 markom 
        l.jr    r1
23 
        l.nop
24 
 
25 970 simons 
 
26 
_init_mc:
27 
 
28 
  l.movhi r3,hi(MC_BASE_ADDR)
29 
  l.ori   r3,r3,lo(MC_BASE_ADDR)
30 
 
31 
  l.addi  r4,r3,MC_CSC(0)
32 
  l.movhi r5,hi(FLASH_BASE_ADDR)
33 
  l.srai  r5,r5,6
34 
  l.ori   r5,r5,0x0025
35 
  l.sw    0(r4),r5
36 
 
37 
  l.addi  r4,r3,MC_TMS(0)
38 
  l.movhi r5,hi(FLASH_TMS_VAL)
39 
  l.ori   r5,r5,lo(FLASH_TMS_VAL)
40 
  l.sw    0(r4),r5
41 
 
42 
  l.addi  r4,r3,MC_BA_MASK
43 
  l.addi  r5,r0,MC_MASK_VAL
44 
  l.sw    0(r4),r5
45 
 
46 
  l.addi  r4,r3,MC_CSR
47 
  l.movhi r5,hi(MC_CSR_VAL)
48 
  l.ori   r5,r5,lo(MC_CSR_VAL)
49 
  l.sw    0(r4),r5
50 
 
51 
  l.addi  r4,r3,MC_TMS(1)
52 
  l.movhi r5,hi(SDRAM_TMS_VAL)
53 
  l.ori   r5,r5,lo(SDRAM_TMS_VAL)
54 
  l.sw    0(r4),r5
55 
 
56 
  l.addi  r4,r3,MC_CSC(1)
57 
  l.movhi r5,hi(SDRAM_BASE_ADDR)
58 
  l.srai  r5,r5,6
59 
  l.ori   r5,r5,0x0411
60 
  l.sw    0(r4),r5
61 
 
62 
 
63 432 markom 
_regs:
64 
        l.addi  r1,r0,0x1
65 
        l.addi  r2,r1,0x2
66 
        l.addi  r3,r2,0x4
67 
        l.addi  r4,r3,0x8
68 
        l.addi  r5,r4,0x10
69 
        l.addi  r6,r5,0x20
70 
        l.addi  r7,r6,0x40
71 
        l.addi  r8,r7,0x80
72 
        l.addi  r9,r8,0x100
73 
        l.addi  r10,r9,0x200
74 
        l.addi  r11,r10,0x400
75 
        l.addi  r12,r11,0x800
76 
        l.addi  r13,r12,0x1000
77 
        l.addi  r14,r13,0x2000
78 
        l.addi  r15,r14,0x4000
79 
        l.addi  r16,r15,0x8000
80 
 
81 
        l.sub   r31,r0,r1
82 
        l.sub   r30,r31,r2
83 
        l.sub   r29,r30,r3
84 
        l.sub   r28,r29,r4
85 
        l.sub   r27,r28,r5
86 
        l.sub   r26,r27,r6
87 
        l.sub   r25,r26,r7
88 
        l.sub   r24,r25,r8
89 
        l.sub   r23,r24,r9
90 
        l.sub   r22,r23,r10
91 
        l.sub   r21,r22,r11
92 
        l.sub   r20,r21,r12
93 
        l.sub   r19,r20,r13
94 
        l.sub   r18,r19,r14
95 
        l.sub   r17,r18,r15
96 
        l.sub   r16,r17,r16
97 
 
98 511 markom 
  l.or  r3,r0,r16
99 
  l.nop NOP_REPORT  /* Should be 0xffff0012 */
100 432 markom 
 
101 
        l.movhi r31, hi(MEM_RAM)
102 
        l.ori  r31,r31, lo(MEM_RAM)
103 
        l.sw    0(r31),r16
104 
 
105 
_mem:   l.movhi r3,0x1234
106 
        l.ori   r3,r3,0x5678
107 
 
108 
        l.sw    4(r31),r3
109 
 
110 
        l.lbz   r4,4(r31)
111 
        l.add   r8,r8,r4
112 
        l.sb    11(r31),r4
113 
        l.lbz   r4,5(r31)
114 
        l.add   r8,r8,r4
115 
        l.sb    10(r31),r4
116 
        l.lbz   r4,6(r31)
117 
        l.add   r8,r8,r4
118 
        l.sb    9(r31),r4
119 
        l.lbz   r4,7(r31)
120 
        l.add   r8,r8,r4
121 
        l.sb    8(r31),r4
122 
 
123 
        l.lbs   r4,8(r31)
124 
        l.add   r8,r8,r4
125 
        l.sb    7(r31),r4
126 
        l.lbs   r4,9(r31)
127 
        l.add   r8,r8,r4
128 
        l.sb    6(r31),r4
129 
        l.lbs   r4,10(r31)
130 
        l.add   r8,r8,r4
131 
        l.sb    5(r31),r4
132 
        l.lbs   r4,11(r31)
133 
        l.add   r8,r8,r4
134 
        l.sb    4(r31),r4
135 
 
136 
        l.lhz   r4,4(r31)
137 
        l.add   r8,r8,r4
138 
        l.sh    10(r31),r4
139 
        l.lhz   r4,6(r31)
140 
        l.add   r8,r8,r4
141 
        l.sh    8(r31),r4
142 
 
143 
        l.lhs   r4,8(r31)
144 
        l.add   r8,r8,r4
145 
        l.sh    6(r31),r4
146 
        l.lhs   r4,10(r31)
147 
        l.add   r8,r8,r4
148 
        l.sh    4(r31),r4
149 
 
150 
        l.lwz   r4,4(r31)
151 
        l.add   r8,r8,r4
152 
 
153 511 markom 
  l.or  r3,r0,r8
154 
  l.nop NOP_REPORT   /* Should be 0x12352af7 */
155 432 markom 
 
156 
        l.lwz   r9,0(r31)
157 
        l.add   r8,r9,r8
158 
        l.sw    0(r31),r8
159 
 
160 
_arith:
161 
        l.addi  r3,r0,1
162 
        l.addi  r4,r0,2
163 
        l.addi  r5,r0,-1
164 
        l.addi  r6,r0,-1
165 
        l.addi  r8,r0,0
166 
 
167 
        l.sub   r7,r5,r3
168 
        l.sub   r8,r3,r5
169 
        l.add   r8,r8,r7
170 
 
171 
        l.div   r7,r7,r4
172 
        l.add   r9,r3,r4
173 
        l.mul   r7,r9,r7
174 
        l.divu  r7,r7,r4
175 
        l.add   r8,r8,r7
176 
 
177 511 markom 
        l.or  r3,r0,r8
178 
  l.nop NOP_REPORT   /* Should be 0x7ffffffe */
179 432 markom 
 
180 
        l.lwz   r9,0(r31)
181 
        l.add   r8,r9,r8
182 
        l.sw    0(r31),r8
183 
 
184 
_log:
185 
        l.addi  r3,r0,1
186 
        l.addi  r4,r0,2
187 
        l.addi  r5,r0,-1
188 
        l.addi  r6,r0,-1
189 
        l.addi  r8,r0,0
190 
 
191 
        l.andi  r8,r8,1
192 
        l.and   r8,r8,r3
193 
 
194 
        l.xori  r8,r5,0xa5a5
195 
        l.xor   r8,r8,r5
196 
 
197 
        l.ori   r8,r8,2
198 
        l.or    r8,r8,r4
199 
 
200 511 markom 
        l.or  r3,r0,r8
201 
  l.nop NOP_REPORT   /* Should be 0xffffa5a7 */
202 432 markom 
 
203 
        l.lwz   r9,0(r31)
204 
        l.add   r8,r9,r8
205 
        l.sw    0(r31),r8
206 
 
207 
_shift:
208 
        l.addi  r3,r0,1
209 
        l.addi  r4,r0,2
210 
        l.addi  r5,r0,-1
211 
        l.addi  r6,r0,-1
212 
        l.addi  r8,r0,0
213 
 
214 
        l.slli  r8,r5,6
215 
        l.sll   r8,r8,r4
216 
 
217 
        l.srli  r8,r8,6
218 
        l.srl   r8,r8,r4
219 
 
220 
        l.srai  r8,r8,2
221 
        l.sra   r8,r8,r4
222 
 
223 511 markom 
        l.or  r3,r0,r8
224 
  l.nop NOP_REPORT  /* Should be 0x000fffff */
225 432 markom 
 
226 
        l.lwz   r9,0(r31)
227 
        l.add   r8,r9,r8
228 
        l.sw    0(r31),r8
229 
 
230 
_flag:
231 
        l.addi  r3,r0,1
232 
        l.addi  r4,r0,-2
233 
        l.addi  r8,r0,0
234 
 
235 
        l.sfeq  r3,r3
236 
        l.mfspr r5,r0,17
237 
        l.andi  r4,r5,0x200
238 
        l.add   r8,r8,r4
239 
 
240 
        l.sfeq  r3,r4
241 
        l.mfspr r5,r0,17
242 
        l.andi  r4,r5,0x200
243 
        l.add   r8,r8,r4
244 
 
245 
        l.sfeqi r3,1
246 
        l.mfspr r5,r0,17
247 
        l.andi  r4,r5,0x200
248 
        l.add   r8,r8,r4
249 
 
250 
        l.sfeqi r3,-2
251 
        l.mfspr r5,r0,17
252 
        l.andi  r4,r5,0x200
253 
        l.add   r8,r8,r4
254 
 
255 
        l.sfne  r3,r3
256 
        l.mfspr r5,r0,17
257 
        l.andi  r4,r5,0x200
258 
        l.add   r8,r8,r4
259 
 
260 
        l.sfne  r3,r4
261 
        l.mfspr r5,r0,17
262 
        l.andi  r4,r5,0x200
263 
        l.add   r8,r8,r4
264 
 
265 
        l.sfnei r3,1
266 
        l.mfspr r5,r0,17
267 
        l.andi  r4,r5,0x200
268 
        l.add   r8,r8,r4
269 
 
270 
        l.sfnei r3,-2
271 
        l.mfspr r5,r0,17
272 
        l.andi  r4,r5,0x200
273 
        l.add   r8,r8,r4
274 
 
275 
        l.sfgtu r3,r3
276 
        l.mfspr r5,r0,17
277 
        l.andi  r4,r5,0x200
278 
        l.add   r8,r8,r4
279 
 
280 
        l.sfgtu r3,r4
281 
        l.mfspr r5,r0,17
282 
        l.andi  r4,r5,0x200
283 
        l.add   r8,r8,r4
284 
 
285 
        l.sfgtui        r3,1
286 
        l.mfspr r5,r0,17
287 
        l.andi  r4,r5,0x200
288 
        l.add   r8,r8,r4
289 
 
290 
        l.sfgtui        r3,-2
291 
        l.mfspr r5,r0,17
292 
        l.andi  r4,r5,0x200
293 
        l.add   r8,r8,r4
294 
 
295 
        l.sfgeu r3,r3
296 
        l.mfspr r5,r0,17
297 
        l.andi  r4,r5,0x200
298 
        l.add   r8,r8,r4
299 
 
300 
        l.sfgeu r3,r4
301 
        l.mfspr r5,r0,17
302 
        l.andi  r4,r5,0x200
303 
        l.add   r8,r8,r4
304 
 
305 
        l.sfgeui        r3,1
306 
        l.mfspr r5,r0,17
307 
        l.andi  r4,r5,0x200
308 
        l.add   r8,r8,r4
309 
 
310 
        l.sfgeui        r3,-2
311 
        l.mfspr r5,r0,17
312 
        l.andi  r4,r5,0x200
313 
        l.add   r8,r8,r4
314 
 
315 
        l.sfltu r3,r3
316 
        l.mfspr r5,r0,17
317 
        l.andi  r4,r5,0x200
318 
        l.add   r8,r8,r4
319 
 
320 
        l.sfltu r3,r4
321 
        l.mfspr r5,r0,17
322 
        l.andi  r4,r5,0x200
323 
        l.add   r8,r8,r4
324 
 
325 
        l.sfltui        r3,1
326 
        l.mfspr r5,r0,17
327 
        l.andi  r4,r5,0x200
328 
        l.add   r8,r8,r4
329 
 
330 
        l.sfltui        r3,-2
331 
        l.mfspr r5,r0,17
332 
        l.andi  r4,r5,0x200
333 
        l.add   r8,r8,r4
334 
 
335 
        l.sfleu r3,r3
336 
        l.mfspr r5,r0,17
337 
        l.andi  r4,r5,0x200
338 
        l.add   r8,r8,r4
339 
 
340 
        l.sfleu r3,r4
341 
        l.mfspr r5,r0,17
342 
        l.andi  r4,r5,0x200
343 
        l.add   r8,r8,r4
344 
 
345 
        l.sfleui        r3,1
346 
        l.mfspr r5,r0,17
347 
        l.andi  r4,r5,0x200
348 
        l.add   r8,r8,r4
349 
 
350 
        l.sfleui        r3,-2
351 
        l.mfspr r5,r0,17
352 
        l.andi  r4,r5,0x200
353 
        l.add   r8,r8,r4
354 
 
355 
        l.sfgts r3,r3
356 
        l.mfspr r5,r0,17
357 
        l.andi  r4,r5,0x200
358 
        l.add   r8,r8,r4
359 
 
360 
        l.sfgts r3,r4
361 
        l.mfspr r5,r0,17
362 
        l.andi  r4,r5,0x200
363 
        l.add   r8,r8,r4
364 
 
365 
        l.sfgtsi        r3,1
366 
        l.mfspr r5,r0,17
367 
        l.andi  r4,r5,0x200
368 
        l.add   r8,r8,r4
369 
 
370 
        l.sfgtsi        r3,-2
371 
        l.mfspr r5,r0,17
372 
        l.andi  r4,r5,0x200
373 
        l.add   r8,r8,r4
374 
 
375 
        l.sfges r3,r3
376 
        l.mfspr r5,r0,17
377 
        l.andi  r4,r5,0x200
378 
        l.add   r8,r8,r4
379 
 
380 
        l.sfges r3,r4
381 
        l.mfspr r5,r0,17
382 
        l.andi  r4,r5,0x200
383 
        l.add   r8,r8,r4
384 
 
385 
        l.sfgesi        r3,1
386 
        l.mfspr r5,r0,17
387 
        l.andi  r4,r5,0x200
388 
        l.add   r8,r8,r4
389 
 
390 
        l.sfgesi        r3,-2
391 
        l.mfspr r5,r0,17
392 
        l.andi  r4,r5,0x200
393 
        l.add   r8,r8,r4
394 
 
395 
        l.sflts r3,r3
396 
        l.mfspr r5,r0,17
397 
        l.andi  r4,r5,0x200
398 
        l.add   r8,r8,r4
399 
 
400 
        l.sflts r3,r4
401 
        l.mfspr r5,r0,17
402 
        l.andi  r4,r5,0x200
403 
        l.add   r8,r8,r4
404 
 
405 
        l.sfltsi        r3,1
406 
        l.mfspr r5,r0,17
407 
        l.andi  r4,r5,0x200
408 
        l.add   r8,r8,r4
409 
 
410 
        l.sfltsi        r3,-2
411 
        l.mfspr r5,r0,17
412 
        l.andi  r4,r5,0x200
413 
        l.add   r8,r8,r4
414 
 
415 
        l.sfles r3,r3
416 
        l.mfspr r5,r0,17
417 
        l.andi  r4,r5,0x200
418 
        l.add   r8,r8,r4
419 
 
420 
        l.sfles r3,r4
421 
        l.mfspr r5,r0,17
422 
        l.andi  r4,r5,0x200
423 
        l.add   r8,r8,r4
424 
 
425 
        l.sflesi        r3,1
426 
        l.mfspr r5,r0,17
427 
        l.andi  r4,r5,0x200
428 
        l.add   r8,r8,r4
429 
 
430 
        l.sflesi        r3,-2
431 
        l.mfspr r5,r0,17
432 
        l.andi  r4,r5,0x200
433 
        l.add   r8,r8,r4
434 
 
435 511 markom 
        l.or  r3,r0,r8
436 
  l.nop NOP_REPORT   /* Should be 0x00002800 */
437 432 markom 
 
438 
        l.lwz   r9,0(r31)
439 
        l.add   r8,r9,r8
440 
        l.sw    0(r31),r8
441 
 
442 
_jump:
443 
        l.addi  r8,r0,0
444 
 
445 
        l.j     _T1
446 
        l.addi  r8,r8,1
447 
 
448 
_T2:    l.jr    r9
449 
        l.addi  r8,r8,1
450 
 
451 
_T1:    l.jal   _T2
452 
        l.addi  r8,r8,1
453 
 
454 
        l.sfeqi r0,0
455 
        l.bf    _T3
456 
        l.addi  r8,r8,1
457 
 
458 
_T3:    l.sfeqi r0,1
459 
        l.bf    _T4
460 
        l.addi  r8,r8,1
461 
 
462 
        l.addi  r8,r8,1
463 
 
464 
_T4:    l.sfeqi r0,0
465 
        l.bnf    _T5
466 
        l.addi  r8,r8,1
467 
 
468 
        l.addi  r8,r8,1
469 
 
470 
_T5:    l.sfeqi r0,1
471 
        l.bnf    _T6
472 
        l.addi  r8,r8,1
473 
 
474 
        l.addi  r8,r8,1
475 
 
476 
_T6:    l.movhi r3,hi(_T7)
477 909 lampret 
        l.ori  r3,r3,lo(_T7)
478 432 markom 
        l.mtspr r0,r3,32
479 
        l.mfspr r5,r0,17
480 
        l.mtspr r0,r5,64
481 
        l.rfe
482 
        l.addi  r8,r8,1 /* l.rfe should not have a delay slot */
483 
 
484 
        l.addi  r8,r8,1
485 
 
486 511 markom 
_T7:    l.or  r3,r0,r8
487 
  l.nop NOP_REPORT   /* Should be 0x000000009 */
488 432 markom 
 
489 
        l.lwz   r9,0(r31)
490 
        l.add   r8,r9,r8
491 
        l.sw    0(r31),r8
492 
 
493 
        l.lwz   r9,0(r31)
494 
        l.movhi r3,0x4c69
495 
        l.ori   r3,r3,0xe5f7
496 
        l.add   r8,r8,r3
497 
 
498 511 markom 
        l.or  r3,r0,r8
499 
  l.nop NOP_REPORT   /* Should be 0xdeaddead */
500 432 markom 
 
501 
        l.addi  r3,r0,0
502 511 markom 
        l.nop NOP_EXIT
503 432 markom 
 

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