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ivang |
/* mc_dram.c - Memory Controller testbench dram test
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Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "support.h"
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#include "mc_common.h"
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#include "mc_dram.h"
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#include "../peripheral/mc.h"
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#include "../peripheral/fields.h"
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typedef volatile unsigned long *REGISTER;
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unsigned long nRowSize = 0;
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unsigned long nColumns = 0;
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REGISTER mc_poc = (unsigned long*)(MC_BASE + MC_POC);
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REGISTER mc_csr = (unsigned long*)(MC_BASE + MC_CSR);
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REGISTER mc_ba_mask = (unsigned long*)(MC_BASE + MC_BA_MASK);
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unsigned long lpoc;
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unsigned long set_config()
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{
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REGISTER mc_csc;
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unsigned char ch;
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lpoc = *mc_poc;
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for (ch=0; ch<8; ch++) {
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if (MC_SDRAM_CSMASK & (0x01 << ch) ) {
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mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
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SET_FIELD(*mc_csc, MC_CSC, MS, mc_sdram_cs[ch].MS);
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SET_FIELD(*mc_csc, MC_CSC, BW, mc_sdram_cs[ch].BW);
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SET_FIELD(*mc_csc, MC_CSC, SEL, mc_sdram_cs[ch].M);
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SET_FLAG(*mc_csc, MC_CSC, EN);
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printf ("Channel Config %d - CSC = 0x%08lX\n", ch, *mc_csc);
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}
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}
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return 0;
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}
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int main()
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{
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unsigned long ret;
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unsigned char ch;
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unsigned long j, i;
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unsigned long test;
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unsigned long nRowSize = 0;
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unsigned long nRows = 0;
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unsigned long nRowSh = 0;
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unsigned long nRowGrp = 0;
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unsigned long nGroups = 0;
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unsigned long nAddress;
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unsigned long mc_sel;
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REGISTER mc_tms;
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REGISTER mc_cs;
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/* set configuration */
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randomin(7435);
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/*
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if ( (ret = set_config()) != 0) {
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exit(ret);
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}
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*/
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for (ch=0; ch<8; ch++) {
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if (MC_SDRAM_CSMASK & (0x01 << ch) ) {
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printf ("--- Begin Test on CS%d ---\n", ch);
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mc_cs = (unsigned long*)(MC_BASE + MC_CSC(ch));
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mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
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mc_sel = GET_FIELD(*mc_cs, MC_CSC, SEL);
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, OM, 0); /*normal op*/
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, CL, 3); /*CAS*/
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switch ( mc_sdram_cs[ch].BW + (3 * mc_sdram_cs[ch].MS) ) {
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case 0:
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case 4:
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nRowSize = MC_SDRAM_ROWSIZE_0;
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nRows = MC_SDRAM_ROWS_0;
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nRowSh = MC_SDRAM_ROWSH_0; break;
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case 1:
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case 5:
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nRowSize = MC_SDRAM_ROWSIZE_1;
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nRows = MC_SDRAM_ROWS_1;
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nRowSh = MC_SDRAM_ROWSH_1; break;
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case 2:
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nRowSize = MC_SDRAM_ROWSIZE_2;
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nRows = MC_SDRAM_ROWS_2;
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nRowSh = MC_SDRAM_ROWSH_2; break;
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case 3:
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nRowSize = MC_SDRAM_ROWSIZE_3;
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nRows = MC_SDRAM_ROWS_3;
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nRowSh = MC_SDRAM_ROWSH_3; break;
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case 6:
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nRowSize = MC_SDRAM_ROWSIZE_6;
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nRows = MC_SDRAM_ROWS_6;
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nRowSh = MC_SDRAM_ROWSH_6; break;
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case 7:
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nRowSize = MC_SDRAM_ROWSIZE_7;
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nRows = MC_SDRAM_ROWS_7;
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nRowSh = MC_SDRAM_ROWSH_7; break;
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case 8:
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nRowSize = MC_SDRAM_ROWSIZE_8;
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nRows = MC_SDRAM_ROWS_8;
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nRowSh = MC_SDRAM_ROWSH_8; break;
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}
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printf ("CS configuration : CSC - 0x%08lX, TMS - 0x%08lX, rs = %lu, nr = %lu, sh = %lu, sel = %lu\n",
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*mc_cs, *mc_tms, nRowSize, nRows, nRowSh, mc_sel);
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nRows -= MC_SDRAM_ROW_OFF;
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for (test=0; test<16; test++) {
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/* configure MC*/
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CLEAR_FLAG(*mc_cs, MC_CSC, PEN); /* no parity */
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CLEAR_FLAG(*mc_cs, MC_CSC, KRO); /* close row */
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CLEAR_FLAG(*mc_cs, MC_CSC, BAS); /* bank after column */
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CLEAR_FLAG(*mc_cs, MC_CSC, WP); /* write enable */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* single loc access */
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* sequential burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 0); /* 1 */
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switch (test) {
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case 0:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST0) != MC_SDRAM_TEST0)
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continue;
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break;
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case 1:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST1) != MC_SDRAM_TEST1)
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continue;
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SET_FLAG(*mc_cs, MC_CSC, PEN); /* parity */
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break;
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case 2:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST2) != MC_SDRAM_TEST2)
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continue;
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SET_FLAG(*mc_cs, MC_CSC, KRO); /* keep row */
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break;
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case 3:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST3) != MC_SDRAM_TEST3)
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continue;
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SET_FLAG(*mc_cs, MC_CSC, BAS); /* bank after row*/
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break;
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case 4:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST4) != MC_SDRAM_TEST4)
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continue;
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SET_FLAG(*mc_cs, MC_CSC, WP); /* RO */
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break;
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case 5:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST5) != MC_SDRAM_TEST5)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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break;
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case 6:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST6) != MC_SDRAM_TEST6)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
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break;
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case 7:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST7) != MC_SDRAM_TEST7)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
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break;
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case 8:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST8) != MC_SDRAM_TEST8)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
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break;
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case 9:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST9) != MC_SDRAM_TEST9)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* full page */
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break;
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case 10:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST10) != MC_SDRAM_TEST10)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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break;
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case 11:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST11) != MC_SDRAM_TEST11)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
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break;
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case 12:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST12) != MC_SDRAM_TEST12)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
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break;
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case 13:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST13) != MC_SDRAM_TEST13)
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continue;
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
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break;
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case 14:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST14) != MC_SDRAM_TEST14)
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continue;
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227 |
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* fullrow */
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break;
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case 15:
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if ((MC_SDRAM_TESTS & MC_SDRAM_TEST15) != MC_SDRAM_TEST15)
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continue;
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SET_FLAG(*mc_cs, MC_CSC, KRO); /* keep row */
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CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
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SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
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SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
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break;
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239 |
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} /*switch test*/
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240 |
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241 |
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printf ("Begin TEST %lu : CSC - 0x%08lX, TMS - 0x%08lX\n", test, *mc_cs, *mc_tms);
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243 |
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if (MC_SDRAM_ACC & MC_SDRAM_SROW) {
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244 |
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/* perform sequential row access */
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printf("Seuential Row\n");
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246 |
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for (j=MC_SDRAM_ROW_OFF; j<nRows/2; j++) {
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247 |
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nAddress = mc_sel << 21;
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248 |
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nAddress |= MC_MEM_BASE;
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249 |
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nAddress += (j << nRowSh);
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250 |
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ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
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251 |
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252 |
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printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
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253 |
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254 |
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if (ret) {
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255 |
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report(ret);
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256 |
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return ret;
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257 |
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}
|
258 |
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}
|
259 |
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}
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260 |
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261 |
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if (MC_SDRAM_ACC & MC_SDRAM_RROW) {
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262 |
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/* perform random row access */
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263 |
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printf("Random Row\n");
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264 |
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for (j=MC_SDRAM_ROW_OFF; j<nRows/2; j++) {
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265 |
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nAddress = mc_sel << 21;
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266 |
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nAddress |= MC_MEM_BASE;
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267 |
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nAddress += ( (MC_SDRAM_ROW_OFF + random(nRows)) << nRowSh);
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268 |
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ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
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269 |
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|
270 |
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printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
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271 |
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|
272 |
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if (ret) {
|
273 |
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return ret;
|
274 |
|
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}
|
275 |
|
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}
|
276 |
|
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}
|
277 |
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|
278 |
|
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if (MC_SDRAM_ACC & MC_SDRAM_SGRP) {
|
279 |
|
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/* perform sequential row in group access */
|
280 |
|
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printf("Sequential Group ");
|
281 |
|
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|
282 |
|
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nGroups = MC_SDRAM_GROUPSIZE;
|
283 |
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printf("Group Size = %lu\n", nGroups);
|
284 |
|
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for (i=nRows/nGroups-1; i<nRows/nGroups; i++) {
|
285 |
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nRowGrp = random(nRows - nGroups) + MC_SDRAM_ROW_OFF;
|
286 |
|
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for (j=0; j<nGroups; j++) {
|
287 |
|
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nAddress = mc_sel << 21;
|
288 |
|
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nAddress |= MC_MEM_BASE;
|
289 |
|
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nAddress += ((nRowGrp+j) << nRowSh);
|
290 |
|
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ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
|
291 |
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|
292 |
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printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
|
293 |
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|
294 |
|
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if (ret) {
|
295 |
|
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report(ret);
|
296 |
|
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return ret;
|
297 |
|
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}
|
298 |
|
|
}
|
299 |
|
|
}
|
300 |
|
|
}
|
301 |
|
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|
302 |
|
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if (MC_SDRAM_ACC & MC_SDRAM_RGRP) {
|
303 |
|
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/* perform random row in group access */
|
304 |
|
|
printf("Random Group ");
|
305 |
|
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|
306 |
|
|
nGroups = MC_SDRAM_GROUPSIZE;
|
307 |
|
|
printf("Group Size = %lu\n", nGroups);
|
308 |
|
|
for (i=(nRows/nGroups)-1; i<nRows/nGroups; i++) {
|
309 |
|
|
nRowGrp = random(nRows - nGroups) + MC_SDRAM_ROW_OFF;
|
310 |
|
|
for (j=0; j<nGroups; j++) {
|
311 |
|
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nAddress = mc_sel << 21;
|
312 |
|
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nAddress |= MC_MEM_BASE;
|
313 |
|
|
nAddress += ((nRowGrp + random(nGroups)) << nRowSh);
|
314 |
|
|
ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
|
315 |
|
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|
316 |
|
|
printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
|
317 |
|
|
|
318 |
|
|
if (ret) {
|
319 |
|
|
report(ret);
|
320 |
|
|
return ret;
|
321 |
|
|
}
|
322 |
|
|
}
|
323 |
|
|
}
|
324 |
|
|
} /*for groups*/
|
325 |
|
|
|
326 |
|
|
} /*for test*/
|
327 |
|
|
} /*if*/
|
328 |
|
|
} /*for CS*/
|
329 |
|
|
printf("--- End SDRAM tests ---\n");
|
330 |
|
|
report(0xDEADDEAD);
|
331 |
|
|
return 0;
|
332 |
|
|
} /* main */
|