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[/] [or1k/] [trunk/] [orpmon/] [cmds/] [eth.c] - Blame information for rev 855

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#include "common.h"
#include "uart.h"
#include "eth.h"
#include "support.h"
#include "spr_defs.h"
 
#if 0
extern int tx_pointer_index;
unsigned long dest_mac_addr[6];
 
void show_tx_bd(int start, int max)
{
  int i;
 
  for(i = start; i <= max; i++) {
    /* Read Tx BD */
    printf ("LEN:%04lx", REG32(ETH_BD_BASE + (i << 3)) >> 16);
    printf (" RD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 15) & 0x1);
    printf (" IRQ:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 14) & 0x1);
    printf (" WR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 13) & 0x1);
    printf (" PAD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 12) & 0x1);
    printf (" CRC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 11) & 0x1);
    printf (" UR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 8) & 0x1);
    printf (" RTRY:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 4) & 0xf);
    printf (" RL:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 3) & 0x1);
    printf (" LC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 2) & 0x1);
    printf (" DF:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 1) & 0x1);
    printf (" CS:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 0) & 0x1);
    printf ("\nTx Buffer Pointer: %08lx\n", REG32(ETH_BD_BASE + (i << 3) + 4));
  }
}
 
void show_rx_bd (int start, int max)
{
  int i;
  unsigned long rx_bd_base, rx_bd_num;
 
  rx_bd_num =  REG32(ETH_REG_BASE + ETH_RXBD_NUM);
  rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);
 
  for(i = start; i <= max; i++){
    /* Read Rx BD */
    printf ("LEN:%04lx", REG32(rx_bd_base + (i << 3)) >> 16);
    printf (" E:%04lx", (REG32(rx_bd_base + (i << 3)) >> 15) & 0x1);
    printf (" IRQ:%04lx", (REG32(rx_bd_base + (i << 3)) >> 14) & 0x1);
    printf (" WR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 13) & 0x1);
    printf (" M:%04lx", (REG32(rx_bd_base + (i << 3)) >> 7) & 0x1);
    printf (" OR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 6) & 0x1);
    printf (" IS:%04lx", (REG32(rx_bd_base + (i << 3)) >> 5) & 0x1);
    printf (" DN:%04lx", (REG32(rx_bd_base + (i << 3)) >> 4) & 0x1);
    printf (" TL:%04lx", (REG32(rx_bd_base + (i << 3)) >> 3) & 0x1);
    printf (" SF:%04lx", (REG32(rx_bd_base + (i << 3)) >> 2) & 0x1);
    printf (" CRC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 1) & 0x1);
    printf (" LC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 0) & 0x1);
    printf ("\nRx Buffer Pointer: %08lx\n", REG32(rx_bd_base + (i << 3) + 4));
  }
}
 
void show_buffer(unsigned long start_addr, unsigned long len)
{
  show_mem(start_addr, start_addr + len - 1);
}
 
void show_rx_buffs(int max, int show_all)
{
 
  int i;
  unsigned long rx_bd_base, rx_bd_num;
 
  rx_bd_num =  REG32(ETH_REG_BASE + ETH_RXBD_NUM);
  rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);
 
  for(i=0; i<=max; i++)
  {
    if (!(REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_EMPTY) || show_all)
    {
      printf ("Rx BD No. %04x located at %08lx\n", i, rx_bd_base + (i << 3));
      show_rx_bd(i, i);
      show_buffer(REG32(rx_bd_base + (i << 3) + 4), REG32(rx_bd_base + (i << 3)) >> 16);
      printf ("\n");
    }
    if (REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_WRAP)
      return;
  }
}
 
void show_tx_buffs(int max)
{
  int i;
 
  for(i=0; i<=max; i++)
  {
    if (1)
    {
      printf ("Tx BD No. %04x located at %08x\n", i, ETH_BD_BASE + (i << 3));
      show_tx_bd(i, i);
      show_buffer(REG32(ETH_BD_BASE + (i << 3) + 4), REG32(ETH_BD_BASE + (i << 3)) >> 16);
      printf ("\n");
    }
    if (REG32(ETH_BD_BASE + (i << 3)) & ETH_TX_BD_WRAP)
      return;
  }
}
 
void show_phy_reg (unsigned long start_addr, unsigned long stop_addr)
{
 
  unsigned long addr;
 
  if (start_addr == stop_addr)
  {
    printf ("\nSet MII RGAD ADDRESS to %08lx", start_addr);
    printf ("\nMII Command = Read Status\n");
  }
 
  for (addr = start_addr; addr <= stop_addr; addr++)
  {
    REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8;
    REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT;
 
    printf ("PHY %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) & 0x1f);
    printf (", addr %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) >> 8);
    printf (": %08lx\n", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));
  }
}
 
void set_phy_reg (unsigned long addr, unsigned long val)
{
  printf ("\nSet MII RGAD ADDRESS to %08lx", addr);
 
  REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8;
 
  printf ("\nMII Command = Write Control Data\n");
  REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA;
 
  REG32(ETH_REG_BASE + ETH_MIITX_DATA) = val;
 
  show_phy_reg(addr, addr);
}
 
void send_packet (unsigned long len, unsigned long start_data, int num_of_packets)
{
  unsigned long i, TxBD;
 
  while (num_of_packets--) {
    unsigned long *data = (unsigned long *)eth_get_tx_buf ();
 
    /* Set dest & src address */
    *data++ = dest_mac_addr[0] << 24 |
              dest_mac_addr[1] << 16 |
              dest_mac_addr[2] << 8  |
              dest_mac_addr[3] << 0;
 
    *data++ = dest_mac_addr[4] << 24 |
              dest_mac_addr[5] << 16 |
              ETH_MACADDR0     << 8  |
              ETH_MACADDR1     << 0;
 
    *data++ = ETH_MACADDR2     << 24 |
              ETH_MACADDR3     << 16 |
              ETH_MACADDR4     << 8  |
              ETH_MACADDR5     << 0;
 
    /* Write data to buffer */
    for(i = 12; i < len; i += 4)
      *data++ = (i + start_data - 12) << 24 | (i + start_data + 1 - 12) << 16 |
                (i + start_data + 2 - 12) << 8 | (i + start_data + 3 - 12);
 
    eth_send (data, len);
    printf (".");
  }
}
 
int eth_init_cmd (int argc, char *argv[])
{
  if (argc) return -1;
  eth_init (0);
  return 0;
}
 
int show_txbd_cmd (int argc, char *argv[])
{
  int i;
  int start, max;
 
  if (argc == 1) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));
  else if (argc == 2) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));
  else show_tx_bd (0, 63);
  return 0;
}
 
int show_rxbd_cmd (int argc, char *argv[])
{
  if (argc == 1) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));
  else if (argc == 2) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));
  else show_rx_bd (0, 63);
  return 0;
}
 
int send_packet_cmd (int argc, char *argv[])
{
  if (argc == 1) send_packet(strtoul (argv[0], NULL, 0), 31, 1);
  else if (argc == 2) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), 1);
  else if (argc == 3) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), strtoul (argv[2], NULL, 0));
  else return -1;
  return 0;
}
 
int set_dest_addr_cmd (int argc, char *argv[])
{
  if (argc == 3) {
    dest_mac_addr[0] = (strtoul (argv[0], NULL, 0) >> 8) & 0xff;
    dest_mac_addr[1] = (strtoul (argv[0], NULL, 0) >> 0) & 0xff;
    dest_mac_addr[2] = (strtoul (argv[1], NULL, 0) >> 8) & 0xff;
    dest_mac_addr[3] = (strtoul (argv[1], NULL, 0) >> 0) & 0xff;
    dest_mac_addr[4] = (strtoul (argv[2], NULL, 0) >> 8) & 0xff;
    dest_mac_addr[5] = (strtoul (argv[2], NULL, 0) >> 0) & 0xff;
  } else return -1;
  return 0;
}
 
int init_txbd_pool_cmd (int argc, char *argv[])
{
#if 0
  if (argc == 1) init_tx_bd_pool(strtoul (argv[0], NULL, 0));
  else return -1;
#endif
  return 0;
}
 
int init_rxbd_pool_cmd (int argc, char *argv[])
{
  if (argc == 1) init_rx_bd_pool(strtoul (argv[0], NULL, 0));
  else return -1;
  return 0;
}
 
int show_phy_reg_cmd (int argc, char *argv[])
{
  if (argc == 1) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));
  else if (argc == 2) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));
  else show_phy_reg(0, 30);
  return 0;
}
 
int set_phy_reg_cmd (int argc, char *argv[])
{
  if (argc == 2) set_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));
  else return -1;
  return 0;
}
 
int show_mac_regs_cmd (int argc, char *argv[])
{
  if (argc) return -1;
  printf ("\n %08x", ETH_REG_BASE + ETH_MODER);
  printf (" MODER: %08lx",REG32(ETH_REG_BASE + ETH_MODER));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_INT);
  printf (" INT: %08lx", REG32(ETH_REG_BASE + ETH_INT));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_INT_MASK);
  printf (" INT_MASK: %08lx", REG32(ETH_REG_BASE + ETH_INT_MASK));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_IPGT);
  printf (" IPGT: %08lx", REG32(ETH_REG_BASE + ETH_IPGT));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_IPGR1);
  printf (" IPGR1: %08lx", REG32(ETH_REG_BASE + ETH_IPGR1));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_IPGR2);
  printf (" IPGR2: %08lx", REG32(ETH_REG_BASE + ETH_IPGR2));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_PACKETLEN);
  printf (" PACKETLEN: %08lx", REG32(ETH_REG_BASE + ETH_PACKETLEN));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_COLLCONF);
  printf (" COLLCONF: %08lx", REG32(ETH_REG_BASE + ETH_COLLCONF));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_RXBD_NUM);
  printf (" RX_BD_NUM: %08lx", REG32(ETH_REG_BASE + ETH_RXBD_NUM));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_CTRLMODER);
  printf (" CTRLMODER: %08lx", REG32(ETH_REG_BASE + ETH_CTRLMODER));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIIMODER);
  printf (" MIIMODER: %08lx", REG32(ETH_REG_BASE + ETH_MIIMODER));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIICOMMAND);
  printf (" MIICOMMAND: %08lx", REG32(ETH_REG_BASE + ETH_MIICOMMAND));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIIADDRESS);
  printf (" MIIADDRESS: %08lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIITX_DATA);
  printf (" MIITX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIITX_DATA));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIIRX_DATA);
  printf (" MIIRX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MIISTATUS);
  printf (" MIISTATUS: %08lx", REG32(ETH_REG_BASE + ETH_MIISTATUS));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR0);
  printf (" MAC_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR0));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR1);
  printf (" MAC_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR1));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR0);
  printf (" ETH_HASH_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR0));
 
  printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR1);
  printf (" ETH_HASH_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR1));
 
  printf ("\n");
  return 0;
}
 
int eth_int_enable_cmd (int argc, char *argv[])
{
  if (argc) return -1;
  eth_int_enable ();
  return 0;
}
int show_rx_buffs_cmd (int argc, char *argv[])
{
  if (argc == 0) show_rx_buffs(63, 0);
  else if (argc == 1) show_rx_buffs(63, 1);
  else return -1;
  return 0;
}
 
int show_tx_buffs_cmd (int argc, char *argv[])
{
  if (argc == 0) show_tx_buffs(63);
  else return -1;
  return 0;
}
#endif
 
void module_eth_init (void)
{
#if 0
  register_command ("eth_init", "",  "init ethernet", eth_init_cmd);
  register_command ("show_txbd", "[<start BD>] [<max>]", "show Tx buffer desc", show_txbd_cmd);
  register_command ("show_rxbd", "[<start BD>] [<max>]", "show Rx buffer desc", show_rxbd_cmd);
  register_command ("send_packet", "<length> [<start data>] [<num_of_packets>]", "create & send packet(s)", send_packet_cmd);
  register_command ("set_dest_addr", "<addrhi> <addrmid> <addrlo>", "set destination address (for send_packet)", set_dest_addr_cmd);
  register_command ("init_txbd_pool", "<max>", "initialize Tx buffer descriptors", init_txbd_pool_cmd);
  register_command ("init_rxbd_pool", "<max>", "initialize Rx buffer descriptors", init_rxbd_pool_cmd);
  register_command ("show_phy_reg", "[<start_addr>] [<end addr>]", "show PHY registers", show_phy_reg_cmd);
  register_command ("set_phy_reg", "<addr> <value>", "set PHY register", set_phy_reg_cmd);
  register_command ("show_mac_regs", "", "show all MAC registers", show_mac_regs_cmd);
  register_command ("eth_int_enable", "", "enable ethernet interrupt", eth_int_enable_cmd);
  register_command ("show_rx_buffs", "[<show_all>]", "show receive buffers (optional arg will also show empty buffers)", show_rx_buffs_cmd);
  register_command ("show_tx_buffs", "", "show transmit buffers", show_rx_buffs_cmd);
  /* Initialize controller */
  eth_init();
  printf ("Ethernet not initialized (run eth_init command)\n");
  init_rx_bd_pool(0);
  init_tx_bd_pool(3);
#endif
}
 

Line No.	Rev	Author	Line
1	809	simons	`#include "common.h"`
2			`#include "uart.h"`
3			`#include "eth.h"`
4	855	markom	`#include "support.h"`
5	809	simons	`#include "spr_defs.h"`
6
7	855	markom	`#if 0`
8	809	simons	`extern int tx_pointer_index;`
9			`unsigned long dest_mac_addr[6];`
10
11			`void show_tx_bd(int start, int max)`
12			`{`
13	855	markom	`int i;`
14	809	simons
15			`for(i = start; i <= max; i++) {`
16			`/* Read Tx BD */`
17	855	markom	`printf ("LEN:%04lx", REG32(ETH_BD_BASE + (i << 3)) >> 16);`
18			`printf (" RD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 15) & 0x1);`
19			`printf (" IRQ:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 14) & 0x1);`
20			`printf (" WR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 13) & 0x1);`
21			`printf (" PAD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 12) & 0x1);`
22			`printf (" CRC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 11) & 0x1);`
23			`printf (" UR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 8) & 0x1);`
24			`printf (" RTRY:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 4) & 0xf);`
25			`printf (" RL:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 3) & 0x1);`
26			`printf (" LC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 2) & 0x1);`
27			`printf (" DF:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 1) & 0x1);`
28			`printf (" CS:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 0) & 0x1);`
29			`printf ("\nTx Buffer Pointer: %08lx\n", REG32(ETH_BD_BASE + (i << 3) + 4));`
30	809	simons	`}`
31			`}`
32
33			`void show_rx_bd (int start, int max)`
34			`{`
35	855	markom	`int i;`
36	809	simons	`unsigned long rx_bd_base, rx_bd_num;`
37
38			`rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);`
39			`rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);`
40
41			`for(i = start; i <= max; i++){`
42			`/* Read Rx BD */`
43	855	markom	`printf ("LEN:%04lx", REG32(rx_bd_base + (i << 3)) >> 16);`
44			`printf (" E:%04lx", (REG32(rx_bd_base + (i << 3)) >> 15) & 0x1);`
45			`printf (" IRQ:%04lx", (REG32(rx_bd_base + (i << 3)) >> 14) & 0x1);`
46			`printf (" WR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 13) & 0x1);`
47			`printf (" M:%04lx", (REG32(rx_bd_base + (i << 3)) >> 7) & 0x1);`
48			`printf (" OR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 6) & 0x1);`
49			`printf (" IS:%04lx", (REG32(rx_bd_base + (i << 3)) >> 5) & 0x1);`
50			`printf (" DN:%04lx", (REG32(rx_bd_base + (i << 3)) >> 4) & 0x1);`
51			`printf (" TL:%04lx", (REG32(rx_bd_base + (i << 3)) >> 3) & 0x1);`
52			`printf (" SF:%04lx", (REG32(rx_bd_base + (i << 3)) >> 2) & 0x1);`
53			`printf (" CRC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 1) & 0x1);`
54			`printf (" LC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 0) & 0x1);`
55			`printf ("\nRx Buffer Pointer: %08lx\n", REG32(rx_bd_base + (i << 3) + 4));`
56	809	simons	`}`
57			`}`
58
59			`void show_buffer(unsigned long start_addr, unsigned long len)`
60			`{`
61			`show_mem(start_addr, start_addr + len - 1);`
62			`}`
63
64			`void show_rx_buffs(int max, int show_all)`
65			`{`
66
67			`int i;`
68			`unsigned long rx_bd_base, rx_bd_num;`
69
70			`rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);`
71			`rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);`
72
73			`for(i=0; i<=max; i++)`
74			`{`
75			`if (!(REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_EMPTY) \|\| show_all)`
76			`{`
77	855	markom	`printf ("Rx BD No. %04x located at %08lx\n", i, rx_bd_base + (i << 3));`
78	809	simons	`show_rx_bd(i, i);`
79			`show_buffer(REG32(rx_bd_base + (i << 3) + 4), REG32(rx_bd_base + (i << 3)) >> 16);`
80			`printf ("\n");`
81			`}`
82			`if (REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_WRAP)`
83			`return;`
84			`}`
85			`}`
86
87			`void show_tx_buffs(int max)`
88			`{`
89			`int i;`
90
91			`for(i=0; i<=max; i++)`
92			`{`
93			`if (1)`
94			`{`
95			`printf ("Tx BD No. %04x located at %08x\n", i, ETH_BD_BASE + (i << 3));`
96			`show_tx_bd(i, i);`
97			`show_buffer(REG32(ETH_BD_BASE + (i << 3) + 4), REG32(ETH_BD_BASE + (i << 3)) >> 16);`
98			`printf ("\n");`
99			`}`
100			`if (REG32(ETH_BD_BASE + (i << 3)) & ETH_TX_BD_WRAP)`
101			`return;`
102			`}`
103			`}`
104
105			`void show_phy_reg (unsigned long start_addr, unsigned long stop_addr)`
106			`{`
107
108			`unsigned long addr;`
109
110			`if (start_addr == stop_addr)`
111			`{`
112	855	markom	`printf ("\nSet MII RGAD ADDRESS to %08lx", start_addr);`
113	809	simons	`printf ("\nMII Command = Read Status\n");`
114			`}`
115
116			`for (addr = start_addr; addr <= stop_addr; addr++)`
117			`{`
118			`REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8;`
119			`REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT;`
120
121	855	markom	`printf ("PHY %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) & 0x1f);`
122			`printf (", addr %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) >> 8);`
123			`printf (": %08lx\n", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));`
124	809	simons	`}`
125			`}`
126
127			`void set_phy_reg (unsigned long addr, unsigned long val)`
128			`{`
129	855	markom	`printf ("\nSet MII RGAD ADDRESS to %08lx", addr);`
130	809	simons
131			`REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8;`
132
133			`printf ("\nMII Command = Write Control Data\n");`
134			`REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA;`
135
136			`REG32(ETH_REG_BASE + ETH_MIITX_DATA) = val;`
137
138			`show_phy_reg(addr, addr);`
139			`}`
140
141			`void send_packet (unsigned long len, unsigned long start_data, int num_of_packets)`
142			`{`
143			`unsigned long i, TxBD;`
144
145			`while (num_of_packets--) {`
146			`unsigned long data = (unsigned long )eth_get_tx_buf ();`
147
148			`/* Set dest & src address */`
149			`*data++ = dest_mac_addr[0] << 24 \|`
150			`dest_mac_addr[1] << 16 \|`
151			`dest_mac_addr[2] << 8 \|`
152			`dest_mac_addr[3] << 0;`
153
154			`*data++ = dest_mac_addr[4] << 24 \|`
155			`dest_mac_addr[5] << 16 \|`
156			`ETH_MACADDR0 << 8 \|`
157			`ETH_MACADDR1 << 0;`
158
159			`*data++ = ETH_MACADDR2 << 24 \|`
160			`ETH_MACADDR3 << 16 \|`
161			`ETH_MACADDR4 << 8 \|`
162			`ETH_MACADDR5 << 0;`
163
164			`/* Write data to buffer */`
165			`for(i = 12; i < len; i += 4)`
166			`*data++ = (i + start_data - 12) << 24 \| (i + start_data + 1 - 12) << 16 \|`
167			`(i + start_data + 2 - 12) << 8 \| (i + start_data + 3 - 12);`
168
169			`eth_send (data, len);`
170			`printf (".");`
171			`}`
172			`}`
173
174			`int eth_init_cmd (int argc, char *argv[])`
175			`{`
176			`if (argc) return -1;`
177			`eth_init (0);`
178			`return 0;`
179			`}`
180
181			`int show_txbd_cmd (int argc, char *argv[])`
182			`{`
183	855	markom	`int i;`
184	809	simons	`int start, max;`
185
186	855	markom	`if (argc == 1) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));`
187			`else if (argc == 2) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));`
188	809	simons	`else show_tx_bd (0, 63);`
189			`return 0;`
190			`}`
191
192			`int show_rxbd_cmd (int argc, char *argv[])`
193			`{`
194	855	markom	`if (argc == 1) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));`
195			`else if (argc == 2) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));`
196	809	simons	`else show_rx_bd (0, 63);`
197			`return 0;`
198			`}`
199
200			`int send_packet_cmd (int argc, char *argv[])`
201			`{`
202	855	markom	`if (argc == 1) send_packet(strtoul (argv[0], NULL, 0), 31, 1);`
203			`else if (argc == 2) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), 1);`
204			`else if (argc == 3) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), strtoul (argv[2], NULL, 0));`
205	809	simons	`else return -1;`
206			`return 0;`
207			`}`
208
209			`int set_dest_addr_cmd (int argc, char *argv[])`
210			`{`
211			`if (argc == 3) {`
212	855	markom	`dest_mac_addr[0] = (strtoul (argv[0], NULL, 0) >> 8) & 0xff;`
213			`dest_mac_addr[1] = (strtoul (argv[0], NULL, 0) >> 0) & 0xff;`
214			`dest_mac_addr[2] = (strtoul (argv[1], NULL, 0) >> 8) & 0xff;`
215			`dest_mac_addr[3] = (strtoul (argv[1], NULL, 0) >> 0) & 0xff;`
216			`dest_mac_addr[4] = (strtoul (argv[2], NULL, 0) >> 8) & 0xff;`
217			`dest_mac_addr[5] = (strtoul (argv[2], NULL, 0) >> 0) & 0xff;`
218	809	simons	`} else return -1;`
219			`return 0;`
220			`}`
221
222			`int init_txbd_pool_cmd (int argc, char *argv[])`
223			`{`
224	855	markom	`#if 0`
225			`if (argc == 1) init_tx_bd_pool(strtoul (argv[0], NULL, 0));`
226	809	simons	`else return -1;`
227	855	markom	`#endif`
228	809	simons	`return 0;`
229			`}`
230
231			`int init_rxbd_pool_cmd (int argc, char *argv[])`
232			`{`
233	855	markom	`if (argc == 1) init_rx_bd_pool(strtoul (argv[0], NULL, 0));`
234	809	simons	`else return -1;`
235			`return 0;`
236			`}`
237
238			`int show_phy_reg_cmd (int argc, char *argv[])`
239			`{`
240	855	markom	`if (argc == 1) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0));`
241			`else if (argc == 2) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));`
242	809	simons	`else show_phy_reg(0, 30);`
243			`return 0;`
244			`}`
245
246			`int set_phy_reg_cmd (int argc, char *argv[])`
247			`{`
248	855	markom	`if (argc == 2) set_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0));`
249	809	simons	`else return -1;`
250			`return 0;`
251			`}`
252
253			`int show_mac_regs_cmd (int argc, char *argv[])`
254			`{`
255			`if (argc) return -1;`
256			`printf ("\n %08x", ETH_REG_BASE + ETH_MODER);`
257	855	markom	`printf (" MODER: %08lx",REG32(ETH_REG_BASE + ETH_MODER));`
258	809	simons
259			`printf ("\n %08x", ETH_REG_BASE + ETH_INT);`
260	855	markom	`printf (" INT: %08lx", REG32(ETH_REG_BASE + ETH_INT));`
261	809	simons
262			`printf ("\n %08x", ETH_REG_BASE + ETH_INT_MASK);`
263	855	markom	`printf (" INT_MASK: %08lx", REG32(ETH_REG_BASE + ETH_INT_MASK));`
264	809	simons
265			`printf ("\n %08x", ETH_REG_BASE + ETH_IPGT);`
266	855	markom	`printf (" IPGT: %08lx", REG32(ETH_REG_BASE + ETH_IPGT));`
267	809	simons
268			`printf ("\n %08x", ETH_REG_BASE + ETH_IPGR1);`
269	855	markom	`printf (" IPGR1: %08lx", REG32(ETH_REG_BASE + ETH_IPGR1));`
270	809	simons
271			`printf ("\n %08x", ETH_REG_BASE + ETH_IPGR2);`
272	855	markom	`printf (" IPGR2: %08lx", REG32(ETH_REG_BASE + ETH_IPGR2));`
273	809	simons
274			`printf ("\n %08x", ETH_REG_BASE + ETH_PACKETLEN);`
275	855	markom	`printf (" PACKETLEN: %08lx", REG32(ETH_REG_BASE + ETH_PACKETLEN));`
276	809	simons
277			`printf ("\n %08x", ETH_REG_BASE + ETH_COLLCONF);`
278	855	markom	`printf (" COLLCONF: %08lx", REG32(ETH_REG_BASE + ETH_COLLCONF));`
279	809	simons
280			`printf ("\n %08x", ETH_REG_BASE + ETH_RXBD_NUM);`
281	855	markom	`printf (" RX_BD_NUM: %08lx", REG32(ETH_REG_BASE + ETH_RXBD_NUM));`
282	809	simons
283			`printf ("\n %08x", ETH_REG_BASE + ETH_CTRLMODER);`
284	855	markom	`printf (" CTRLMODER: %08lx", REG32(ETH_REG_BASE + ETH_CTRLMODER));`
285	809	simons
286			`printf ("\n %08x", ETH_REG_BASE + ETH_MIIMODER);`
287	855	markom	`printf (" MIIMODER: %08lx", REG32(ETH_REG_BASE + ETH_MIIMODER));`
288	809	simons
289			`printf ("\n %08x", ETH_REG_BASE + ETH_MIICOMMAND);`
290	855	markom	`printf (" MIICOMMAND: %08lx", REG32(ETH_REG_BASE + ETH_MIICOMMAND));`
291	809	simons
292			`printf ("\n %08x", ETH_REG_BASE + ETH_MIIADDRESS);`
293	855	markom	`printf (" MIIADDRESS: %08lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS));`
294	809	simons
295			`printf ("\n %08x", ETH_REG_BASE + ETH_MIITX_DATA);`
296	855	markom	`printf (" MIITX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIITX_DATA));`
297	809	simons
298			`printf ("\n %08x", ETH_REG_BASE + ETH_MIIRX_DATA);`
299	855	markom	`printf (" MIIRX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));`
300	809	simons
301			`printf ("\n %08x", ETH_REG_BASE + ETH_MIISTATUS);`
302	855	markom	`printf (" MIISTATUS: %08lx", REG32(ETH_REG_BASE + ETH_MIISTATUS));`
303	809	simons
304			`printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR0);`
305	855	markom	`printf (" MAC_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR0));`
306	809	simons
307			`printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR1);`
308	855	markom	`printf (" MAC_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR1));`
309	809	simons
310			`printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR0);`
311	855	markom	`printf (" ETH_HASH_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR0));`
312	809	simons
313			`printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR1);`
314	855	markom	`printf (" ETH_HASH_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR1));`
315	809	simons
316			`printf ("\n");`
317			`return 0;`
318			`}`
319
320			`int eth_int_enable_cmd (int argc, char *argv[])`
321			`{`
322			`if (argc) return -1;`
323			`eth_int_enable ();`
324			`return 0;`
325			`}`
326			`int show_rx_buffs_cmd (int argc, char *argv[])`
327			`{`
328			`if (argc == 0) show_rx_buffs(63, 0);`
329			`else if (argc == 1) show_rx_buffs(63, 1);`
330			`else return -1;`
331			`return 0;`
332			`}`
333
334			`int show_tx_buffs_cmd (int argc, char *argv[])`
335			`{`
336			`if (argc == 0) show_tx_buffs(63);`
337			`else return -1;`
338			`return 0;`
339			`}`
340	855	markom	`#endif`
341	809	simons
342	828	markom	`void module_eth_init (void)`
343	809	simons	`{`
344			`#if 0`
345			`register_command ("eth_init", "", "init ethernet", eth_init_cmd);`
346			`register_command ("show_txbd", "[<start BD>] [<max>]", "show Tx buffer desc", show_txbd_cmd);`
347			`register_command ("show_rxbd", "[<start BD>] [<max>]", "show Rx buffer desc", show_rxbd_cmd);`
348			`register_command ("send_packet", "<length> [<start data>] [<num_of_packets>]", "create & send packet(s)", send_packet_cmd);`
349			`register_command ("set_dest_addr", "<addrhi> <addrmid> <addrlo>", "set destination address (for send_packet)", set_dest_addr_cmd);`
350			`register_command ("init_txbd_pool", "<max>", "initialize Tx buffer descriptors", init_txbd_pool_cmd);`
351			`register_command ("init_rxbd_pool", "<max>", "initialize Rx buffer descriptors", init_rxbd_pool_cmd);`
352			`register_command ("show_phy_reg", "[<start_addr>] [<end addr>]", "show PHY registers", show_phy_reg_cmd);`
353			`register_command ("set_phy_reg", "<addr> <value>", "set PHY register", set_phy_reg_cmd);`
354			`register_command ("show_mac_regs", "", "show all MAC registers", show_mac_regs_cmd);`
355			`register_command ("eth_int_enable", "", "enable ethernet interrupt", eth_int_enable_cmd);`
356			`register_command ("show_rx_buffs", "[<show_all>]", "show receive buffers (optional arg will also show empty buffers)", show_rx_buffs_cmd);`
357			`register_command ("show_tx_buffs", "", "show transmit buffers", show_rx_buffs_cmd);`
358			`/* Initialize controller */`
359	855	markom	`eth_init();`
360			`printf ("Ethernet not initialized (run eth_init command)\n");`
361			`init_rx_bd_pool(0);`
362			`init_tx_bd_pool(3);`
363	809	simons	`#endif`
364			`}`
365	855	markom

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