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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [alpha/] [kernel/] [lca.c] - Blame information for rev 1765

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/*
 * Code common to all LCA chips.
 *
 * Written by David Mosberger (davidm@cs.arizona.edu) with some code
 * taken from Dave Rusling's (david.rusling@reo.mts.dec.com) 32-bit
 * bios code.
 */
#include <linux/kernel.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/bios32.h>
#include <linux/pci.h>
 
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/io.h>
 
/*
 * BIOS32-style PCI interface:
 */
 
#ifdef CONFIG_ALPHA_LCA
 
#define vulp    volatile unsigned long *
#define vuip    volatile unsigned int  *
 
/*
 * Machine check reasons.  Defined according to PALcode sources
 * (osf.h and platform.h).
 */
#define MCHK_K_TPERR            0x0080
#define MCHK_K_TCPERR           0x0082
#define MCHK_K_HERR             0x0084
#define MCHK_K_ECC_C            0x0086
#define MCHK_K_ECC_NC           0x0088
#define MCHK_K_UNKNOWN          0x008A
#define MCHK_K_CACKSOFT         0x008C
#define MCHK_K_BUGCHECK         0x008E
#define MCHK_K_OS_BUGCHECK      0x0090
#define MCHK_K_DCPERR           0x0092
#define MCHK_K_ICPERR           0x0094
 
/*
 * Platform-specific machine-check reasons:
 */
#define MCHK_K_SIO_SERR         0x204   /* all platforms so far */
#define MCHK_K_SIO_IOCHK        0x206   /* all platforms so far */
#define MCHK_K_DCSR             0x208   /* all but Noname */
 
#ifdef CONFIG_ALPHA_SRM_SETUP
unsigned int LCA_DMA_WIN_BASE = LCA_DMA_WIN_BASE_DEFAULT;
unsigned int LCA_DMA_WIN_SIZE = LCA_DMA_WIN_SIZE_DEFAULT;
#endif /* SRM_SETUP */
 
/*
 * Given a bus, device, and function number, compute resulting
 * configuration space address and setup the LCA_IOC_CONF register
 * accordingly.  It is therefore not safe to have concurrent
 * invocations to configuration space access routines, but there
 * really shouldn't be any need for this.
 *
 * Type 0:
 *
 *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
 *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 * | | | | | | | | | | | | | | | | | | | | | | | |F|F|F|R|R|R|R|R|R|0|0|
 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 *
 *      31:11   Device select bit.
 *      10:8    Function number
 *       7:2    Register number
 *
 * Type 1:
 *
 *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
 *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|
 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 *
 *      31:24   reserved
 *      23:16   bus number (8 bits = 128 possible buses)
 *      15:11   Device number (5 bits)
 *      10:8    function number
 *       7:2    register number
 *
 * Notes:
 *      The function number selects which function of a multi-function device
 *      (e.g., scsi and ethernet).
 *
 *      The register selects a DWORD (32 bit) register offset.  Hence it
 *      doesn't get shifted by 2 bits as we want to "drop" the bottom two
 *      bits.
 */
static int mk_conf_addr(unsigned char bus, unsigned char device_fn,
                        unsigned char where, unsigned long *pci_addr)
{
        unsigned long addr;
 
        if (bus == 0) {
                int device = device_fn >> 3;
                int func = device_fn & 0x7;
 
                /* type 0 configuration cycle: */
 
                if (device > 12) {
                        return -1;
                }
 
                *((volatile unsigned long*) LCA_IOC_CONF) = 0;
                addr = (1 << (11 + device)) | (func << 8) | where;
        } else {
                /* type 1 configuration cycle: */
                *((volatile unsigned long*) LCA_IOC_CONF) = 1;
                addr = (bus << 16) | (device_fn << 8) | where;
        }
        *pci_addr = addr;
        return 0;
}
 
 
static unsigned int conf_read(unsigned long addr)
{
        unsigned long flags, code, stat0;
        unsigned int value;
 
        save_flags(flags);
        cli();
 
        /* reset status register to avoid loosing errors: */
        stat0 = *((volatile unsigned long*)LCA_IOC_STAT0);
        *((volatile unsigned long*)LCA_IOC_STAT0) = stat0;
        mb();
 
        /* access configuration space: */
 
        value = *((volatile unsigned int*)addr);
        draina();
 
        stat0 = *((unsigned long*)LCA_IOC_STAT0);
        if (stat0 & LCA_IOC_STAT0_ERR) {
                code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)
                        & LCA_IOC_STAT0_CODE_MASK);
                if (code != 1) {
                        printk("lca.c:conf_read: got stat0=%lx\n", stat0);
                }
 
                /* reset error status: */
                *((volatile unsigned long*)LCA_IOC_STAT0) = stat0;
                mb();
                wrmces(0x7);                    /* reset machine check */
 
                value = 0xffffffff;
        }
        restore_flags(flags);
        return value;
}
 
 
static void conf_write(unsigned long addr, unsigned int value)
{
        unsigned long flags, code, stat0;
 
        save_flags(flags);      /* avoid getting hit by machine check */
        cli();
 
        /* reset status register to avoid loosing errors: */
        stat0 = *((volatile unsigned long*)LCA_IOC_STAT0);
        *((volatile unsigned long*)LCA_IOC_STAT0) = stat0;
        mb();
 
        /* access configuration space: */
 
        *((volatile unsigned int*)addr) = value;
        draina();
 
        stat0 = *((unsigned long*)LCA_IOC_STAT0);
        if (stat0 & LCA_IOC_STAT0_ERR) {
                code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)
                        & LCA_IOC_STAT0_CODE_MASK);
                if (code != 1) {
                        printk("lca.c:conf_write: got stat0=%lx\n", stat0);
                }
 
                /* reset error status: */
                *((volatile unsigned long*)LCA_IOC_STAT0) = stat0;
                mb();
                wrmces(0x7);                    /* reset machine check */
        }
        restore_flags(flags);
}
 
 
int pcibios_read_config_byte (unsigned char bus, unsigned char device_fn,
                              unsigned char where, unsigned char *value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        *value = 0xff;
 
        if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x00;
        *value = conf_read(addr) >> ((where & 3) * 8);
        return PCIBIOS_SUCCESSFUL;
}
 
 
int pcibios_read_config_word (unsigned char bus, unsigned char device_fn,
                              unsigned char where, unsigned short *value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        *value = 0xffff;
 
        if (where & 0x1) {
                return PCIBIOS_BAD_REGISTER_NUMBER;
        }
        if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x08;
        *value = conf_read(addr) >> ((where & 3) * 8);
        return PCIBIOS_SUCCESSFUL;
}
 
 
int pcibios_read_config_dword (unsigned char bus, unsigned char device_fn,
                               unsigned char where, unsigned int *value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        *value = 0xffffffff;
        if (where & 0x3) {
                return PCIBIOS_BAD_REGISTER_NUMBER;
        }
        if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x18;
        *value = conf_read(addr);
        return PCIBIOS_SUCCESSFUL;
}
 
 
int pcibios_write_config_byte (unsigned char bus, unsigned char device_fn,
                               unsigned char where, unsigned char value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x00;
        conf_write(addr, value << ((where & 3) * 8));
        return PCIBIOS_SUCCESSFUL;
}
 
 
int pcibios_write_config_word (unsigned char bus, unsigned char device_fn,
                               unsigned char where, unsigned short value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x08;
        conf_write(addr, value << ((where & 3) * 8));
        return PCIBIOS_SUCCESSFUL;
}
 
 
int pcibios_write_config_dword (unsigned char bus, unsigned char device_fn,
                                unsigned char where, unsigned int value)
{
        unsigned long addr = LCA_CONF;
        unsigned long pci_addr;
 
        if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
                return PCIBIOS_SUCCESSFUL;
        }
        addr |= (pci_addr << 5) + 0x18;
        conf_write(addr, value << ((where & 3) * 8));
        return PCIBIOS_SUCCESSFUL;
}
 
 
unsigned long lca_init(unsigned long mem_start, unsigned long mem_end)
{
#ifdef CONFIG_ALPHA_SRM_SETUP
        /* check window 0 for enabled and mapped to 0 */
        if ((*(vulp)LCA_IOC_W_BASE0 & (1UL<<33)) &&
            (*(vulp)LCA_IOC_T_BASE0 == 0))
        {
          LCA_DMA_WIN_BASE = *(vulp)LCA_IOC_W_BASE0 & 0xffffffffUL;
          LCA_DMA_WIN_SIZE = *(vulp)LCA_IOC_W_MASK0 & 0xffffffffUL;
          LCA_DMA_WIN_SIZE += 1;
#if 1
          printk("lca_init: using Window 0 settings\n");
          printk("lca_init: BASE 0x%lx MASK 0x%lx TRANS 0x%lx\n",
                 *(vulp)LCA_IOC_W_BASE0,
                 *(vulp)LCA_IOC_W_MASK0,
                 *(vulp)LCA_IOC_T_BASE0);
#endif
        }
        else    /* check window 2 for enabled and mapped to 0 */
        if ((*(vulp)LCA_IOC_W_BASE1 & (1UL<<33)) &&
            (*(vulp)LCA_IOC_T_BASE1 == 0))
        {
          LCA_DMA_WIN_BASE = *(vulp)LCA_IOC_W_BASE1 & 0xffffffffUL;
          LCA_DMA_WIN_SIZE = *(vulp)LCA_IOC_W_MASK1 & 0xffffffffUL;
          LCA_DMA_WIN_SIZE += 1;
#if 1
          printk("lca_init: using Window 1 settings\n");
          printk("lca_init: BASE 0x%lx MASK 0x%lx TRANS 0x%lx\n",
                 *(vulp)LCA_IOC_W_BASE1,
                 *(vulp)LCA_IOC_W_MASK1,
                 *(vulp)LCA_IOC_T_BASE1);
#endif
        }
        else /* we must use our defaults... */
#endif /* SRM_SETUP */
        {
        /*
         * Set up the PCI->physical memory translation windows.
         * For now, window 1 is disabled.  In the future, we may
         * want to use it to do scatter/gather DMA.  Window 0
         * goes at 1 GB and is 1 GB large.
         */
        *(vulp)LCA_IOC_W_BASE1 = 0UL<<33;
 
        *(vulp)LCA_IOC_W_BASE0 = 1UL<<33 | LCA_DMA_WIN_BASE;
        *(vulp)LCA_IOC_W_MASK0 = LCA_DMA_WIN_SIZE - 1;
        *(vulp)LCA_IOC_T_BASE0 = 0;
        }
 
        /*
         * Disable PCI parity for now.  The NCR53c810 chip has
         * troubles meeting the PCI spec which results in
         * data parity errors.
         */
        *(vulp)LCA_IOC_PAR_DIS = 1UL<<5;
        return mem_start;
}
 
 
 
 
/*
 * Constants used during machine-check handling.  I suppose these
 * could be moved into lca.h but I don't see much reason why anybody
 * else would want to use them.
 */
#define ESR_EAV         (1UL<< 0)       /* error address valid */
#define ESR_CEE         (1UL<< 1)       /* correctable error */
#define ESR_UEE         (1UL<< 2)       /* uncorrectable error */
#define ESR_WRE         (1UL<< 3)       /* write-error */
#define ESR_SOR         (1UL<< 4)       /* error source */
#define ESR_CTE         (1UL<< 7)       /* cache-tag error */
#define ESR_MSE         (1UL<< 9)       /* multiple soft errors */
#define ESR_MHE         (1UL<<10)       /* multiple hard errors */
#define ESR_NXM         (1UL<<12)       /* non-existent memory */
 
#define IOC_ERR         (  1<<4)        /* ioc logs an error */
#define IOC_CMD_SHIFT   0
#define IOC_CMD         (0xf<<IOC_CMD_SHIFT)
#define IOC_CODE_SHIFT  8
#define IOC_CODE        (0xf<<IOC_CODE_SHIFT)
#define IOC_LOST        (  1<<5)
#define IOC_P_NBR       ((__u32) ~((1<<13) - 1))
 
 
void mem_error (unsigned long esr, unsigned long ear)
{
    printk("    %s %s error to %s occurred at address %x\n",
           (esr & ESR_CEE) ? "Correctable" : ((esr & ESR_UEE) ? "Uncorrectable" : "A"),
           (esr & ESR_WRE) ? "write" : "read",
           (esr & ESR_SOR) ? "memory" : "b-cache",
           (unsigned) (ear & 0x1ffffff8));
    if (esr & ESR_CTE) {
        printk("    A b-cache tag parity error was detected.\n");
    }
    if (esr & ESR_MSE) {
        printk("    Several other correctable errors occurred.\n");
    }
    if (esr & ESR_MHE) {
        printk("    Several other uncorrectable errors occurred.\n");
    }
    if (esr & ESR_NXM) {
        printk("    Attempted to access non-existent memory.\n");
    }
}
 
 
void ioc_error (__u32 stat0, __u32 stat1)
{
    const char *pci_cmd[] = {
        "Interrupt Acknowledge", "Special", "I/O Read", "I/O Write",
        "Rsvd 1", "Rsvd 2", "Memory Read", "Memory Write", "Rsvd3", "Rsvd4",
        "Configuration Read", "Configuration Write", "Memory Read Multiple",
        "Dual Address", "Memory Read Line", "Memory Write and Invalidate"
    };
    const char *err_name[] = {
        "exceeded retry limit", "no device", "bad data parity", "target abort",
        "bad address parity", "page table read error", "invalid page", "data error"
    };
    unsigned code = (stat0 & IOC_CODE) >> IOC_CODE_SHIFT;
    unsigned cmd  = (stat0 & IOC_CMD)  >> IOC_CMD_SHIFT;
 
    printk("    %s initiated PCI %s cycle to address %x failed due to %s.\n",
           code > 3 ? "PCI" : "CPU", pci_cmd[cmd], stat1, err_name[code]);
    if (code == 5 || code == 6) {
        printk("    (Error occurred at PCI memory address %x.)\n", (stat0 & ~IOC_P_NBR));
    }
    if (stat0 & IOC_LOST) {
        printk("    Other PCI errors occurred simultaneously.\n");
    }
}
 
 
void lca_machine_check (unsigned long vector, unsigned long la, struct pt_regs *regs)
{
        unsigned long * ptr;
        const char * reason;
        union el_lca el;
        char buf[128];
        long i;
 
        printk(KERN_CRIT "lca: machine check (la=0x%lx,pc=0x%lx)\n",
               la, regs->pc);
        el.c = (struct el_common *) la;
        /*
         * The first quadword after the common header always seems to
         * be the machine check reason---don't know why this isn't
         * part of the common header instead.  In the case of a long
         * logout frame, the upper 32 bits is the machine check
         * revision level, which we ignore for now.
         */
        switch (el.c->code & 0xffffffff) {
              case MCHK_K_TPERR:        reason = "tag parity error"; break;
              case MCHK_K_TCPERR:       reason = "tag control parity error"; break;
              case MCHK_K_HERR:         reason = "access to non-existent memory"; break;
              case MCHK_K_ECC_C:        reason = "correctable ECC error"; break;
              case MCHK_K_ECC_NC:       reason = "non-correctable ECC error"; break;
              case MCHK_K_CACKSOFT:     reason = "MCHK_K_CACKSOFT"; break; /* what's this? */
              case MCHK_K_BUGCHECK:     reason = "illegal exception in PAL mode"; break;
              case MCHK_K_OS_BUGCHECK:  reason = "callsys in kernel mode"; break;
              case MCHK_K_DCPERR:       reason = "d-cache parity error"; break;
              case MCHK_K_ICPERR:       reason = "i-cache parity error"; break;
              case MCHK_K_SIO_SERR:     reason = "SIO SERR occurred on PCI bus"; break;
              case MCHK_K_SIO_IOCHK:    reason = "SIO IOCHK occurred on ISA bus"; break;
              case MCHK_K_DCSR:         reason = "MCHK_K_DCSR"; break;
              case MCHK_K_UNKNOWN:
              default:
                sprintf(buf, "reason for machine-check unknown (0x%lx)",
                        el.c->code & 0xffffffff);
                reason = buf;
                break;
        }
 
        wrmces(rdmces());       /* reset machine check pending flag */
 
        switch (el.c->size) {
              case sizeof(struct el_lca_mcheck_short):
                printk(KERN_CRIT
                       "  Reason: %s (short frame%s, dc_stat=%lx):\pn",
                       reason, el.c->retry ? ", retryable" : "", el.s->dc_stat);
                if (el.s->esr & ESR_EAV) {
                    mem_error(el.s->esr, el.s->ear);
                }
                if (el.s->ioc_stat0 & IOC_ERR) {
                    ioc_error(el.s->ioc_stat0, el.s->ioc_stat1);
                }
                break;
 
              case sizeof(struct el_lca_mcheck_long):
                printk(KERN_CRIT "  Reason: %s (long frame%s):\n",
                       reason, el.c->retry ? ", retryable" : "");
                printk(KERN_CRIT
                       "    reason: %lx  exc_addr: %lx  dc_stat: %lx\n",
                       el.l->pt[0], el.l->exc_addr, el.l->dc_stat);
                printk(KERN_CRIT "    car: %lx\n", el.l->car);
                if (el.l->esr & ESR_EAV) {
                    mem_error(el.l->esr, el.l->ear);
                }
                if (el.l->ioc_stat0 & IOC_ERR) {
                    ioc_error(el.l->ioc_stat0, el.l->ioc_stat1);
                }
                break;
 
              default:
                printk(KERN_CRIT "  Unknown errorlog size %d\n", el.c->size);
        }
 
        /* dump the logout area to give all info: */
 
        ptr = (unsigned long *) la;
        for (i = 0; i < el.c->size / sizeof(long); i += 2) {
            printk(KERN_CRIT " +%8lx %016lx %016lx\n",
                   i*sizeof(long), ptr[i], ptr[i+1]);
        }
}
 
void
lca_clock_print(void)
{
        long    pmr_reg;
 
        pmr_reg = READ_PMR;
 
        printk("Status of clock control:\n");
        printk("\tPrimary clock divisor\t0x%x\n", GET_PRIMARY(pmr_reg));
        printk("\tOverride clock divisor\t0x%x\n", GET_OVERRIDE(pmr_reg));
        printk("\tInterrupt override is %s\n",
               (pmr_reg & LCA_PMR_INTO) ? "on" : "off");
        printk("\tDMA override is %s\n",
               (pmr_reg & LCA_PMR_DMAO) ? "on" : "off");
 
}
 
int
lca_get_clock(void)
{
        long    pmr_reg;
 
        pmr_reg = READ_PMR;
        return(GET_PRIMARY(pmr_reg));
 
        }
 
void
lca_clock_fiddle(int divisor)
{
        long    pmr_reg;
 
        pmr_reg = READ_PMR;
        SET_PRIMARY_CLOCK(pmr_reg, divisor);
/*        lca_norm_clock = divisor; */
        WRITE_PMR(pmr_reg);
        mb();
}
 
#endif /* CONFIG_ALPHA_LCA */

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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [alpha/] [kernel/] [lca.c] - Blame information for rev 1765

Line No.	Rev	Author	Line
1	1622	jcastillo	`/*`
2			`* Code common to all LCA chips.`
3			`*`
4			`* Written by David Mosberger (davidm@cs.arizona.edu) with some code`
5			`* taken from Dave Rusling's (david.rusling@reo.mts.dec.com) 32-bit`
6			`* bios code.`
7			`*/`
8			`#include <linux/kernel.h>`
9			`#include <linux/config.h>`
10			`#include <linux/types.h>`
11			`#include <linux/bios32.h>`
12			`#include <linux/pci.h>`
13
14			`#include <asm/ptrace.h>`
15			`#include <asm/system.h>`
16			`#include <asm/io.h>`
17
18			`/*`
19			`* BIOS32-style PCI interface:`
20			`*/`
21
22			`#ifdef CONFIG_ALPHA_LCA`
23
24			`#define vulp volatile unsigned long *`
25			`#define vuip volatile unsigned int *`
26
27			`/*`
28			`* Machine check reasons. Defined according to PALcode sources`
29			`* (osf.h and platform.h).`
30			`*/`
31			`#define MCHK_K_TPERR 0x0080`
32			`#define MCHK_K_TCPERR 0x0082`
33			`#define MCHK_K_HERR 0x0084`
34			`#define MCHK_K_ECC_C 0x0086`
35			`#define MCHK_K_ECC_NC 0x0088`
36			`#define MCHK_K_UNKNOWN 0x008A`
37			`#define MCHK_K_CACKSOFT 0x008C`
38			`#define MCHK_K_BUGCHECK 0x008E`
39			`#define MCHK_K_OS_BUGCHECK 0x0090`
40			`#define MCHK_K_DCPERR 0x0092`
41			`#define MCHK_K_ICPERR 0x0094`
42
43			`/*`
44			`* Platform-specific machine-check reasons:`
45			`*/`
46			`#define MCHK_K_SIO_SERR 0x204 /* all platforms so far */`
47			`#define MCHK_K_SIO_IOCHK 0x206 /* all platforms so far */`
48			`#define MCHK_K_DCSR 0x208 /* all but Noname */`
49
50			`#ifdef CONFIG_ALPHA_SRM_SETUP`
51			`unsigned int LCA_DMA_WIN_BASE = LCA_DMA_WIN_BASE_DEFAULT;`
52			`unsigned int LCA_DMA_WIN_SIZE = LCA_DMA_WIN_SIZE_DEFAULT;`
53			`#endif /* SRM_SETUP */`
54
55			`/*`
56			`* Given a bus, device, and function number, compute resulting`
57			`* configuration space address and setup the LCA_IOC_CONF register`
58			`* accordingly. It is therefore not safe to have concurrent`
59			`* invocations to configuration space access routines, but there`
60			`* really shouldn't be any need for this.`
61			`*`
62			`* Type 0:`
63			`*`
64			`* 3 3\|3 3 2 2\|2 2 2 2\|2 2 2 2\|1 1 1 1\|1 1 1 1\|1 1`
65			`* 3 2\|1 0 9 8\|7 6 5 4\|3 2 1 0\|9 8 7 6\|5 4 3 2\|1 0 9 8\|7 6 5 4\|3 2 1 0`
66			`* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+`
67			`* \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|F\|F\|F\|R\|R\|R\|R\|R\|R\|0\|0\|`
68			`* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+`
69			`*`
70			`* 31:11 Device select bit.`
71			`* 10:8 Function number`
72			`* 7:2 Register number`
73			`*`
74			`* Type 1:`
75			`*`
76			`* 3 3\|3 3 2 2\|2 2 2 2\|2 2 2 2\|1 1 1 1\|1 1 1 1\|1 1`
77			`* 3 2\|1 0 9 8\|7 6 5 4\|3 2 1 0\|9 8 7 6\|5 4 3 2\|1 0 9 8\|7 6 5 4\|3 2 1 0`
78			`* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+`
79			`* \| \| \| \| \| \| \| \| \| \| \|B\|B\|B\|B\|B\|B\|B\|B\|D\|D\|D\|D\|D\|F\|F\|F\|R\|R\|R\|R\|R\|R\|0\|1\|`
80			`* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+`
81			`*`
82			`* 31:24 reserved`
83			`* 23:16 bus number (8 bits = 128 possible buses)`
84			`* 15:11 Device number (5 bits)`
85			`* 10:8 function number`
86			`* 7:2 register number`
87			`*`
88			`* Notes:`
89			`* The function number selects which function of a multi-function device`
90			`* (e.g., scsi and ethernet).`
91			`*`
92			`* The register selects a DWORD (32 bit) register offset. Hence it`
93			`* doesn't get shifted by 2 bits as we want to "drop" the bottom two`
94			`* bits.`
95			`*/`
96			`static int mk_conf_addr(unsigned char bus, unsigned char device_fn,`
97			`unsigned char where, unsigned long *pci_addr)`
98			`{`
99			`unsigned long addr;`
100
101			`if (bus == 0) {`
102			`int device = device_fn >> 3;`
103			`int func = device_fn & 0x7;`
104
105			`/* type 0 configuration cycle: */`
106
107			`if (device > 12) {`
108			`return -1;`
109			`}`
110
111			`((volatile unsigned long) LCA_IOC_CONF) = 0;`
112			`addr = (1 << (11 + device)) \| (func << 8) \| where;`
113			`} else {`
114			`/* type 1 configuration cycle: */`
115			`((volatile unsigned long) LCA_IOC_CONF) = 1;`
116			`addr = (bus << 16) \| (device_fn << 8) \| where;`
117			`}`
118			`*pci_addr = addr;`
119			`return 0;`
120			`}`
121
122
123			`static unsigned int conf_read(unsigned long addr)`
124			`{`
125			`unsigned long flags, code, stat0;`
126			`unsigned int value;`
127
128			`save_flags(flags);`
129			`cli();`
130
131			`/* reset status register to avoid loosing errors: */`
132			`stat0 = ((volatile unsigned long)LCA_IOC_STAT0);`
133			`((volatile unsigned long)LCA_IOC_STAT0) = stat0;`
134			`mb();`
135
136			`/* access configuration space: */`
137
138			`value = ((volatile unsigned int)addr);`
139			`draina();`
140
141			`stat0 = ((unsigned long)LCA_IOC_STAT0);`
142			`if (stat0 & LCA_IOC_STAT0_ERR) {`
143			`code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)`
144			`& LCA_IOC_STAT0_CODE_MASK);`
145			`if (code != 1) {`
146			`printk("lca.c:conf_read: got stat0=%lx\n", stat0);`
147			`}`
148
149			`/* reset error status: */`
150			`((volatile unsigned long)LCA_IOC_STAT0) = stat0;`
151			`mb();`
152			`wrmces(0x7); /* reset machine check */`
153
154			`value = 0xffffffff;`
155			`}`
156			`restore_flags(flags);`
157			`return value;`
158			`}`
159
160
161			`static void conf_write(unsigned long addr, unsigned int value)`
162			`{`
163			`unsigned long flags, code, stat0;`
164
165			`save_flags(flags); /* avoid getting hit by machine check */`
166			`cli();`
167
168			`/* reset status register to avoid loosing errors: */`
169			`stat0 = ((volatile unsigned long)LCA_IOC_STAT0);`
170			`((volatile unsigned long)LCA_IOC_STAT0) = stat0;`
171			`mb();`
172
173			`/* access configuration space: */`
174
175			`((volatile unsigned int)addr) = value;`
176			`draina();`
177
178			`stat0 = ((unsigned long)LCA_IOC_STAT0);`
179			`if (stat0 & LCA_IOC_STAT0_ERR) {`
180			`code = ((stat0 >> LCA_IOC_STAT0_CODE_SHIFT)`
181			`& LCA_IOC_STAT0_CODE_MASK);`
182			`if (code != 1) {`
183			`printk("lca.c:conf_write: got stat0=%lx\n", stat0);`
184			`}`
185
186			`/* reset error status: */`
187			`((volatile unsigned long)LCA_IOC_STAT0) = stat0;`
188			`mb();`
189			`wrmces(0x7); /* reset machine check */`
190			`}`
191			`restore_flags(flags);`
192			`}`
193
194
195			`int pcibios_read_config_byte (unsigned char bus, unsigned char device_fn,`
196			`unsigned char where, unsigned char *value)`
197			`{`
198			`unsigned long addr = LCA_CONF;`
199			`unsigned long pci_addr;`
200
201			`*value = 0xff;`
202
203			`if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {`
204			`return PCIBIOS_SUCCESSFUL;`
205			`}`
206			`addr \|= (pci_addr << 5) + 0x00;`
207			`value = conf_read(addr) >> ((where & 3) 8);`
208			`return PCIBIOS_SUCCESSFUL;`
209			`}`
210
211
212			`int pcibios_read_config_word (unsigned char bus, unsigned char device_fn,`
213			`unsigned char where, unsigned short *value)`
214			`{`
215			`unsigned long addr = LCA_CONF;`
216			`unsigned long pci_addr;`
217
218			`*value = 0xffff;`
219
220			`if (where & 0x1) {`
221			`return PCIBIOS_BAD_REGISTER_NUMBER;`
222			`}`
223			`if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {`
224			`return PCIBIOS_SUCCESSFUL;`
225			`}`
226			`addr \|= (pci_addr << 5) + 0x08;`
227			`value = conf_read(addr) >> ((where & 3) 8);`
228			`return PCIBIOS_SUCCESSFUL;`
229			`}`
230
231
232			`int pcibios_read_config_dword (unsigned char bus, unsigned char device_fn,`
233			`unsigned char where, unsigned int *value)`
234			`{`
235			`unsigned long addr = LCA_CONF;`
236			`unsigned long pci_addr;`
237
238			`*value = 0xffffffff;`
239			`if (where & 0x3) {`
240			`return PCIBIOS_BAD_REGISTER_NUMBER;`
241			`}`
242			`if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {`
243			`return PCIBIOS_SUCCESSFUL;`
244			`}`
245			`addr \|= (pci_addr << 5) + 0x18;`
246			`*value = conf_read(addr);`
247			`return PCIBIOS_SUCCESSFUL;`
248			`}`
249
250
251			`int pcibios_write_config_byte (unsigned char bus, unsigned char device_fn,`
252			`unsigned char where, unsigned char value)`
253			`{`
254			`unsigned long addr = LCA_CONF;`
255			`unsigned long pci_addr;`
256
257			`if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {`
258			`return PCIBIOS_SUCCESSFUL;`
259			`}`
260			`addr \|= (pci_addr << 5) + 0x00;`
261			`conf_write(addr, value << ((where & 3) * 8));`
262			`return PCIBIOS_SUCCESSFUL;`
263			`}`
264
265
266			`int pcibios_write_config_word (unsigned char bus, unsigned char device_fn,`
267			`unsigned char where, unsigned short value)`
268			`{`
269			`unsigned long addr = LCA_CONF;`
270			`unsigned long pci_addr;`
271
272			`if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {`
273			`return PCIBIOS_SUCCESSFUL;`
274			`}`
275			`addr \|= (pci_addr << 5) + 0x08;`
276			`conf_write(addr, value << ((where & 3) * 8));`
277			`return PCIBIOS_SUCCESSFUL;`
278			`}`
279
280
281			`int pcibios_write_config_dword (unsigned char bus, unsigned char device_fn,`
282			`unsigned char where, unsigned int value)`
283			`{`
284			`unsigned long addr = LCA_CONF;`
285			`unsigned long pci_addr;`
286
287			`if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {`
288			`return PCIBIOS_SUCCESSFUL;`
289			`}`
290			`addr \|= (pci_addr << 5) + 0x18;`
291			`conf_write(addr, value << ((where & 3) * 8));`
292			`return PCIBIOS_SUCCESSFUL;`
293			`}`
294
295
296			`unsigned long lca_init(unsigned long mem_start, unsigned long mem_end)`
297			`{`
298			`#ifdef CONFIG_ALPHA_SRM_SETUP`
299			`/* check window 0 for enabled and mapped to 0 */`
300			`if ((*(vulp)LCA_IOC_W_BASE0 & (1UL<<33)) &&`
301			`(*(vulp)LCA_IOC_T_BASE0 == 0))`
302			`{`
303			`LCA_DMA_WIN_BASE = *(vulp)LCA_IOC_W_BASE0 & 0xffffffffUL;`
304			`LCA_DMA_WIN_SIZE = *(vulp)LCA_IOC_W_MASK0 & 0xffffffffUL;`
305			`LCA_DMA_WIN_SIZE += 1;`
306			`#if 1`
307			`printk("lca_init: using Window 0 settings\n");`
308			`printk("lca_init: BASE 0x%lx MASK 0x%lx TRANS 0x%lx\n",`
309			`*(vulp)LCA_IOC_W_BASE0,`
310			`*(vulp)LCA_IOC_W_MASK0,`
311			`*(vulp)LCA_IOC_T_BASE0);`
312			`#endif`
313			`}`
314			`else /* check window 2 for enabled and mapped to 0 */`
315			`if ((*(vulp)LCA_IOC_W_BASE1 & (1UL<<33)) &&`
316			`(*(vulp)LCA_IOC_T_BASE1 == 0))`
317			`{`
318			`LCA_DMA_WIN_BASE = *(vulp)LCA_IOC_W_BASE1 & 0xffffffffUL;`
319			`LCA_DMA_WIN_SIZE = *(vulp)LCA_IOC_W_MASK1 & 0xffffffffUL;`
320			`LCA_DMA_WIN_SIZE += 1;`
321			`#if 1`
322			`printk("lca_init: using Window 1 settings\n");`
323			`printk("lca_init: BASE 0x%lx MASK 0x%lx TRANS 0x%lx\n",`
324			`*(vulp)LCA_IOC_W_BASE1,`
325			`*(vulp)LCA_IOC_W_MASK1,`
326			`*(vulp)LCA_IOC_T_BASE1);`
327			`#endif`
328			`}`
329			`else /* we must use our defaults... */`
330			`#endif /* SRM_SETUP */`
331			`{`
332			`/*`
333			`* Set up the PCI->physical memory translation windows.`
334			`* For now, window 1 is disabled. In the future, we may`
335			`* want to use it to do scatter/gather DMA. Window 0`
336			`* goes at 1 GB and is 1 GB large.`
337			`*/`
338			`*(vulp)LCA_IOC_W_BASE1 = 0UL<<33;`
339
340			`*(vulp)LCA_IOC_W_BASE0 = 1UL<<33 \| LCA_DMA_WIN_BASE;`
341			`*(vulp)LCA_IOC_W_MASK0 = LCA_DMA_WIN_SIZE - 1;`
342			`*(vulp)LCA_IOC_T_BASE0 = 0;`
343			`}`
344
345			`/*`
346			`* Disable PCI parity for now. The NCR53c810 chip has`
347			`* troubles meeting the PCI spec which results in`
348			`* data parity errors.`
349			`*/`
350			`*(vulp)LCA_IOC_PAR_DIS = 1UL<<5;`
351			`return mem_start;`
352			`}`
353
354
355
356
357			`/*`
358			`* Constants used during machine-check handling. I suppose these`
359			`* could be moved into lca.h but I don't see much reason why anybody`
360			`* else would want to use them.`
361			`*/`
362			`#define ESR_EAV (1UL<< 0) /* error address valid */`
363			`#define ESR_CEE (1UL<< 1) /* correctable error */`
364			`#define ESR_UEE (1UL<< 2) /* uncorrectable error */`
365			`#define ESR_WRE (1UL<< 3) /* write-error */`
366			`#define ESR_SOR (1UL<< 4) /* error source */`
367			`#define ESR_CTE (1UL<< 7) /* cache-tag error */`
368			`#define ESR_MSE (1UL<< 9) /* multiple soft errors */`
369			`#define ESR_MHE (1UL<<10) /* multiple hard errors */`
370			`#define ESR_NXM (1UL<<12) /* non-existent memory */`
371
372			`#define IOC_ERR ( 1<<4) /* ioc logs an error */`
373			`#define IOC_CMD_SHIFT 0`
374			`#define IOC_CMD (0xf<<IOC_CMD_SHIFT)`
375			`#define IOC_CODE_SHIFT 8`
376			`#define IOC_CODE (0xf<<IOC_CODE_SHIFT)`
377			`#define IOC_LOST ( 1<<5)`
378			`#define IOC_P_NBR ((__u32) ~((1<<13) - 1))`
379
380
381			`void mem_error (unsigned long esr, unsigned long ear)`
382			`{`
383			`printk(" %s %s error to %s occurred at address %x\n",`
384			`(esr & ESR_CEE) ? "Correctable" : ((esr & ESR_UEE) ? "Uncorrectable" : "A"),`
385			`(esr & ESR_WRE) ? "write" : "read",`
386			`(esr & ESR_SOR) ? "memory" : "b-cache",`
387			`(unsigned) (ear & 0x1ffffff8));`
388			`if (esr & ESR_CTE) {`
389			`printk(" A b-cache tag parity error was detected.\n");`
390			`}`
391			`if (esr & ESR_MSE) {`
392			`printk(" Several other correctable errors occurred.\n");`
393			`}`
394			`if (esr & ESR_MHE) {`
395			`printk(" Several other uncorrectable errors occurred.\n");`
396			`}`
397			`if (esr & ESR_NXM) {`
398			`printk(" Attempted to access non-existent memory.\n");`
399			`}`
400			`}`
401
402
403			`void ioc_error (__u32 stat0, __u32 stat1)`
404			`{`
405			`const char *pci_cmd[] = {`
406			`"Interrupt Acknowledge", "Special", "I/O Read", "I/O Write",`
407			`"Rsvd 1", "Rsvd 2", "Memory Read", "Memory Write", "Rsvd3", "Rsvd4",`
408			`"Configuration Read", "Configuration Write", "Memory Read Multiple",`
409			`"Dual Address", "Memory Read Line", "Memory Write and Invalidate"`
410			`};`
411			`const char *err_name[] = {`
412			`"exceeded retry limit", "no device", "bad data parity", "target abort",`
413			`"bad address parity", "page table read error", "invalid page", "data error"`
414			`};`
415			`unsigned code = (stat0 & IOC_CODE) >> IOC_CODE_SHIFT;`
416			`unsigned cmd = (stat0 & IOC_CMD) >> IOC_CMD_SHIFT;`
417
418			`printk(" %s initiated PCI %s cycle to address %x failed due to %s.\n",`
419			`code > 3 ? "PCI" : "CPU", pci_cmd[cmd], stat1, err_name[code]);`
420			`if (code == 5 \|\| code == 6) {`
421			`printk(" (Error occurred at PCI memory address %x.)\n", (stat0 & ~IOC_P_NBR));`
422			`}`
423			`if (stat0 & IOC_LOST) {`
424			`printk(" Other PCI errors occurred simultaneously.\n");`
425			`}`
426			`}`
427
428
429			`void lca_machine_check (unsigned long vector, unsigned long la, struct pt_regs *regs)`
430			`{`
431			`unsigned long * ptr;`
432			`const char * reason;`
433			`union el_lca el;`
434			`char buf[128];`
435			`long i;`
436
437			`printk(KERN_CRIT "lca: machine check (la=0x%lx,pc=0x%lx)\n",`
438			`la, regs->pc);`
439			`el.c = (struct el_common *) la;`
440			`/*`
441			`* The first quadword after the common header always seems to`
442			`* be the machine check reason---don't know why this isn't`
443			`* part of the common header instead. In the case of a long`
444			`* logout frame, the upper 32 bits is the machine check`
445			`* revision level, which we ignore for now.`
446			`*/`
447			`switch (el.c->code & 0xffffffff) {`
448			`case MCHK_K_TPERR: reason = "tag parity error"; break;`
449			`case MCHK_K_TCPERR: reason = "tag control parity error"; break;`
450			`case MCHK_K_HERR: reason = "access to non-existent memory"; break;`
451			`case MCHK_K_ECC_C: reason = "correctable ECC error"; break;`
452			`case MCHK_K_ECC_NC: reason = "non-correctable ECC error"; break;`
453			`case MCHK_K_CACKSOFT: reason = "MCHK_K_CACKSOFT"; break; /* what's this? */`
454			`case MCHK_K_BUGCHECK: reason = "illegal exception in PAL mode"; break;`
455			`case MCHK_K_OS_BUGCHECK: reason = "callsys in kernel mode"; break;`
456			`case MCHK_K_DCPERR: reason = "d-cache parity error"; break;`
457			`case MCHK_K_ICPERR: reason = "i-cache parity error"; break;`
458			`case MCHK_K_SIO_SERR: reason = "SIO SERR occurred on PCI bus"; break;`
459			`case MCHK_K_SIO_IOCHK: reason = "SIO IOCHK occurred on ISA bus"; break;`
460			`case MCHK_K_DCSR: reason = "MCHK_K_DCSR"; break;`
461			`case MCHK_K_UNKNOWN:`
462			`default:`
463			`sprintf(buf, "reason for machine-check unknown (0x%lx)",`
464			`el.c->code & 0xffffffff);`
465			`reason = buf;`
466			`break;`
467			`}`
468
469			`wrmces(rdmces()); /* reset machine check pending flag */`
470
471			`switch (el.c->size) {`
472			`case sizeof(struct el_lca_mcheck_short):`
473			`printk(KERN_CRIT`
474			`" Reason: %s (short frame%s, dc_stat=%lx):\pn",`
475			`reason, el.c->retry ? ", retryable" : "", el.s->dc_stat);`
476			`if (el.s->esr & ESR_EAV) {`
477			`mem_error(el.s->esr, el.s->ear);`
478			`}`
479			`if (el.s->ioc_stat0 & IOC_ERR) {`
480			`ioc_error(el.s->ioc_stat0, el.s->ioc_stat1);`
481			`}`
482			`break;`
483
484			`case sizeof(struct el_lca_mcheck_long):`
485			`printk(KERN_CRIT " Reason: %s (long frame%s):\n",`
486			`reason, el.c->retry ? ", retryable" : "");`
487			`printk(KERN_CRIT`
488			`" reason: %lx exc_addr: %lx dc_stat: %lx\n",`
489			`el.l->pt[0], el.l->exc_addr, el.l->dc_stat);`
490			`printk(KERN_CRIT " car: %lx\n", el.l->car);`
491			`if (el.l->esr & ESR_EAV) {`
492			`mem_error(el.l->esr, el.l->ear);`
493			`}`
494			`if (el.l->ioc_stat0 & IOC_ERR) {`
495			`ioc_error(el.l->ioc_stat0, el.l->ioc_stat1);`
496			`}`
497			`break;`
498
499			`default:`
500			`printk(KERN_CRIT " Unknown errorlog size %d\n", el.c->size);`
501			`}`
502
503			`/* dump the logout area to give all info: */`
504
505			`ptr = (unsigned long *) la;`
506			`for (i = 0; i < el.c->size / sizeof(long); i += 2) {`
507			`printk(KERN_CRIT " +%8lx %016lx %016lx\n",`
508			`i*sizeof(long), ptr[i], ptr[i+1]);`
509			`}`
510			`}`
511
512			`void`
513			`lca_clock_print(void)`
514			`{`
515			`long pmr_reg;`
516
517			`pmr_reg = READ_PMR;`
518
519			`printk("Status of clock control:\n");`
520			`printk("\tPrimary clock divisor\t0x%x\n", GET_PRIMARY(pmr_reg));`
521			`printk("\tOverride clock divisor\t0x%x\n", GET_OVERRIDE(pmr_reg));`
522			`printk("\tInterrupt override is %s\n",`
523			`(pmr_reg & LCA_PMR_INTO) ? "on" : "off");`
524			`printk("\tDMA override is %s\n",`
525			`(pmr_reg & LCA_PMR_DMAO) ? "on" : "off");`
526
527			`}`
528
529			`int`
530			`lca_get_clock(void)`
531			`{`
532			`long pmr_reg;`
533
534			`pmr_reg = READ_PMR;`
535			`return(GET_PRIMARY(pmr_reg));`
536
537			`}`
538
539			`void`
540			`lca_clock_fiddle(int divisor)`
541			`{`
542			`long pmr_reg;`
543
544			`pmr_reg = READ_PMR;`
545			`SET_PRIMARY_CLOCK(pmr_reg, divisor);`
546			`/* lca_norm_clock = divisor; */`
547			`WRITE_PMR(pmr_reg);`
548			`mb();`
549			`}`
550
551			`#endif /* CONFIG_ALPHA_LCA */`