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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [comp.ld] - Blame information for rev 1777

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MEMORY
        {
        ram     : ORIGIN = 0x01000000, LENGTH = 0x00010000
        flash   : ORIGIN = 0x04000000, LENGTH = 0x00200000
        }
 
SECTIONS
{
        .reset :
        {
        *(.reset)
        } > flash
 
        .text :
        {
        *(.text)
        } > flash
 
        .linux ALIGN(0x4):
        {
        _linux_start = .;
        *(.linux)
        _linux_end = .;
        _src_beg = .;
        } > flash
 
        .data :
        AT ( ADDR (.text) + SIZEOF (.text) + SIZEOF (.linux))
        {
        _dst_beg = .;
        *(.rodata)
        *(.data)
        _dst_end = .;
        } > ram
 
        .bss :
        {
        *(.bss)
        } > ram
 
        .stack  ALIGN(0x10) (NOLOAD):
        {
        *(.stack)
        } > ram
}

Line No.	Rev	Author	Line
1	1624	jcastillo	`MEMORY`
2			`{`
3			`ram : ORIGIN = 0x01000000, LENGTH = 0x00010000`
4			`flash : ORIGIN = 0x04000000, LENGTH = 0x00200000`
5			`}`
6
7			`SECTIONS`
8			`{`
9			`.reset :`
10			`{`
11			`*(.reset)`
12			`} > flash`
13
14			`.text :`
15			`{`
16			`*(.text)`
17			`} > flash`
18
19			`.linux ALIGN(0x4):`
20			`{`
21			`_linux_start = .;`
22			`*(.linux)`
23			`_linux_end = .;`
24			`_src_beg = .;`
25			`} > flash`
26
27			`.data :`
28			`AT ( ADDR (.text) + SIZEOF (.text) + SIZEOF (.linux))`
29			`{`
30			`_dst_beg = .;`
31			`*(.rodata)`
32			`*(.data)`
33			`_dst_end = .;`
34			`} > ram`
35
36			`.bss :`
37			`{`
38			`*(.bss)`
39			`} > ram`
40
41			`.stack ALIGN(0x10) (NOLOAD):`
42			`{`
43			`*(.stack)`
44			`} > ram`
45			`}`

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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [comp.ld] - Blame information for rev 1777