URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [isdn/] [hisax/] [ix1_micro.c] - Blame information for rev 1777

Go to most recent revision | Details | Compare with Previous | View Log


/* $Id: ix1_micro.c,v 1.1 2005-12-20 10:17:01 jcastillo Exp $
 
 * ix1_micro.c  low level stuff for ITK ix1-micro Rev.2 isdn cards
 *              derived from the original file teles3.c from Karsten Keil
 *
 * Copyright (C) 1997 Klaus-Peter Nischke (ITK AG) (for the modifications to
 *                                                  the original file teles.c)
 *
 * Thanks to    Jan den Ouden
 *              Fritz Elfert
 *              Beat Doebeli
 *
 * $Log: not supported by cvs2svn $
 * Revision 1.1.1.1  2001/09/10 07:44:18  simons
 * Initial import
 *
 * Revision 1.1.1.1  2001/07/02 17:58:32  simons
 * Initial revision
 *
 * Revision 1.3.2.8  1998/04/08 21:58:41  keil
 * New init code
 *
 * Revision 1.3.2.7  1998/02/11 14:21:01  keil
 * cosmetic fixes
 *
 * Revision 1.3.2.6  1998/01/27 22:37:33  keil
 * fast io
 *
 * Revision 1.3.2.5  1997/11/15 18:50:51  keil
 * new common init function
 *
 * Revision 1.3.2.4  1997/10/17 22:14:09  keil
 * update to last hisax version
 *
 * Revision 2.1  1997/07/27 21:47:09  keil
 * new interface structures
 *
 * Revision 2.0  1997/06/26 11:02:50  keil
 * New Layer and card interface
 *
 * Revision 1.3  1997/04/13 19:54:02  keil
 * Change in IRQ check delay for SMP
 *
 * Revision 1.2  1997/04/06 22:54:21  keil
 * Using SKB's
 *
 * Revision 1.1  1997/01/27 15:43:10  keil
 * first version
 *
 *
 */
 
/*
   For the modification done by the author the following terms and conditions
   apply (GNU PUBLIC LICENSE)
 
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 
   You may contact Klaus-Peter Nischke by email: klaus@nischke.do.eunet.de
   or by conventional mail:
 
   Klaus-Peter Nischke
   Deusener Str. 287
   44369 Dortmund
   Germany
 */
 
 
#define __NO_VERSION__
#include "hisax.h"
#include "isac.h"
#include "hscx.h"
#include "isdnl1.h"
 
extern const char *CardType[];
const char *ix1_revision = "$Revision: 1.1 $";
 
#define byteout(addr,val) outb(val,addr)
#define bytein(addr) inb(addr)
 
#define SPECIAL_PORT_OFFSET 3
 
#define ISAC_COMMAND_OFFSET 2
#define ISAC_DATA_OFFSET 0
#define HSCX_COMMAND_OFFSET 2
#define HSCX_DATA_OFFSET 1
 
#define TIMEOUT 50
 
static inline u_char
readreg(unsigned int ale, unsigned int adr, u_char off)
{
        register u_char ret;
        long flags;
 
        save_flags(flags);
        cli();
        byteout(ale, off);
        ret = bytein(adr);
        restore_flags(flags);
        return (ret);
}
 
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
{
        /* fifo read without cli because it's allready done  */
 
        byteout(ale, off);
        insb(adr, data, size);
}
 
 
static inline void
writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
{
        long flags;
 
        save_flags(flags);
        cli();
        byteout(ale, off);
        byteout(adr, data);
        restore_flags(flags);
}
 
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
{
        /* fifo write without cli because it's allready done  */
        byteout(ale, off);
        outsb(adr, data, size);
}
 
/* Interface functions */
 
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
{
        return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset));
}
 
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
        writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset, value);
}
 
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
{
        readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
}
 
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
{
        writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
}
 
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
        return (readreg(cs->hw.ix1.hscx_ale,
                        cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0)));
}
 
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
        writereg(cs->hw.ix1.hscx_ale,
                 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value);
}
 
#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
                cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \
                cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)
 
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \
                cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
 
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \
                cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
 
#include "hscx_irq.c"
 
static void
ix1micro_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
        struct IsdnCardState *cs = dev_id;
        u_char val, stat = 0;
 
        if (!cs) {
                printk(KERN_WARNING "IX1: Spurious interrupt!\n");
                return;
        }
        val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
      Start_HSCX:
        if (val) {
                hscx_int_main(cs, val);
                stat |= 1;
        }
        val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
      Start_ISAC:
        if (val) {
                isac_interrupt(cs, val);
                stat |= 2;
        }
        val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
        if (val) {
                if (cs->debug & L1_DEB_HSCX)
                        debugl1(cs, "HSCX IntStat after IntRoutine");
                goto Start_HSCX;
        }
        val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
        if (val) {
                if (cs->debug & L1_DEB_ISAC)
                        debugl1(cs, "ISAC IntStat after IntRoutine");
                goto Start_ISAC;
        }
        if (stat & 1) {
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0xFF);
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0xFF);
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0);
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0);
        }
        if (stat & 2) {
                writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0xFF);
                writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0);
        }
}
 
void
release_io_ix1micro(struct IsdnCardState *cs)
{
        if (cs->hw.ix1.cfg_reg)
                release_region(cs->hw.ix1.cfg_reg, 4);
}
 
static void
ix1_reset(struct IsdnCardState *cs)
{
        long flags;
        int cnt;
 
        /* reset isac */
        save_flags(flags);
        cnt = 3 * (HZ / 10) + 1;
        sti();
        while (cnt--) {
                byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1);
                HZDELAY(1);     /* wait >=10 ms */
        }
        byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0);
        restore_flags(flags);
}
 
static int
ix1_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
        switch (mt) {
                case CARD_RESET:
                        ix1_reset(cs);
                        return(0);
                case CARD_RELEASE:
                        release_io_ix1micro(cs);
                        return(0);
                case CARD_SETIRQ:
                        return(request_irq(cs->irq, &ix1micro_interrupt,
                                        I4L_IRQ_FLAG, "HiSax", cs));
                case CARD_INIT:
                        inithscxisac(cs, 3);
                        return(0);
                case CARD_TEST:
                        return(0);
        }
        return(0);
}
 
 
__initfunc(int
setup_ix1micro(struct IsdnCard *card))
{
        struct IsdnCardState *cs = card->cs;
        char tmp[64];
 
        strcpy(tmp, ix1_revision);
        printk(KERN_INFO "HiSax: ITK IX1 driver Rev. %s\n", HiSax_getrev(tmp));
        if (cs->typ != ISDN_CTYPE_IX1MICROR2)
                return (0);
 
        /* IO-Ports */
        cs->hw.ix1.isac_ale = card->para[1] + ISAC_COMMAND_OFFSET;
        cs->hw.ix1.hscx_ale = card->para[1] + HSCX_COMMAND_OFFSET;
        cs->hw.ix1.isac = card->para[1] + ISAC_DATA_OFFSET;
        cs->hw.ix1.hscx = card->para[1] + HSCX_DATA_OFFSET;
        cs->hw.ix1.cfg_reg = card->para[1];
        cs->irq = card->para[0];
        if (cs->hw.ix1.cfg_reg) {
                if (check_region((cs->hw.ix1.cfg_reg), 4)) {
                        printk(KERN_WARNING
                          "HiSax: %s config port %x-%x already in use\n",
                               CardType[card->typ],
                               cs->hw.ix1.cfg_reg,
                               cs->hw.ix1.cfg_reg + 4);
                        return (0);
                } else
                        request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg");
        }
        printk(KERN_INFO
               "HiSax: %s config irq:%d io:0x%X\n",
               CardType[cs->typ], cs->irq,
               cs->hw.ix1.cfg_reg);
        ix1_reset(cs);
        cs->readisac = &ReadISAC;
        cs->writeisac = &WriteISAC;
        cs->readisacfifo = &ReadISACfifo;
        cs->writeisacfifo = &WriteISACfifo;
        cs->BC_Read_Reg = &ReadHSCX;
        cs->BC_Write_Reg = &WriteHSCX;
        cs->BC_Send_Data = &hscx_fill_fifo;
        cs->cardmsg = &ix1_card_msg;
        ISACVersion(cs, "ix1-Micro:");
        if (HscxVersion(cs, "ix1-Micro:")) {
                printk(KERN_WARNING
                    "ix1-Micro: wrong HSCX versions check IO address\n");
                release_io_ix1micro(cs);
                return (0);
        }
        return (1);
}

Browse

Tools

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [isdn/] [hisax/] [ix1_micro.c] - Blame information for rev 1777

Line No.	Rev	Author	Line
1	1626	jcastillo	`/* $Id: ix1_micro.c,v 1.1 2005-12-20 10:17:01 jcastillo Exp $`
2
3			`* ix1_micro.c low level stuff for ITK ix1-micro Rev.2 isdn cards`
4			`* derived from the original file teles3.c from Karsten Keil`
5			`*`
6			`* Copyright (C) 1997 Klaus-Peter Nischke (ITK AG) (for the modifications to`
7			`* the original file teles.c)`
8			`*`
9			`* Thanks to Jan den Ouden`
10			`* Fritz Elfert`
11			`* Beat Doebeli`
12			`*`
13			`* $Log: not supported by cvs2svn $`
14			`* Revision 1.1.1.1 2001/09/10 07:44:18 simons`
15			`* Initial import`
16			`*`
17			`* Revision 1.1.1.1 2001/07/02 17:58:32 simons`
18			`* Initial revision`
19			`*`
20			`* Revision 1.3.2.8 1998/04/08 21:58:41 keil`
21			`* New init code`
22			`*`
23			`* Revision 1.3.2.7 1998/02/11 14:21:01 keil`
24			`* cosmetic fixes`
25			`*`
26			`* Revision 1.3.2.6 1998/01/27 22:37:33 keil`
27			`* fast io`
28			`*`
29			`* Revision 1.3.2.5 1997/11/15 18:50:51 keil`
30			`* new common init function`
31			`*`
32			`* Revision 1.3.2.4 1997/10/17 22:14:09 keil`
33			`* update to last hisax version`
34			`*`
35			`* Revision 2.1 1997/07/27 21:47:09 keil`
36			`* new interface structures`
37			`*`
38			`* Revision 2.0 1997/06/26 11:02:50 keil`
39			`* New Layer and card interface`
40			`*`
41			`* Revision 1.3 1997/04/13 19:54:02 keil`
42			`* Change in IRQ check delay for SMP`
43			`*`
44			`* Revision 1.2 1997/04/06 22:54:21 keil`
45			`* Using SKB's`
46			`*`
47			`* Revision 1.1 1997/01/27 15:43:10 keil`
48			`* first version`
49			`*`
50			`*`
51			`*/`
52
53			`/*`
54			`For the modification done by the author the following terms and conditions`
55			`apply (GNU PUBLIC LICENSE)`
56
57
58			`This program is free software; you can redistribute it and/or modify`
59			`it under the terms of the GNU General Public License as published by`
60			`the Free Software Foundation; either version 2 of the License, or`
61			`(at your option) any later version.`
62
63			`This program is distributed in the hope that it will be useful,`
64			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
65			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
66			`GNU General Public License for more details.`
67
68			`You should have received a copy of the GNU General Public License`
69			`along with this program; if not, write to the Free Software`
70			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.`
71
72
73			`You may contact Klaus-Peter Nischke by email: klaus@nischke.do.eunet.de`
74			`or by conventional mail:`
75
76			`Klaus-Peter Nischke`
77			`Deusener Str. 287`
78			`44369 Dortmund`
79			`Germany`
80			`*/`
81
82
83			`#define __NO_VERSION__`
84			`#include "hisax.h"`
85			`#include "isac.h"`
86			`#include "hscx.h"`
87			`#include "isdnl1.h"`
88
89			`extern const char *CardType[];`
90			`const char *ix1_revision = "$Revision: 1.1 $";`
91
92			`#define byteout(addr,val) outb(val,addr)`
93			`#define bytein(addr) inb(addr)`
94
95			`#define SPECIAL_PORT_OFFSET 3`
96
97			`#define ISAC_COMMAND_OFFSET 2`
98			`#define ISAC_DATA_OFFSET 0`
99			`#define HSCX_COMMAND_OFFSET 2`
100			`#define HSCX_DATA_OFFSET 1`
101
102			`#define TIMEOUT 50`
103
104			`static inline u_char`
105			`readreg(unsigned int ale, unsigned int adr, u_char off)`
106			`{`
107			`register u_char ret;`
108			`long flags;`
109
110			`save_flags(flags);`
111			`cli();`
112			`byteout(ale, off);`
113			`ret = bytein(adr);`
114			`restore_flags(flags);`
115			`return (ret);`
116			`}`
117
118			`static inline void`
119			`readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)`
120			`{`
121			`/* fifo read without cli because it's allready done */`
122
123			`byteout(ale, off);`
124			`insb(adr, data, size);`
125			`}`
126
127
128			`static inline void`
129			`writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)`
130			`{`
131			`long flags;`
132
133			`save_flags(flags);`
134			`cli();`
135			`byteout(ale, off);`
136			`byteout(adr, data);`
137			`restore_flags(flags);`
138			`}`
139
140			`static inline void`
141			`writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)`
142			`{`
143			`/* fifo write without cli because it's allready done */`
144			`byteout(ale, off);`
145			`outsb(adr, data, size);`
146			`}`
147
148			`/* Interface functions */`
149
150			`static u_char`
151			`ReadISAC(struct IsdnCardState *cs, u_char offset)`
152			`{`
153			`return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset));`
154			`}`
155
156			`static void`
157			`WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)`
158			`{`
159			`writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset, value);`
160			`}`
161
162			`static void`
163			`ReadISACfifo(struct IsdnCardState cs, u_char data, int size)`
164			`{`
165			`readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);`
166			`}`
167
168			`static void`
169			`WriteISACfifo(struct IsdnCardState cs, u_char data, int size)`
170			`{`
171			`writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);`
172			`}`
173
174			`static u_char`
175			`ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)`
176			`{`
177			`return (readreg(cs->hw.ix1.hscx_ale,`
178			`cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0)));`
179			`}`
180
181			`static void`
182			`WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)`
183			`{`
184			`writereg(cs->hw.ix1.hscx_ale,`
185			`cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value);`
186			`}`
187
188			`#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \`
189			`cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))`
190			`#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \`
191			`cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)`
192
193			`#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \`
194			`cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)`
195
196			`#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \`
197			`cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)`
198
199			`#include "hscx_irq.c"`
200
201			`static void`
202			`ix1micro_interrupt(int intno, void dev_id, struct pt_regs regs)`
203			`{`
204			`struct IsdnCardState *cs = dev_id;`
205			`u_char val, stat = 0;`
206
207			`if (!cs) {`
208			`printk(KERN_WARNING "IX1: Spurious interrupt!\n");`
209			`return;`
210			`}`
211			`val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);`
212			`Start_HSCX:`
213			`if (val) {`
214			`hscx_int_main(cs, val);`
215			`stat \|= 1;`
216			`}`
217			`val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);`
218			`Start_ISAC:`
219			`if (val) {`
220			`isac_interrupt(cs, val);`
221			`stat \|= 2;`
222			`}`
223			`val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);`
224			`if (val) {`
225			`if (cs->debug & L1_DEB_HSCX)`
226			`debugl1(cs, "HSCX IntStat after IntRoutine");`
227			`goto Start_HSCX;`
228			`}`
229			`val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);`
230			`if (val) {`
231			`if (cs->debug & L1_DEB_ISAC)`
232			`debugl1(cs, "ISAC IntStat after IntRoutine");`
233			`goto Start_ISAC;`
234			`}`
235			`if (stat & 1) {`
236			`writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0xFF);`
237			`writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0xFF);`
238			`writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0);`
239			`writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0);`
240			`}`
241			`if (stat & 2) {`
242			`writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0xFF);`
243			`writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0);`
244			`}`
245			`}`
246
247			`void`
248			`release_io_ix1micro(struct IsdnCardState *cs)`
249			`{`
250			`if (cs->hw.ix1.cfg_reg)`
251			`release_region(cs->hw.ix1.cfg_reg, 4);`
252			`}`
253
254			`static void`
255			`ix1_reset(struct IsdnCardState *cs)`
256			`{`
257			`long flags;`
258			`int cnt;`
259
260			`/* reset isac */`
261			`save_flags(flags);`
262			`cnt = 3 * (HZ / 10) + 1;`
263			`sti();`
264			`while (cnt--) {`
265			`byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1);`
266			`HZDELAY(1); /* wait >=10 ms */`
267			`}`
268			`byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0);`
269			`restore_flags(flags);`
270			`}`
271
272			`static int`
273			`ix1_card_msg(struct IsdnCardState cs, int mt, void arg)`
274			`{`
275			`switch (mt) {`
276			`case CARD_RESET:`
277			`ix1_reset(cs);`
278			`return(0);`
279			`case CARD_RELEASE:`
280			`release_io_ix1micro(cs);`
281			`return(0);`
282			`case CARD_SETIRQ:`
283			`return(request_irq(cs->irq, &ix1micro_interrupt,`
284			`I4L_IRQ_FLAG, "HiSax", cs));`
285			`case CARD_INIT:`
286			`inithscxisac(cs, 3);`
287			`return(0);`
288			`case CARD_TEST:`
289			`return(0);`
290			`}`
291			`return(0);`
292			`}`
293
294
295			`__initfunc(int`
296			`setup_ix1micro(struct IsdnCard *card))`
297			`{`
298			`struct IsdnCardState *cs = card->cs;`
299			`char tmp[64];`
300
301			`strcpy(tmp, ix1_revision);`
302			`printk(KERN_INFO "HiSax: ITK IX1 driver Rev. %s\n", HiSax_getrev(tmp));`
303			`if (cs->typ != ISDN_CTYPE_IX1MICROR2)`
304			`return (0);`
305
306			`/* IO-Ports */`
307			`cs->hw.ix1.isac_ale = card->para[1] + ISAC_COMMAND_OFFSET;`
308			`cs->hw.ix1.hscx_ale = card->para[1] + HSCX_COMMAND_OFFSET;`
309			`cs->hw.ix1.isac = card->para[1] + ISAC_DATA_OFFSET;`
310			`cs->hw.ix1.hscx = card->para[1] + HSCX_DATA_OFFSET;`
311			`cs->hw.ix1.cfg_reg = card->para[1];`
312			`cs->irq = card->para[0];`
313			`if (cs->hw.ix1.cfg_reg) {`
314			`if (check_region((cs->hw.ix1.cfg_reg), 4)) {`
315			`printk(KERN_WARNING`
316			`"HiSax: %s config port %x-%x already in use\n",`
317			`CardType[card->typ],`
318			`cs->hw.ix1.cfg_reg,`
319			`cs->hw.ix1.cfg_reg + 4);`
320			`return (0);`
321			`} else`
322			`request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg");`
323			`}`
324			`printk(KERN_INFO`
325			`"HiSax: %s config irq:%d io:0x%X\n",`
326			`CardType[cs->typ], cs->irq,`
327			`cs->hw.ix1.cfg_reg);`
328			`ix1_reset(cs);`
329			`cs->readisac = &ReadISAC;`
330			`cs->writeisac = &WriteISAC;`
331			`cs->readisacfifo = &ReadISACfifo;`
332			`cs->writeisacfifo = &WriteISACfifo;`
333			`cs->BC_Read_Reg = &ReadHSCX;`
334			`cs->BC_Write_Reg = &WriteHSCX;`
335			`cs->BC_Send_Data = &hscx_fill_fifo;`
336			`cs->cardmsg = &ix1_card_msg;`
337			`ISACVersion(cs, "ix1-Micro:");`
338			`if (HscxVersion(cs, "ix1-Micro:")) {`
339			`printk(KERN_WARNING`
340			`"ix1-Micro: wrong HSCX versions check IO address\n");`
341			`release_io_ix1micro(cs);`
342			`return (0);`
343			`}`
344			`return (1);`
345			`}`