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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [isdn/] [hisax/] [telespci.c] - Blame information for rev 1626

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/* $Id: telespci.c,v 1.1 2005-12-20 10:17:01 jcastillo Exp $
 
 * telespci.c     low level stuff for Teles PCI isdn cards
 *
 * Author       Ton van Rosmalen
 *              Karsten Keil (keil@temic-ech.spacenet.de)
 *
 *
 * $Log: not supported by cvs2svn $
 * Revision 1.1.1.1  2001/09/10 07:44:19  simons
 * Initial import
 *
 * Revision 1.1.1.1  2001/07/02 17:58:32  simons
 * Initial revision
 *
 * Revision 1.1.2.3  1998/10/16 12:46:09  keil
 * fix pci detection for more as one card
 *
 * Revision 1.1.2.2  1998/04/20 08:52:46  keil
 * Fix register offsets
 *
 * Revision 1.1.2.1  1998/04/11 18:44:42  keil
 * New files
 *
 *
 */
#define __NO_VERSION__
#include <linux/config.h>
#include "hisax.h"
#include "isac.h"
#include "hscx.h"
#include "isdnl1.h"
#include <linux/pci.h>
#include <linux/bios32.h>
 
extern const char *CardType[];
 
const char *telespci_revision = "$Revision: 1.1 $";
 
#define ZORAN_PO_RQ_PEN 0x02000000
#define ZORAN_PO_WR     0x00800000
#define ZORAN_PO_GID0   0x00000000
#define ZORAN_PO_GID1   0x00100000
#define ZORAN_PO_GREG0  0x00000000
#define ZORAN_PO_GREG1  0x00010000
#define ZORAN_PO_DMASK  0xFF
 
#define WRITE_ADDR_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0 | ZORAN_PO_GREG0)
#define READ_DATA_ISAC  (ZORAN_PO_GID0 | ZORAN_PO_GREG1)
#define WRITE_DATA_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0 | ZORAN_PO_GREG1)
#define WRITE_ADDR_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG0)
#define READ_DATA_HSCX  (ZORAN_PO_GID1 | ZORAN_PO_GREG1)
#define WRITE_DATA_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG1)
 
#define ZORAN_WAIT_NOBUSY       do { \
                                        portdata = readl(adr + 0x200); \
                                } while (portdata & ZORAN_PO_RQ_PEN)
 
static inline u_char
readisac(unsigned int adr, u_char off)
{
        register unsigned int portdata;
 
        ZORAN_WAIT_NOBUSY;
 
        /* set address for ISAC */
        writel(WRITE_ADDR_ISAC | off, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
 
        /* read data from ISAC */
        writel(READ_DATA_ISAC, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
        return((u_char)(portdata & ZORAN_PO_DMASK));
}
 
static inline void
writeisac(unsigned int adr, u_char off, u_char data)
{
        register unsigned int portdata;
 
        ZORAN_WAIT_NOBUSY;
 
        /* set address for ISAC */
        writel(WRITE_ADDR_ISAC | off, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
 
        /* write data to ISAC */
        writel(WRITE_DATA_ISAC | data, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
}
 
static inline u_char
readhscx(unsigned int adr, int hscx, u_char off)
{
        register unsigned int portdata;
 
        ZORAN_WAIT_NOBUSY;
        /* set address for HSCX */
        writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200);
        ZORAN_WAIT_NOBUSY;
 
        /* read data from HSCX */
        writel(READ_DATA_HSCX, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
        return ((u_char)(portdata & ZORAN_PO_DMASK));
}
 
static inline void
writehscx(unsigned int adr, int hscx, u_char off, u_char data)
{
        register unsigned int portdata;
 
        ZORAN_WAIT_NOBUSY;
        /* set address for HSCX */
        writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200);
        ZORAN_WAIT_NOBUSY;
 
        /* write data to HSCX */
        writel(WRITE_DATA_HSCX | data, adr + 0x200);
        ZORAN_WAIT_NOBUSY;
}
 
static inline void
read_fifo_isac(unsigned int adr, u_char * data, int size)
{
        register unsigned int portdata;
        register int i;
 
        ZORAN_WAIT_NOBUSY;
        /* read data from ISAC */
        for (i = 0; i < size; i++) {
                /* set address for ISAC fifo */
                writel(WRITE_ADDR_ISAC | 0x1E, adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                writel(READ_DATA_ISAC, adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                data[i] = (u_char)(portdata & ZORAN_PO_DMASK);
        }
}
 
static void
write_fifo_isac(unsigned int adr, u_char * data, int size)
{
        register unsigned int portdata;
        register int i;
 
        ZORAN_WAIT_NOBUSY;
        /* write data to ISAC */
        for (i = 0; i < size; i++) {
                /* set address for ISAC fifo */
                writel(WRITE_ADDR_ISAC | 0x1E, adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                writel(WRITE_DATA_ISAC | data[i], adr + 0x200);
                ZORAN_WAIT_NOBUSY;
        }
}
 
static inline void
read_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)
{
        register unsigned int portdata;
        register int i;
 
        ZORAN_WAIT_NOBUSY;
        /* read data from HSCX */
        for (i = 0; i < size; i++) {
                /* set address for HSCX fifo */
                writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                writel(READ_DATA_HSCX, adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                data[i] = (u_char) (portdata & ZORAN_PO_DMASK);
        }
}
 
static inline void
write_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)
{
        unsigned int portdata;
        register int i;
 
        ZORAN_WAIT_NOBUSY;
        /* write data to HSCX */
        for (i = 0; i < size; i++) {
                /* set address for HSCX fifo */
                writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                writel(WRITE_DATA_HSCX | data[i], adr + 0x200);
                ZORAN_WAIT_NOBUSY;
                udelay(10);
        }
}
 
/* Interface functions */
 
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
{
        return (readisac(cs->hw.teles0.membase, offset));
}
 
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
        writeisac(cs->hw.teles0.membase, offset, value);
}
 
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
{
        read_fifo_isac(cs->hw.teles0.membase, data, size);
}
 
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
{
        write_fifo_isac(cs->hw.teles0.membase, data, size);
}
 
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
        return (readhscx(cs->hw.teles0.membase, hscx, offset));
}
 
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
        writehscx(cs->hw.teles0.membase, hscx, offset, value);
}
 
/*
 * fast interrupt HSCX stuff goes here
 */
 
#define READHSCX(cs, nr, reg) readhscx(cs->hw.teles0.membase, nr, reg)
#define WRITEHSCX(cs, nr, reg, data) writehscx(cs->hw.teles0.membase, nr, reg, data)
#define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)
 
#include "hscx_irq.c"
 
static void
telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
#define MAXCOUNT 20
        struct IsdnCardState *cs = dev_id;
        u_char val, stat = 0;
 
        if (!cs) {
                printk(KERN_WARNING "TelesPCI: Spurious interrupt!\n");
                return;
        }
        val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
        if (val) {
                hscx_int_main(cs, val);
                stat |= 1;
        }
        val = readisac(cs->hw.teles0.membase, ISAC_ISTA);
        if (val) {
                isac_interrupt(cs, val);
                stat |= 2;
        }
        /* Clear interrupt register for Zoran PCI controller */
        writel(0x70000000, cs->hw.teles0.membase + 0x3C);
 
        if (stat & 1) {
                writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF);
                writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF);
                writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
                writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
        }
        if (stat & 2) {
                writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
                writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
        }
}
 
void
release_io_telespci(struct IsdnCardState *cs)
{
        vfree((void *)cs->hw.teles0.membase);
}
 
static int
TelesPCI_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
        switch (mt) {
                case CARD_RESET:
                        return(0);
                case CARD_RELEASE:
                        release_io_telespci(cs);
                        return(0);
                case CARD_SETIRQ:
                        return(request_irq(cs->irq, &telespci_interrupt,
                                        I4L_IRQ_FLAG | SA_SHIRQ, "HiSax", cs));
                case CARD_INIT:
                        inithscxisac(cs, 3);
                        return(0);
                case CARD_TEST:
                        return(0);
        }
        return(0);
}
 
static  int pci_index __initdata = 0;
 
__initfunc(int
setup_telespci(struct IsdnCard *card))
{
        int found=0;
        struct IsdnCardState *cs = card->cs;
        char tmp[64];
        u_char pci_bus, pci_device_fn, pci_irq;
        u_int pci_memaddr;
 
        strcpy(tmp, telespci_revision);
        printk(KERN_INFO "HiSax: Teles/PCI driver Rev. %s\n", HiSax_getrev(tmp));
        if (cs->typ != ISDN_CTYPE_TELESPCI)
                return (0);
 
#if CONFIG_PCI
        for (; pci_index < 0xff; pci_index++) {
                if (pcibios_find_device (0x11DE, 0x6120,
                        pci_index, &pci_bus, &pci_device_fn)
                        == PCIBIOS_SUCCESSFUL) {
                        found = 1;
                } else {
                        break;
                }
                pcibios_read_config_dword(pci_bus, pci_device_fn,
                                PCI_BASE_ADDRESS_0, &pci_memaddr);
                pcibios_read_config_byte(pci_bus, pci_device_fn,
                                PCI_INTERRUPT_LINE, &pci_irq);
 
                printk(KERN_INFO "Found: Zoran, base-address: 0x%x,"
                        " irq: 0x%x\n", pci_memaddr, pci_irq);
                break;
        }
        if (!found) {
                printk(KERN_WARNING "TelesPCI: No PCI card found\n");
                return(0);
        }
        pci_index++;
        cs->hw.teles0.membase = (u_int) vremap(pci_memaddr, PAGE_SIZE);
        cs->irq = pci_irq;
#else
        printk(KERN_WARNING "HiSax: Teles/PCI and NO_PCI_BIOS\n");
        printk(KERN_WARNING "HiSax: Teles/PCI unable to config\n");
        return (0);
#endif /* CONFIG_PCI */
 
        /* Initialize Zoran PCI controller */
        writel(0x00000000, cs->hw.teles0.membase + 0x28);
        writel(0x01000000, cs->hw.teles0.membase + 0x28);
        writel(0x01000000, cs->hw.teles0.membase + 0x28);
        writel(0x7BFFFFFF, cs->hw.teles0.membase + 0x2C);
        writel(0x70000000, cs->hw.teles0.membase + 0x3C);
        writel(0x61000000, cs->hw.teles0.membase + 0x40);
        /* writel(0x00800000, cs->hw.teles0.membase + 0x200); */
 
        printk(KERN_INFO
               "HiSax: %s config irq:%d mem:%x\n",
               CardType[cs->typ], cs->irq,
               cs->hw.teles0.membase);
 
        cs->readisac = &ReadISAC;
        cs->writeisac = &WriteISAC;
        cs->readisacfifo = &ReadISACfifo;
        cs->writeisacfifo = &WriteISACfifo;
        cs->BC_Read_Reg = &ReadHSCX;
        cs->BC_Write_Reg = &WriteHSCX;
        cs->BC_Send_Data = &hscx_fill_fifo;
        cs->cardmsg = &TelesPCI_card_msg;
        ISACVersion(cs, "TelesPCI:");
        if (HscxVersion(cs, "TelesPCI:")) {
                printk(KERN_WARNING
                 "TelesPCI: wrong HSCX versions check IO/MEM addresses\n");
                release_io_telespci(cs);
                return (0);
        }
        return (1);
}

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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [isdn/] [hisax/] [telespci.c] - Blame information for rev 1626

Line No.	Rev	Author	Line
1	1626	jcastillo	`/* $Id: telespci.c,v 1.1 2005-12-20 10:17:01 jcastillo Exp $`
2
3			`* telespci.c low level stuff for Teles PCI isdn cards`
4			`*`
5			`* Author Ton van Rosmalen`
6			`* Karsten Keil (keil@temic-ech.spacenet.de)`
7			`*`
8			`*`
9			`* $Log: not supported by cvs2svn $`
10			`* Revision 1.1.1.1 2001/09/10 07:44:19 simons`
11			`* Initial import`
12			`*`
13			`* Revision 1.1.1.1 2001/07/02 17:58:32 simons`
14			`* Initial revision`
15			`*`
16			`* Revision 1.1.2.3 1998/10/16 12:46:09 keil`
17			`* fix pci detection for more as one card`
18			`*`
19			`* Revision 1.1.2.2 1998/04/20 08:52:46 keil`
20			`* Fix register offsets`
21			`*`
22			`* Revision 1.1.2.1 1998/04/11 18:44:42 keil`
23			`* New files`
24			`*`
25			`*`
26			`*/`
27			`#define __NO_VERSION__`
28			`#include <linux/config.h>`
29			`#include "hisax.h"`
30			`#include "isac.h"`
31			`#include "hscx.h"`
32			`#include "isdnl1.h"`
33			`#include <linux/pci.h>`
34			`#include <linux/bios32.h>`
35
36			`extern const char *CardType[];`
37
38			`const char *telespci_revision = "$Revision: 1.1 $";`
39
40			`#define ZORAN_PO_RQ_PEN 0x02000000`
41			`#define ZORAN_PO_WR 0x00800000`
42			`#define ZORAN_PO_GID0 0x00000000`
43			`#define ZORAN_PO_GID1 0x00100000`
44			`#define ZORAN_PO_GREG0 0x00000000`
45			`#define ZORAN_PO_GREG1 0x00010000`
46			`#define ZORAN_PO_DMASK 0xFF`
47
48			`#define WRITE_ADDR_ISAC (ZORAN_PO_WR \| ZORAN_PO_GID0 \| ZORAN_PO_GREG0)`
49			`#define READ_DATA_ISAC (ZORAN_PO_GID0 \| ZORAN_PO_GREG1)`
50			`#define WRITE_DATA_ISAC (ZORAN_PO_WR \| ZORAN_PO_GID0 \| ZORAN_PO_GREG1)`
51			`#define WRITE_ADDR_HSCX (ZORAN_PO_WR \| ZORAN_PO_GID1 \| ZORAN_PO_GREG0)`
52			`#define READ_DATA_HSCX (ZORAN_PO_GID1 \| ZORAN_PO_GREG1)`
53			`#define WRITE_DATA_HSCX (ZORAN_PO_WR \| ZORAN_PO_GID1 \| ZORAN_PO_GREG1)`
54
55			`#define ZORAN_WAIT_NOBUSY do { \`
56			`portdata = readl(adr + 0x200); \`
57			`} while (portdata & ZORAN_PO_RQ_PEN)`
58
59			`static inline u_char`
60			`readisac(unsigned int adr, u_char off)`
61			`{`
62			`register unsigned int portdata;`
63
64			`ZORAN_WAIT_NOBUSY;`
65
66			`/* set address for ISAC */`
67			`writel(WRITE_ADDR_ISAC \| off, adr + 0x200);`
68			`ZORAN_WAIT_NOBUSY;`
69
70			`/* read data from ISAC */`
71			`writel(READ_DATA_ISAC, adr + 0x200);`
72			`ZORAN_WAIT_NOBUSY;`
73			`return((u_char)(portdata & ZORAN_PO_DMASK));`
74			`}`
75
76			`static inline void`
77			`writeisac(unsigned int adr, u_char off, u_char data)`
78			`{`
79			`register unsigned int portdata;`
80
81			`ZORAN_WAIT_NOBUSY;`
82
83			`/* set address for ISAC */`
84			`writel(WRITE_ADDR_ISAC \| off, adr + 0x200);`
85			`ZORAN_WAIT_NOBUSY;`
86
87			`/* write data to ISAC */`
88			`writel(WRITE_DATA_ISAC \| data, adr + 0x200);`
89			`ZORAN_WAIT_NOBUSY;`
90			`}`
91
92			`static inline u_char`
93			`readhscx(unsigned int adr, int hscx, u_char off)`
94			`{`
95			`register unsigned int portdata;`
96
97			`ZORAN_WAIT_NOBUSY;`
98			`/* set address for HSCX */`
99			`writel(WRITE_ADDR_HSCX \| ((hscx ? 0x40:0) + off), adr + 0x200);`
100			`ZORAN_WAIT_NOBUSY;`
101
102			`/* read data from HSCX */`
103			`writel(READ_DATA_HSCX, adr + 0x200);`
104			`ZORAN_WAIT_NOBUSY;`
105			`return ((u_char)(portdata & ZORAN_PO_DMASK));`
106			`}`
107
108			`static inline void`
109			`writehscx(unsigned int adr, int hscx, u_char off, u_char data)`
110			`{`
111			`register unsigned int portdata;`
112
113			`ZORAN_WAIT_NOBUSY;`
114			`/* set address for HSCX */`
115			`writel(WRITE_ADDR_HSCX \| ((hscx ? 0x40:0) + off), adr + 0x200);`
116			`ZORAN_WAIT_NOBUSY;`
117
118			`/* write data to HSCX */`
119			`writel(WRITE_DATA_HSCX \| data, adr + 0x200);`
120			`ZORAN_WAIT_NOBUSY;`
121			`}`
122
123			`static inline void`
124			`read_fifo_isac(unsigned int adr, u_char * data, int size)`
125			`{`
126			`register unsigned int portdata;`
127			`register int i;`
128
129			`ZORAN_WAIT_NOBUSY;`
130			`/* read data from ISAC */`
131			`for (i = 0; i < size; i++) {`
132			`/* set address for ISAC fifo */`
133			`writel(WRITE_ADDR_ISAC \| 0x1E, adr + 0x200);`
134			`ZORAN_WAIT_NOBUSY;`
135			`writel(READ_DATA_ISAC, adr + 0x200);`
136			`ZORAN_WAIT_NOBUSY;`
137			`data[i] = (u_char)(portdata & ZORAN_PO_DMASK);`
138			`}`
139			`}`
140
141			`static void`
142			`write_fifo_isac(unsigned int adr, u_char * data, int size)`
143			`{`
144			`register unsigned int portdata;`
145			`register int i;`
146
147			`ZORAN_WAIT_NOBUSY;`
148			`/* write data to ISAC */`
149			`for (i = 0; i < size; i++) {`
150			`/* set address for ISAC fifo */`
151			`writel(WRITE_ADDR_ISAC \| 0x1E, adr + 0x200);`
152			`ZORAN_WAIT_NOBUSY;`
153			`writel(WRITE_DATA_ISAC \| data[i], adr + 0x200);`
154			`ZORAN_WAIT_NOBUSY;`
155			`}`
156			`}`
157
158			`static inline void`
159			`read_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)`
160			`{`
161			`register unsigned int portdata;`
162			`register int i;`
163
164			`ZORAN_WAIT_NOBUSY;`
165			`/* read data from HSCX */`
166			`for (i = 0; i < size; i++) {`
167			`/* set address for HSCX fifo */`
168			`writel(WRITE_ADDR_HSCX \|(hscx ? 0x5F:0x1F), adr + 0x200);`
169			`ZORAN_WAIT_NOBUSY;`
170			`writel(READ_DATA_HSCX, adr + 0x200);`
171			`ZORAN_WAIT_NOBUSY;`
172			`data[i] = (u_char) (portdata & ZORAN_PO_DMASK);`
173			`}`
174			`}`
175
176			`static inline void`
177			`write_fifo_hscx(unsigned int adr, int hscx, u_char * data, int size)`
178			`{`
179			`unsigned int portdata;`
180			`register int i;`
181
182			`ZORAN_WAIT_NOBUSY;`
183			`/* write data to HSCX */`
184			`for (i = 0; i < size; i++) {`
185			`/* set address for HSCX fifo */`
186			`writel(WRITE_ADDR_HSCX \|(hscx ? 0x5F:0x1F), adr + 0x200);`
187			`ZORAN_WAIT_NOBUSY;`
188			`writel(WRITE_DATA_HSCX \| data[i], adr + 0x200);`
189			`ZORAN_WAIT_NOBUSY;`
190			`udelay(10);`
191			`}`
192			`}`
193
194			`/* Interface functions */`
195
196			`static u_char`
197			`ReadISAC(struct IsdnCardState *cs, u_char offset)`
198			`{`
199			`return (readisac(cs->hw.teles0.membase, offset));`
200			`}`
201
202			`static void`
203			`WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)`
204			`{`
205			`writeisac(cs->hw.teles0.membase, offset, value);`
206			`}`
207
208			`static void`
209			`ReadISACfifo(struct IsdnCardState cs, u_char data, int size)`
210			`{`
211			`read_fifo_isac(cs->hw.teles0.membase, data, size);`
212			`}`
213
214			`static void`
215			`WriteISACfifo(struct IsdnCardState cs, u_char data, int size)`
216			`{`
217			`write_fifo_isac(cs->hw.teles0.membase, data, size);`
218			`}`
219
220			`static u_char`
221			`ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)`
222			`{`
223			`return (readhscx(cs->hw.teles0.membase, hscx, offset));`
224			`}`
225
226			`static void`
227			`WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)`
228			`{`
229			`writehscx(cs->hw.teles0.membase, hscx, offset, value);`
230			`}`
231
232			`/*`
233			`* fast interrupt HSCX stuff goes here`
234			`*/`
235
236			`#define READHSCX(cs, nr, reg) readhscx(cs->hw.teles0.membase, nr, reg)`
237			`#define WRITEHSCX(cs, nr, reg, data) writehscx(cs->hw.teles0.membase, nr, reg, data)`
238			`#define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)`
239			`#define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)`
240
241			`#include "hscx_irq.c"`
242
243			`static void`
244			`telespci_interrupt(int intno, void dev_id, struct pt_regs regs)`
245			`{`
246			`#define MAXCOUNT 20`
247			`struct IsdnCardState *cs = dev_id;`
248			`u_char val, stat = 0;`
249
250			`if (!cs) {`
251			`printk(KERN_WARNING "TelesPCI: Spurious interrupt!\n");`
252			`return;`
253			`}`
254			`val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);`
255			`if (val) {`
256			`hscx_int_main(cs, val);`
257			`stat \|= 1;`
258			`}`
259			`val = readisac(cs->hw.teles0.membase, ISAC_ISTA);`
260			`if (val) {`
261			`isac_interrupt(cs, val);`
262			`stat \|= 2;`
263			`}`
264			`/* Clear interrupt register for Zoran PCI controller */`
265			`writel(0x70000000, cs->hw.teles0.membase + 0x3C);`
266
267			`if (stat & 1) {`
268			`writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF);`
269			`writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF);`
270			`writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);`
271			`writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);`
272			`}`
273			`if (stat & 2) {`
274			`writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);`
275			`writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);`
276			`}`
277			`}`
278
279			`void`
280			`release_io_telespci(struct IsdnCardState *cs)`
281			`{`
282			`vfree((void *)cs->hw.teles0.membase);`
283			`}`
284
285			`static int`
286			`TelesPCI_card_msg(struct IsdnCardState cs, int mt, void arg)`
287			`{`
288			`switch (mt) {`
289			`case CARD_RESET:`
290			`return(0);`
291			`case CARD_RELEASE:`
292			`release_io_telespci(cs);`
293			`return(0);`
294			`case CARD_SETIRQ:`
295			`return(request_irq(cs->irq, &telespci_interrupt,`
296			`I4L_IRQ_FLAG \| SA_SHIRQ, "HiSax", cs));`
297			`case CARD_INIT:`
298			`inithscxisac(cs, 3);`
299			`return(0);`
300			`case CARD_TEST:`
301			`return(0);`
302			`}`
303			`return(0);`
304			`}`
305
306			`static int pci_index __initdata = 0;`
307
308			`__initfunc(int`
309			`setup_telespci(struct IsdnCard *card))`
310			`{`
311			`int found=0;`
312			`struct IsdnCardState *cs = card->cs;`
313			`char tmp[64];`
314			`u_char pci_bus, pci_device_fn, pci_irq;`
315			`u_int pci_memaddr;`
316
317			`strcpy(tmp, telespci_revision);`
318			`printk(KERN_INFO "HiSax: Teles/PCI driver Rev. %s\n", HiSax_getrev(tmp));`
319			`if (cs->typ != ISDN_CTYPE_TELESPCI)`
320			`return (0);`
321
322			`#if CONFIG_PCI`
323			`for (; pci_index < 0xff; pci_index++) {`
324			`if (pcibios_find_device (0x11DE, 0x6120,`
325			`pci_index, &pci_bus, &pci_device_fn)`
326			`== PCIBIOS_SUCCESSFUL) {`
327			`found = 1;`
328			`} else {`
329			`break;`
330			`}`
331			`pcibios_read_config_dword(pci_bus, pci_device_fn,`
332			`PCI_BASE_ADDRESS_0, &pci_memaddr);`
333			`pcibios_read_config_byte(pci_bus, pci_device_fn,`
334			`PCI_INTERRUPT_LINE, &pci_irq);`
335
336			`printk(KERN_INFO "Found: Zoran, base-address: 0x%x,"`
337			`" irq: 0x%x\n", pci_memaddr, pci_irq);`
338			`break;`
339			`}`
340			`if (!found) {`
341			`printk(KERN_WARNING "TelesPCI: No PCI card found\n");`
342			`return(0);`
343			`}`
344			`pci_index++;`
345			`cs->hw.teles0.membase = (u_int) vremap(pci_memaddr, PAGE_SIZE);`
346			`cs->irq = pci_irq;`
347			`#else`
348			`printk(KERN_WARNING "HiSax: Teles/PCI and NO_PCI_BIOS\n");`
349			`printk(KERN_WARNING "HiSax: Teles/PCI unable to config\n");`
350			`return (0);`
351			`#endif /* CONFIG_PCI */`
352
353			`/* Initialize Zoran PCI controller */`
354			`writel(0x00000000, cs->hw.teles0.membase + 0x28);`
355			`writel(0x01000000, cs->hw.teles0.membase + 0x28);`
356			`writel(0x01000000, cs->hw.teles0.membase + 0x28);`
357			`writel(0x7BFFFFFF, cs->hw.teles0.membase + 0x2C);`
358			`writel(0x70000000, cs->hw.teles0.membase + 0x3C);`
359			`writel(0x61000000, cs->hw.teles0.membase + 0x40);`
360			`/* writel(0x00800000, cs->hw.teles0.membase + 0x200); */`
361
362			`printk(KERN_INFO`
363			`"HiSax: %s config irq:%d mem:%x\n",`
364			`CardType[cs->typ], cs->irq,`
365			`cs->hw.teles0.membase);`
366
367			`cs->readisac = &ReadISAC;`
368			`cs->writeisac = &WriteISAC;`
369			`cs->readisacfifo = &ReadISACfifo;`
370			`cs->writeisacfifo = &WriteISACfifo;`
371			`cs->BC_Read_Reg = &ReadHSCX;`
372			`cs->BC_Write_Reg = &WriteHSCX;`
373			`cs->BC_Send_Data = &hscx_fill_fifo;`
374			`cs->cardmsg = &TelesPCI_card_msg;`
375			`ISACVersion(cs, "TelesPCI:");`
376			`if (HscxVersion(cs, "TelesPCI:")) {`
377			`printk(KERN_WARNING`
378			`"TelesPCI: wrong HSCX versions check IO/MEM addresses\n");`
379			`release_io_telespci(cs);`
380			`return (0);`
381			`}`
382			`return (1);`
383			`}`