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jcastillo |
/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
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Written 1994 by David C. Davies.
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Copyright 1994 Digital Equipment Corporation.
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This software may be used and distributed according to the terms of
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the GNU Public License, incorporated herein by reference.
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This driver is written for the Digital Equipment Corporation series
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of EtherWORKS ethernet cards:
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DE203 Turbo (BNC)
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DE204 Turbo (TP)
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DE205 Turbo (TP BNC)
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The driver has been tested on a relatively busy network using the DE205
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card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
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(7.8Mb/s) to a DECstation 5000/200.
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The author may be reached at davies@maniac.ultranet.com.
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=========================================================================
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This driver has been written substantially from scratch, although its
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inheritance of style and stack interface from 'depca.c' and in turn from
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Donald Becker's 'lance.c' should be obvious.
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The DE203/4/5 boards all use a new proprietary chip in place of the
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LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
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Use the depca.c driver in the standard distribution for the LANCE based
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cards from DIGITAL; this driver will not work with them.
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The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
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only makes all the card accesses through I/O transactions and no high
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(shared) memory is used. This mode provides a >48% performance penalty
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and is deprecated in this driver, although allowed to provide initial
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setup when hardstrapped.
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The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
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no point in using any mode other than the 2kB mode - their performances
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are virtually identical, although the driver has been tested in the 2kB
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and 32kB modes. I would suggest you uncomment the line:
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FORCE_2K_MODE;
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to allow the driver to configure the card as a 2kB card at your current
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base address, thus leaving more room to clutter your system box with
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other memory hungry boards.
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As many ISA and EISA cards can be supported under this driver as you
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wish, limited primarily by the available IRQ lines, rather than by the
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available I/O addresses (24 ISA, 16 EISA). I have checked different
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configurations of multiple depca cards and ewrk3 cards and have not
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found a problem yet (provided you have at least depca.c v0.38) ...
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The board IRQ setting must be at an unused IRQ which is auto-probed
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using Donald Becker's autoprobe routines. All these cards are at
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{5,10,11,15}.
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No 16MB memory limitation should exist with this driver as DMA is not
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used and the common memory area is in low memory on the network card (my
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current system has 20MB and I've not had problems yet).
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The ability to load this driver as a loadable module has been included
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and used extensively during the driver development (to save those long
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reboot sequences). To utilise this ability, you have to do 8 things:
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0) have a copy of the loadable modules code installed on your system.
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1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
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temporary directory.
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2) edit the source code near line 1898 to reflect the I/O address and
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IRQ you're using.
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3) compile ewrk3.c, but include -DMODULE in the command line to ensure
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that the correct bits are compiled (see end of source code).
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4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
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kernel with the ewrk3 configuration turned off and reboot.
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5) insmod ewrk3.o
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[Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
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6) run the net startup bits for your new eth?? interface manually
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(usually /etc/rc.inet[12] at boot time).
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7) enjoy!
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Note that autoprobing is not allowed in loadable modules - the system is
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already up and running and you're messing with interrupts.
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To unload a module, turn off the associated interface
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'ifconfig eth?? down' then 'rmmod ewrk3'.
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Promiscuous mode has been turned off in this driver, but all the
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multicast address bits have been turned on. This improved the send
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performance on a busy network by about 13%.
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Ioctl's have now been provided (primarily because I wanted to grab some
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packet size statistics). They are patterned after 'plipconfig.c' from a
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suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
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mode, add/delete multicast addresses, change the hardware address, get
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packet size distribution statistics and muck around with the control and
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status register. I'll add others if and when the need arises.
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TO DO:
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------
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Revision History
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----------------
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Version Date Description
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0.1 26-aug-94 Initial writing. ALPHA code release.
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0.11 31-aug-94 Fixed: 2k mode memory base calc.,
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LeMAC version calc.,
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IRQ vector assignments during autoprobe.
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0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
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Fixed up MCA hash table algorithm.
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0.20 4-sep-94 Added IOCTL functionality.
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0.21 14-sep-94 Added I/O mode.
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0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
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0.22 16-sep-94 Added more IOCTLs & tidied up.
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0.23 21-sep-94 Added transmit cut through.
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0.24 31-oct-94 Added uid checks in some ioctls.
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0.30 1-nov-94 BETA code release.
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0.31 5-dec-94 Added check/allocate region code.
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0.32 16-jan-95 Broadcast packet fix.
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0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
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0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
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Rewrite for portability & updated.
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ALPHA support from <jestabro@amt.tay1.dec.com>
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Added verify_area() calls in ewrk3_ioctl() from
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suggestion by <heiko@colossus.escape.de>.
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Add new multicasting code.
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0.41 20-Jan-96 Fix IRQ set up problem reported by
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<kenneth@bbs.sas.ntu.ac.sg>.
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0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
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0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
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=========================================================================
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*/
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static const char *version = "ewrk3.c:v0.43 96/8/16 davies@maniac.ultranet.com\n";
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/malloc.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <asm/bitops.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/segment.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/time.h>
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#include <linux/types.h>
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#include <linux/unistd.h>
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#include <linux/ctype.h>
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#include "ewrk3.h"
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#ifdef EWRK3_DEBUG
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static int ewrk3_debug = EWRK3_DEBUG;
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#else
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static int ewrk3_debug = 1;
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#endif
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#define EWRK3_NDA 0xffe0 /* No Device Address */
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#define PROBE_LENGTH 32
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#define ETH_PROM_SIG 0xAA5500FFUL
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#ifndef EWRK3_SIGNATURE
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#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
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#define EWRK3_STRLEN 8
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#endif
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#ifndef EWRK3_RAM_BASE_ADDRESSES
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#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
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#endif
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/*
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** Sets up the I/O area for the autoprobe.
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*/
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#define EWRK3_IO_BASE 0x100 /* Start address for probe search */
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#define EWRK3_IOP_INC 0x20 /* I/O address increment */
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#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
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#ifndef MAX_NUM_EWRK3S
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#define MAX_NUM_EWRK3S 21
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#endif
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#ifndef EWRK3_EISA_IO_PORTS
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#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
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#endif
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#ifndef MAX_EISA_SLOTS
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#define MAX_EISA_SLOTS 16
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#define EISA_SLOT_INC 0x1000
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#endif
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#define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
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#define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
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#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
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/*
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** EtherWORKS 3 shared memory window sizes
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*/
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#define IO_ONLY 0x00
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#define SHMEM_2K 0x800
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#define SHMEM_32K 0x8000
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#define SHMEM_64K 0x10000
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/*
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** EtherWORKS 3 IRQ ENABLE/DISABLE
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*/
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#define ENABLE_IRQs { \
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icr |= lp->irq_mask;\
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outb(icr, EWRK3_ICR); /* Enable the IRQs */\
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}
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#define DISABLE_IRQs { \
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icr = inb(EWRK3_ICR);\
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icr &= ~lp->irq_mask;\
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outb(icr, EWRK3_ICR); /* Disable the IRQs */\
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}
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/*
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** EtherWORKS 3 START/STOP
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*/
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#define START_EWRK3 { \
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csr = inb(EWRK3_CSR);\
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csr &= ~(CSR_TXD|CSR_RXD);\
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outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
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}
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#define STOP_EWRK3 { \
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csr = (CSR_TXD|CSR_RXD);\
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outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
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}
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/*
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** The EtherWORKS 3 private structure
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*/
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#define EWRK3_PKT_STAT_SZ 16
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#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
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increase EWRK3_PKT_STAT_SZ */
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struct ewrk3_private {
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char adapter_name[80]; /* Name exported to /proc/ioports */
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u_long shmem_base; /* Shared memory start address */
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u_long shmem_length; /* Shared memory window length */
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struct enet_statistics stats; /* Public stats */
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struct {
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u32 bins[EWRK3_PKT_STAT_SZ]; /* Private stats counters */
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u32 unicast;
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u32 multicast;
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u32 broadcast;
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u32 excessive_collisions;
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u32 tx_underruns;
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u32 excessive_underruns;
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} pktStats;
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u_char irq_mask; /* Adapter IRQ mask bits */
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u_char mPage; /* Maximum 2kB Page number */
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u_char lemac; /* Chip rev. level */
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u_char hard_strapped; /* Don't allow a full open */
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u_char lock; /* Lock the page register */
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u_char txc; /* Transmit cut through */
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u_char *mctbl; /* Pointer to the multicast table */
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};
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/*
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** Force the EtherWORKS 3 card to be in 2kB MODE
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*/
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#define FORCE_2K_MODE { \
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shmem_length = SHMEM_2K;\
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outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
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}
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/*
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** Public Functions
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*/
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static int ewrk3_open(struct device *dev);
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static int ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev);
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static void ewrk3_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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static int ewrk3_close(struct device *dev);
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static struct enet_statistics *ewrk3_get_stats(struct device *dev);
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static void set_multicast_list(struct device *dev);
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static int ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd);
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/*
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** Private functions
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*/
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static int ewrk3_hw_init(struct device *dev, u_long iobase);
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static void ewrk3_init(struct device *dev);
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static int ewrk3_rx(struct device *dev);
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static int ewrk3_tx(struct device *dev);
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static void EthwrkSignature(char * name, char *eeprom_image);
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static int DevicePresent(u_long iobase);
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static void SetMulticastFilter(struct device *dev);
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static int EISA_signature(char *name, s32 eisa_id);
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static int Read_EEPROM(u_long iobase, u_char eaddr);
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static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
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static u_char get_hw_addr (struct device *dev, u_char *eeprom_image, char chipType);
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static void isa_probe(struct device *dev, u_long iobase);
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static void eisa_probe(struct device *dev, u_long iobase);
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static struct device *alloc_device(struct device *dev, u_long iobase);
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static int ewrk3_dev_index(char *s);
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static struct device *insert_device(struct device *dev, u_long iobase, int (*init)(struct device *));
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#ifdef MODULE
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int init_module(void);
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void cleanup_module(void);
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static int autoprobed = 1, loading_module = 1;
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# else
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static u_char irq[] = {5,0,10,3,11,9,15,12};
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static int autoprobed = 0, loading_module = 0;
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#endif /* MODULE */
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static char name[EWRK3_STRLEN + 1];
|
334 |
|
|
static int num_ewrk3s = 0, num_eth = 0;
|
335 |
|
|
|
336 |
|
|
/*
|
337 |
|
|
** Miscellaneous defines...
|
338 |
|
|
*/
|
339 |
|
|
#define INIT_EWRK3 {\
|
340 |
|
|
outb(EEPROM_INIT, EWRK3_IOPR);\
|
341 |
|
|
udelay(1000);\
|
342 |
|
|
}
|
343 |
|
|
|
344 |
|
|
|
345 |
|
|
|
346 |
|
|
|
347 |
|
|
int ewrk3_probe(struct device *dev)
|
348 |
|
|
{
|
349 |
|
|
int tmp = num_ewrk3s, status = -ENODEV;
|
350 |
|
|
u_long iobase = dev->base_addr;
|
351 |
|
|
|
352 |
|
|
if ((iobase == 0) && loading_module){
|
353 |
|
|
printk("Autoprobing is not supported when loading a module based driver.\n");
|
354 |
|
|
status = -EIO;
|
355 |
|
|
} else { /* First probe for the Ethernet */
|
356 |
|
|
/* Address PROM pattern */
|
357 |
|
|
isa_probe(dev, iobase);
|
358 |
|
|
eisa_probe(dev, iobase);
|
359 |
|
|
|
360 |
|
|
if ((tmp == num_ewrk3s) && (iobase != 0) && loading_module) {
|
361 |
|
|
printk("%s: ewrk3_probe() cannot find device at 0x%04lx.\n", dev->name,
|
362 |
|
|
iobase);
|
363 |
|
|
}
|
364 |
|
|
|
365 |
|
|
/*
|
366 |
|
|
** Walk the device list to check that at least one device
|
367 |
|
|
** initialised OK
|
368 |
|
|
*/
|
369 |
|
|
for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
|
370 |
|
|
|
371 |
|
|
if (dev->priv) status = 0;
|
372 |
|
|
if (iobase == 0) autoprobed = 1;
|
373 |
|
|
}
|
374 |
|
|
|
375 |
|
|
return status;
|
376 |
|
|
}
|
377 |
|
|
|
378 |
|
|
static int
|
379 |
|
|
ewrk3_hw_init(struct device *dev, u_long iobase)
|
380 |
|
|
{
|
381 |
|
|
struct ewrk3_private *lp;
|
382 |
|
|
int i, status=0;
|
383 |
|
|
u_long mem_start, shmem_length;
|
384 |
|
|
u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
|
385 |
|
|
u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
|
386 |
|
|
|
387 |
|
|
/*
|
388 |
|
|
** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
|
389 |
|
|
** This also disables the EISA_ENABLE bit in the EISA Control Register.
|
390 |
|
|
*/
|
391 |
|
|
if (iobase > 0x400) eisa_cr = inb(EISA_CR);
|
392 |
|
|
INIT_EWRK3;
|
393 |
|
|
|
394 |
|
|
nicsr = inb(EWRK3_CSR);
|
395 |
|
|
|
396 |
|
|
icr = inb(EWRK3_ICR);
|
397 |
|
|
icr &= 0x70;
|
398 |
|
|
outb(icr, EWRK3_ICR); /* Disable all the IRQs */
|
399 |
|
|
|
400 |
|
|
if (nicsr == (CSR_TXD|CSR_RXD)) {
|
401 |
|
|
|
402 |
|
|
/* Check that the EEPROM is alive and well and not living on Pluto... */
|
403 |
|
|
for (chksum=0, i=0; i<EEPROM_MAX; i+=2) {
|
404 |
|
|
union {
|
405 |
|
|
short val;
|
406 |
|
|
char c[2];
|
407 |
|
|
} tmp;
|
408 |
|
|
|
409 |
|
|
tmp.val = (short)Read_EEPROM(iobase, (i>>1));
|
410 |
|
|
eeprom_image[i] = tmp.c[0];
|
411 |
|
|
eeprom_image[i+1] = tmp.c[1];
|
412 |
|
|
chksum += eeprom_image[i] + eeprom_image[i+1];
|
413 |
|
|
}
|
414 |
|
|
|
415 |
|
|
if (chksum != 0) { /* Bad EEPROM Data! */
|
416 |
|
|
printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
|
417 |
|
|
status = -ENXIO;
|
418 |
|
|
} else {
|
419 |
|
|
EthwrkSignature(name, eeprom_image);
|
420 |
|
|
if (*name != '\0') { /* found a EWRK3 device */
|
421 |
|
|
dev->base_addr = iobase;
|
422 |
|
|
|
423 |
|
|
if (iobase > 0x400) {
|
424 |
|
|
outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
|
425 |
|
|
}
|
426 |
|
|
|
427 |
|
|
lemac = eeprom_image[EEPROM_CHIPVER];
|
428 |
|
|
cmr = inb(EWRK3_CMR);
|
429 |
|
|
|
430 |
|
|
if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
|
431 |
|
|
((lemac == LeMAC2) && !(cmr & CMR_HS))) {
|
432 |
|
|
printk("%s: %s at %#4lx", dev->name, name, iobase);
|
433 |
|
|
hard_strapped = 1;
|
434 |
|
|
} else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) {
|
435 |
|
|
/* EISA slot address */
|
436 |
|
|
printk("%s: %s at %#4lx (EISA slot %ld)",
|
437 |
|
|
dev->name, name, iobase, ((iobase>>12)&0x0f));
|
438 |
|
|
} else { /* ISA port address */
|
439 |
|
|
printk("%s: %s at %#4lx", dev->name, name, iobase);
|
440 |
|
|
}
|
441 |
|
|
|
442 |
|
|
if (!status) {
|
443 |
|
|
printk(", h/w address ");
|
444 |
|
|
if (lemac!=LeMAC2) DevicePresent(iobase);/* need after EWRK3_INIT */
|
445 |
|
|
status = get_hw_addr(dev, eeprom_image, lemac);
|
446 |
|
|
for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
|
447 |
|
|
printk("%2.2x:", dev->dev_addr[i]);
|
448 |
|
|
}
|
449 |
|
|
printk("%2.2x,\n", dev->dev_addr[i]);
|
450 |
|
|
|
451 |
|
|
if (status) {
|
452 |
|
|
printk(" which has an EEPROM CRC error.\n");
|
453 |
|
|
status = -ENXIO;
|
454 |
|
|
} else {
|
455 |
|
|
if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
|
456 |
|
|
cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
|
457 |
|
|
if (eeprom_image[EEPROM_MISC0] & READ_AHEAD) cmr |= CMR_RA;
|
458 |
|
|
if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND) cmr |= CMR_WB;
|
459 |
|
|
if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL) cmr |= CMR_POLARITY;
|
460 |
|
|
if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK) cmr |= CMR_LINK;
|
461 |
|
|
if (eeprom_image[EEPROM_MISC0] & _0WS_ENA) cmr |= CMR_0WS;
|
462 |
|
|
}
|
463 |
|
|
if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM) cmr |= CMR_DRAM;
|
464 |
|
|
outb(cmr, EWRK3_CMR);
|
465 |
|
|
|
466 |
|
|
cr = inb(EWRK3_CR); /* Set up the Control Register */
|
467 |
|
|
cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
|
468 |
|
|
if (cr & SETUP_APD) cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
|
469 |
|
|
cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
|
470 |
|
|
cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
|
471 |
|
|
outb(cr, EWRK3_CR);
|
472 |
|
|
|
473 |
|
|
/*
|
474 |
|
|
** Determine the base address and window length for the EWRK3
|
475 |
|
|
** RAM from the memory base register.
|
476 |
|
|
*/
|
477 |
|
|
mem_start = inb(EWRK3_MBR);
|
478 |
|
|
shmem_length = 0;
|
479 |
|
|
if (mem_start != 0) {
|
480 |
|
|
if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
|
481 |
|
|
mem_start *= SHMEM_64K;
|
482 |
|
|
shmem_length = SHMEM_64K;
|
483 |
|
|
} else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
|
484 |
|
|
mem_start *= SHMEM_32K;
|
485 |
|
|
shmem_length = SHMEM_32K;
|
486 |
|
|
} else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
|
487 |
|
|
mem_start = mem_start * SHMEM_2K + 0x80000;
|
488 |
|
|
shmem_length = SHMEM_2K;
|
489 |
|
|
} else {
|
490 |
|
|
status = -ENXIO;
|
491 |
|
|
}
|
492 |
|
|
}
|
493 |
|
|
|
494 |
|
|
/*
|
495 |
|
|
** See the top of this source code for comments about
|
496 |
|
|
** uncommenting this line.
|
497 |
|
|
*/
|
498 |
|
|
/* FORCE_2K_MODE;*/
|
499 |
|
|
|
500 |
|
|
if (!status) {
|
501 |
|
|
if (hard_strapped) {
|
502 |
|
|
printk(" is hard strapped.\n");
|
503 |
|
|
} else if (mem_start) {
|
504 |
|
|
printk(" has a %dk RAM window", (int)(shmem_length >> 10));
|
505 |
|
|
printk(" at 0x%.5lx", mem_start);
|
506 |
|
|
} else {
|
507 |
|
|
printk(" is in I/O only mode");
|
508 |
|
|
}
|
509 |
|
|
|
510 |
|
|
/* private area & initialise */
|
511 |
|
|
dev->priv = (void *) kmalloc(sizeof(struct ewrk3_private),
|
512 |
|
|
GFP_KERNEL);
|
513 |
|
|
if (dev->priv == NULL) {
|
514 |
|
|
return -ENOMEM;
|
515 |
|
|
}
|
516 |
|
|
lp = (struct ewrk3_private *)dev->priv;
|
517 |
|
|
memset(dev->priv, 0, sizeof(struct ewrk3_private));
|
518 |
|
|
lp->shmem_base = mem_start;
|
519 |
|
|
lp->shmem_length = shmem_length;
|
520 |
|
|
lp->lemac = lemac;
|
521 |
|
|
lp->hard_strapped = hard_strapped;
|
522 |
|
|
|
523 |
|
|
lp->mPage = 64;
|
524 |
|
|
if (cmr & CMR_DRAM) lp->mPage <<= 1 ;/* 2 DRAMS on module */
|
525 |
|
|
|
526 |
|
|
sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
|
527 |
|
|
request_region(iobase, EWRK3_TOTAL_SIZE, lp->adapter_name);
|
528 |
|
|
|
529 |
|
|
lp->irq_mask = ICR_TNEM|ICR_TXDM|ICR_RNEM|ICR_RXDM;
|
530 |
|
|
|
531 |
|
|
if (!hard_strapped) {
|
532 |
|
|
/*
|
533 |
|
|
** Enable EWRK3 board interrupts for autoprobing
|
534 |
|
|
*/
|
535 |
|
|
icr |= ICR_IE; /* Enable interrupts */
|
536 |
|
|
outb(icr, EWRK3_ICR);
|
537 |
|
|
|
538 |
|
|
/* The DMA channel may be passed in on this parameter. */
|
539 |
|
|
dev->dma = 0;
|
540 |
|
|
|
541 |
|
|
/* To auto-IRQ we enable the initialization-done and DMA err,
|
542 |
|
|
interrupts. For now we will always get a DMA error. */
|
543 |
|
|
if (dev->irq < 2) {
|
544 |
|
|
#ifndef MODULE
|
545 |
|
|
u_char irqnum;
|
546 |
|
|
|
547 |
|
|
autoirq_setup(0);
|
548 |
|
|
|
549 |
|
|
/*
|
550 |
|
|
** Trigger a TNE interrupt.
|
551 |
|
|
*/
|
552 |
|
|
icr |=ICR_TNEM;
|
553 |
|
|
outb(1,EWRK3_TDQ); /* Write to the TX done queue */
|
554 |
|
|
outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
|
555 |
|
|
|
556 |
|
|
irqnum = irq[((icr & IRQ_SEL) >> 4)];
|
557 |
|
|
|
558 |
|
|
dev->irq = autoirq_report(1);
|
559 |
|
|
if ((dev->irq) && (irqnum == dev->irq)) {
|
560 |
|
|
printk(" and uses IRQ%d.\n", dev->irq);
|
561 |
|
|
} else {
|
562 |
|
|
if (!dev->irq) {
|
563 |
|
|
printk(" and failed to detect IRQ line.\n");
|
564 |
|
|
} else if ((irqnum == 1) && (lemac == LeMAC2)) {
|
565 |
|
|
printk(" and an illegal IRQ line detected.\n");
|
566 |
|
|
} else {
|
567 |
|
|
printk(", but incorrect IRQ line detected.\n");
|
568 |
|
|
}
|
569 |
|
|
status = -ENXIO;
|
570 |
|
|
}
|
571 |
|
|
|
572 |
|
|
DISABLE_IRQs; /* Mask all interrupts */
|
573 |
|
|
|
574 |
|
|
#endif /* MODULE */
|
575 |
|
|
} else {
|
576 |
|
|
printk(" and requires IRQ%d.\n", dev->irq);
|
577 |
|
|
}
|
578 |
|
|
}
|
579 |
|
|
if (status) release_region(iobase, EWRK3_TOTAL_SIZE);
|
580 |
|
|
} else {
|
581 |
|
|
status = -ENXIO;
|
582 |
|
|
}
|
583 |
|
|
}
|
584 |
|
|
}
|
585 |
|
|
} else {
|
586 |
|
|
status = -ENXIO;
|
587 |
|
|
}
|
588 |
|
|
}
|
589 |
|
|
|
590 |
|
|
if (!status) {
|
591 |
|
|
if (ewrk3_debug > 1) {
|
592 |
|
|
printk(version);
|
593 |
|
|
}
|
594 |
|
|
|
595 |
|
|
/* The EWRK3-specific entries in the device structure. */
|
596 |
|
|
dev->open = &ewrk3_open;
|
597 |
|
|
dev->hard_start_xmit = &ewrk3_queue_pkt;
|
598 |
|
|
dev->stop = &ewrk3_close;
|
599 |
|
|
dev->get_stats = &ewrk3_get_stats;
|
600 |
|
|
dev->set_multicast_list = &set_multicast_list;
|
601 |
|
|
dev->do_ioctl = &ewrk3_ioctl;
|
602 |
|
|
|
603 |
|
|
dev->mem_start = 0;
|
604 |
|
|
|
605 |
|
|
/* Fill in the generic field of the device structure. */
|
606 |
|
|
ether_setup(dev);
|
607 |
|
|
}
|
608 |
|
|
} else {
|
609 |
|
|
status = -ENXIO;
|
610 |
|
|
}
|
611 |
|
|
|
612 |
|
|
return status;
|
613 |
|
|
}
|
614 |
|
|
|
615 |
|
|
|
616 |
|
|
static int
|
617 |
|
|
ewrk3_open(struct device *dev)
|
618 |
|
|
{
|
619 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
620 |
|
|
u_long iobase = dev->base_addr;
|
621 |
|
|
int i, status = 0;
|
622 |
|
|
u_char icr, csr;
|
623 |
|
|
|
624 |
|
|
/*
|
625 |
|
|
** Stop the TX and RX...
|
626 |
|
|
*/
|
627 |
|
|
STOP_EWRK3;
|
628 |
|
|
|
629 |
|
|
if (!lp->hard_strapped) {
|
630 |
|
|
irq2dev_map[dev->irq] = dev; /* For latched interrupts */
|
631 |
|
|
|
632 |
|
|
if (request_irq(dev->irq, (void *)ewrk3_interrupt, 0, "ewrk3", NULL)) {
|
633 |
|
|
printk("ewrk3_open(): Requested IRQ%d is busy\n",dev->irq);
|
634 |
|
|
status = -EAGAIN;
|
635 |
|
|
} else {
|
636 |
|
|
|
637 |
|
|
/*
|
638 |
|
|
** Re-initialize the EWRK3...
|
639 |
|
|
*/
|
640 |
|
|
ewrk3_init(dev);
|
641 |
|
|
|
642 |
|
|
if (ewrk3_debug > 1){
|
643 |
|
|
printk("%s: ewrk3 open with irq %d\n",dev->name,dev->irq);
|
644 |
|
|
printk(" physical address: ");
|
645 |
|
|
for (i=0;i<5;i++){
|
646 |
|
|
printk("%2.2x:",(u_char)dev->dev_addr[i]);
|
647 |
|
|
}
|
648 |
|
|
printk("%2.2x\n",(u_char)dev->dev_addr[i]);
|
649 |
|
|
if (lp->shmem_length == 0) {
|
650 |
|
|
printk(" no shared memory, I/O only mode\n");
|
651 |
|
|
} else {
|
652 |
|
|
printk(" start of shared memory: 0x%08lx\n",lp->shmem_base);
|
653 |
|
|
printk(" window length: 0x%04lx\n",lp->shmem_length);
|
654 |
|
|
}
|
655 |
|
|
printk(" # of DRAMS: %d\n",((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
|
656 |
|
|
printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
|
657 |
|
|
printk(" cr: 0x%02x\n", inb(EWRK3_CR));
|
658 |
|
|
printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
|
659 |
|
|
printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
|
660 |
|
|
printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
|
661 |
|
|
}
|
662 |
|
|
|
663 |
|
|
dev->tbusy = 0;
|
664 |
|
|
dev->start = 1;
|
665 |
|
|
dev->interrupt = UNMASK_INTERRUPTS;
|
666 |
|
|
|
667 |
|
|
/*
|
668 |
|
|
** Unmask EWRK3 board interrupts
|
669 |
|
|
*/
|
670 |
|
|
icr = inb(EWRK3_ICR);
|
671 |
|
|
ENABLE_IRQs;
|
672 |
|
|
|
673 |
|
|
}
|
674 |
|
|
} else {
|
675 |
|
|
dev->start = 0;
|
676 |
|
|
dev->tbusy = 1;
|
677 |
|
|
printk("%s: ewrk3 available for hard strapped set up only.\n", dev->name);
|
678 |
|
|
printk(" Run the 'ewrk3setup' utility or remove the hard straps.\n");
|
679 |
|
|
}
|
680 |
|
|
|
681 |
|
|
MOD_INC_USE_COUNT;
|
682 |
|
|
|
683 |
|
|
return status;
|
684 |
|
|
}
|
685 |
|
|
|
686 |
|
|
/*
|
687 |
|
|
** Initialize the EtherWORKS 3 operating conditions
|
688 |
|
|
*/
|
689 |
|
|
static void
|
690 |
|
|
ewrk3_init(struct device *dev)
|
691 |
|
|
{
|
692 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
693 |
|
|
u_char csr, page;
|
694 |
|
|
u_long iobase = dev->base_addr;
|
695 |
|
|
|
696 |
|
|
/*
|
697 |
|
|
** Enable any multicasts
|
698 |
|
|
*/
|
699 |
|
|
set_multicast_list(dev);
|
700 |
|
|
|
701 |
|
|
/*
|
702 |
|
|
** Clean out any remaining entries in all the queues here
|
703 |
|
|
*/
|
704 |
|
|
while (inb(EWRK3_TQ));
|
705 |
|
|
while (inb(EWRK3_TDQ));
|
706 |
|
|
while (inb(EWRK3_RQ));
|
707 |
|
|
while (inb(EWRK3_FMQ));
|
708 |
|
|
|
709 |
|
|
/*
|
710 |
|
|
** Write a clean free memory queue
|
711 |
|
|
*/
|
712 |
|
|
for (page=1;page<lp->mPage;page++) { /* Write the free page numbers */
|
713 |
|
|
outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
|
714 |
|
|
}
|
715 |
|
|
|
716 |
|
|
lp->lock = 0; /* Ensure there are no locks */
|
717 |
|
|
|
718 |
|
|
START_EWRK3; /* Enable the TX and/or RX */
|
719 |
|
|
}
|
720 |
|
|
|
721 |
|
|
/*
|
722 |
|
|
** Writes a socket buffer to the free page queue
|
723 |
|
|
*/
|
724 |
|
|
static int
|
725 |
|
|
ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev)
|
726 |
|
|
{
|
727 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
728 |
|
|
u_long iobase = dev->base_addr;
|
729 |
|
|
int status = 0;
|
730 |
|
|
u_char icr, csr;
|
731 |
|
|
|
732 |
|
|
/* Transmitter timeout, serious problems. */
|
733 |
|
|
if (dev->tbusy || lp->lock) {
|
734 |
|
|
int tickssofar = jiffies - dev->trans_start;
|
735 |
|
|
if (tickssofar < QUEUE_PKT_TIMEOUT) {
|
736 |
|
|
status = -1;
|
737 |
|
|
} else if (!lp->hard_strapped) {
|
738 |
|
|
printk("%s: transmit timed/locked out, status %04x, resetting.\n",
|
739 |
|
|
dev->name, inb(EWRK3_CSR));
|
740 |
|
|
|
741 |
|
|
/*
|
742 |
|
|
** Mask all board interrupts
|
743 |
|
|
*/
|
744 |
|
|
DISABLE_IRQs;
|
745 |
|
|
|
746 |
|
|
/*
|
747 |
|
|
** Stop the TX and RX...
|
748 |
|
|
*/
|
749 |
|
|
STOP_EWRK3;
|
750 |
|
|
|
751 |
|
|
ewrk3_init(dev);
|
752 |
|
|
|
753 |
|
|
/*
|
754 |
|
|
** Unmask EWRK3 board interrupts
|
755 |
|
|
*/
|
756 |
|
|
ENABLE_IRQs;
|
757 |
|
|
|
758 |
|
|
dev->tbusy=0;
|
759 |
|
|
dev->trans_start = jiffies;
|
760 |
|
|
dev_kfree_skb(skb, FREE_WRITE);
|
761 |
|
|
}
|
762 |
|
|
} else if (skb == NULL) {
|
763 |
|
|
dev_tint(dev);
|
764 |
|
|
} else if (skb->len > 0) {
|
765 |
|
|
|
766 |
|
|
/*
|
767 |
|
|
** Block a timer-based transmit from overlapping. This could better be
|
768 |
|
|
** done with atomic_swap(1, dev->tbusy), but set_bit() works as well.
|
769 |
|
|
*/
|
770 |
|
|
if (set_bit(0, (void*)&dev->tbusy) != 0)
|
771 |
|
|
printk("%s: Transmitter access conflict.\n", dev->name);
|
772 |
|
|
|
773 |
|
|
DISABLE_IRQs; /* So that the page # remains correct */
|
774 |
|
|
|
775 |
|
|
/*
|
776 |
|
|
** Get a free page from the FMQ when resources are available
|
777 |
|
|
*/
|
778 |
|
|
if (inb(EWRK3_FMQC) > 0) {
|
779 |
|
|
u_long buf = 0;
|
780 |
|
|
u_char page;
|
781 |
|
|
|
782 |
|
|
if ((page = inb(EWRK3_FMQ)) < lp->mPage) {
|
783 |
|
|
/*
|
784 |
|
|
** Set up shared memory window and pointer into the window
|
785 |
|
|
*/
|
786 |
|
|
while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
|
787 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
788 |
|
|
outb(page, EWRK3_IOPR);
|
789 |
|
|
} else if (lp->shmem_length == SHMEM_2K) {
|
790 |
|
|
buf = lp->shmem_base;
|
791 |
|
|
outb(page, EWRK3_MPR);
|
792 |
|
|
} else if (lp->shmem_length == SHMEM_32K) {
|
793 |
|
|
buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
|
794 |
|
|
outb((page >> 4), EWRK3_MPR);
|
795 |
|
|
} else if (lp->shmem_length == SHMEM_64K) {
|
796 |
|
|
buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
|
797 |
|
|
outb((page >> 5), EWRK3_MPR);
|
798 |
|
|
} else {
|
799 |
|
|
status = -1;
|
800 |
|
|
printk("%s: Oops - your private data area is hosed!\n",dev->name);
|
801 |
|
|
}
|
802 |
|
|
|
803 |
|
|
if (!status) {
|
804 |
|
|
|
805 |
|
|
/*
|
806 |
|
|
** Set up the buffer control structures and copy the data from
|
807 |
|
|
** the socket buffer to the shared memory .
|
808 |
|
|
*/
|
809 |
|
|
|
810 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
811 |
|
|
int i;
|
812 |
|
|
u_char *p = skb->data;
|
813 |
|
|
|
814 |
|
|
outb((char)(TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
|
815 |
|
|
outb((char)(skb->len & 0xff), EWRK3_DATA);
|
816 |
|
|
outb((char)((skb->len >> 8) & 0xff), EWRK3_DATA);
|
817 |
|
|
outb((char)0x04, EWRK3_DATA);
|
818 |
|
|
for (i=0; i<skb->len; i++) {
|
819 |
|
|
outb(*p++, EWRK3_DATA);
|
820 |
|
|
}
|
821 |
|
|
outb(page, EWRK3_TQ); /* Start sending pkt */
|
822 |
|
|
} else {
|
823 |
|
|
writeb((char)(TCR_QMODE|TCR_PAD|TCR_IFC), (char *)buf);/* ctrl byte*/
|
824 |
|
|
buf+=1;
|
825 |
|
|
writeb((char)(skb->len & 0xff), (char *)buf);/* length (16 bit xfer)*/
|
826 |
|
|
buf+=1;
|
827 |
|
|
if (lp->txc) {
|
828 |
|
|
writeb((char)(((skb->len >> 8) & 0xff) | XCT), (char *)buf);
|
829 |
|
|
buf+=1;
|
830 |
|
|
writeb(0x04, (char *)buf); /* index byte */
|
831 |
|
|
buf+=1;
|
832 |
|
|
writeb(0x00, (char *)(buf + skb->len)); /* Write the XCT flag */
|
833 |
|
|
memcpy_toio(buf, skb->data, PRELOAD);/* Write PRELOAD bytes*/
|
834 |
|
|
outb(page, EWRK3_TQ); /* Start sending pkt */
|
835 |
|
|
memcpy_toio(buf+PRELOAD, skb->data+PRELOAD, skb->len-PRELOAD);
|
836 |
|
|
writeb(0xff, (char *)(buf + skb->len)); /* Write the XCT flag */
|
837 |
|
|
} else {
|
838 |
|
|
writeb((char)((skb->len >> 8) & 0xff), (char *)buf);
|
839 |
|
|
buf+=1;
|
840 |
|
|
writeb(0x04, (char *)buf); /* index byte */
|
841 |
|
|
buf+=1;
|
842 |
|
|
memcpy_toio((char *)buf, skb->data, skb->len);/* Write data bytes */
|
843 |
|
|
outb(page, EWRK3_TQ); /* Start sending pkt */
|
844 |
|
|
}
|
845 |
|
|
}
|
846 |
|
|
|
847 |
|
|
dev->trans_start = jiffies;
|
848 |
|
|
dev_kfree_skb (skb, FREE_WRITE);
|
849 |
|
|
|
850 |
|
|
} else { /* return unused page to the free memory queue */
|
851 |
|
|
outb(page, EWRK3_FMQ);
|
852 |
|
|
}
|
853 |
|
|
lp->lock = 0; /* unlock the page register */
|
854 |
|
|
} else {
|
855 |
|
|
printk("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
|
856 |
|
|
(u_char) page);
|
857 |
|
|
}
|
858 |
|
|
} else {
|
859 |
|
|
printk("ewrk3_queue_pkt(): No free resources...\n");
|
860 |
|
|
printk("ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
|
861 |
|
|
}
|
862 |
|
|
|
863 |
|
|
/* Check for free resources: clear 'tbusy' if there are some */
|
864 |
|
|
if (inb(EWRK3_FMQC) > 0) {
|
865 |
|
|
dev->tbusy = 0;
|
866 |
|
|
}
|
867 |
|
|
|
868 |
|
|
ENABLE_IRQs;
|
869 |
|
|
}
|
870 |
|
|
|
871 |
|
|
return status;
|
872 |
|
|
}
|
873 |
|
|
|
874 |
|
|
/*
|
875 |
|
|
** The EWRK3 interrupt handler.
|
876 |
|
|
*/
|
877 |
|
|
static void
|
878 |
|
|
ewrk3_interrupt(int irq, void *dev_id, struct pt_regs * regs)
|
879 |
|
|
{
|
880 |
|
|
struct device *dev = (struct device *)(irq2dev_map[irq]);
|
881 |
|
|
struct ewrk3_private *lp;
|
882 |
|
|
u_long iobase;
|
883 |
|
|
u_char icr, cr, csr;
|
884 |
|
|
|
885 |
|
|
if (dev == NULL) {
|
886 |
|
|
printk ("ewrk3_interrupt(): irq %d for unknown device.\n", irq);
|
887 |
|
|
} else {
|
888 |
|
|
lp = (struct ewrk3_private *)dev->priv;
|
889 |
|
|
iobase = dev->base_addr;
|
890 |
|
|
|
891 |
|
|
if (dev->interrupt)
|
892 |
|
|
printk("%s: Re-entering the interrupt handler.\n", dev->name);
|
893 |
|
|
|
894 |
|
|
dev->interrupt = MASK_INTERRUPTS;
|
895 |
|
|
|
896 |
|
|
/* get the interrupt information */
|
897 |
|
|
csr = inb(EWRK3_CSR);
|
898 |
|
|
|
899 |
|
|
/*
|
900 |
|
|
** Mask the EWRK3 board interrupts and turn on the LED
|
901 |
|
|
*/
|
902 |
|
|
DISABLE_IRQs;
|
903 |
|
|
|
904 |
|
|
cr = inb(EWRK3_CR);
|
905 |
|
|
cr |= CR_LED;
|
906 |
|
|
outb(cr, EWRK3_CR);
|
907 |
|
|
|
908 |
|
|
if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
|
909 |
|
|
ewrk3_rx(dev);
|
910 |
|
|
|
911 |
|
|
if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
|
912 |
|
|
ewrk3_tx(dev);
|
913 |
|
|
|
914 |
|
|
/*
|
915 |
|
|
** Now deal with the TX/RX disable flags. These are set when there
|
916 |
|
|
** are no more resources. If resources free up then enable these
|
917 |
|
|
** interrupts, otherwise mask them - failure to do this will result
|
918 |
|
|
** in the system hanging in an interrupt loop.
|
919 |
|
|
*/
|
920 |
|
|
if (inb(EWRK3_FMQC)) { /* any resources available? */
|
921 |
|
|
lp->irq_mask |= ICR_TXDM|ICR_RXDM;/* enable the interrupt source */
|
922 |
|
|
csr &= ~(CSR_TXD|CSR_RXD);/* ensure restart of a stalled TX or RX */
|
923 |
|
|
outb(csr, EWRK3_CSR);
|
924 |
|
|
dev->tbusy = 0; /* clear TX busy flag */
|
925 |
|
|
mark_bh(NET_BH);
|
926 |
|
|
} else {
|
927 |
|
|
lp->irq_mask &= ~(ICR_TXDM|ICR_RXDM);/* disable the interrupt source */
|
928 |
|
|
}
|
929 |
|
|
|
930 |
|
|
/* Unmask the EWRK3 board interrupts and turn off the LED */
|
931 |
|
|
cr &= ~CR_LED;
|
932 |
|
|
outb(cr, EWRK3_CR);
|
933 |
|
|
|
934 |
|
|
dev->interrupt = UNMASK_INTERRUPTS;
|
935 |
|
|
ENABLE_IRQs;
|
936 |
|
|
}
|
937 |
|
|
|
938 |
|
|
return;
|
939 |
|
|
}
|
940 |
|
|
|
941 |
|
|
static int
|
942 |
|
|
ewrk3_rx(struct device *dev)
|
943 |
|
|
{
|
944 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
945 |
|
|
u_long iobase = dev->base_addr;
|
946 |
|
|
int i, status = 0;
|
947 |
|
|
u_char page, tmpPage = 0, tmpLock = 0;
|
948 |
|
|
u_long buf = 0;
|
949 |
|
|
|
950 |
|
|
while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
|
951 |
|
|
if ((page = inb(EWRK3_RQ)) < lp->mPage) {/* Get next entry's buffer page */
|
952 |
|
|
/*
|
953 |
|
|
** Preempt any process using the current page register. Check for
|
954 |
|
|
** an existing lock to reduce time taken in I/O transactions.
|
955 |
|
|
*/
|
956 |
|
|
if ((tmpLock = set_bit(0, (void *)&lp->lock)) == 1) { /* Assert lock */
|
957 |
|
|
if (lp->shmem_length == IO_ONLY) { /* Get existing page */
|
958 |
|
|
tmpPage = inb(EWRK3_IOPR);
|
959 |
|
|
} else {
|
960 |
|
|
tmpPage = inb(EWRK3_MPR);
|
961 |
|
|
}
|
962 |
|
|
}
|
963 |
|
|
|
964 |
|
|
/*
|
965 |
|
|
** Set up shared memory window and pointer into the window
|
966 |
|
|
*/
|
967 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
968 |
|
|
outb(page, EWRK3_IOPR);
|
969 |
|
|
} else if (lp->shmem_length == SHMEM_2K) {
|
970 |
|
|
buf = lp->shmem_base;
|
971 |
|
|
outb(page, EWRK3_MPR);
|
972 |
|
|
} else if (lp->shmem_length == SHMEM_32K) {
|
973 |
|
|
buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
|
974 |
|
|
outb((page >> 4), EWRK3_MPR);
|
975 |
|
|
} else if (lp->shmem_length == SHMEM_64K) {
|
976 |
|
|
buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
|
977 |
|
|
outb((page >> 5), EWRK3_MPR);
|
978 |
|
|
} else {
|
979 |
|
|
status = -1;
|
980 |
|
|
printk("%s: Oops - your private data area is hosed!\n",dev->name);
|
981 |
|
|
}
|
982 |
|
|
|
983 |
|
|
if (!status) {
|
984 |
|
|
char rx_status;
|
985 |
|
|
int pkt_len;
|
986 |
|
|
|
987 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
988 |
|
|
rx_status = inb(EWRK3_DATA);
|
989 |
|
|
pkt_len = inb(EWRK3_DATA);
|
990 |
|
|
pkt_len |= ((u_short)inb(EWRK3_DATA) << 8);
|
991 |
|
|
} else {
|
992 |
|
|
rx_status = readb(buf);
|
993 |
|
|
buf+=1;
|
994 |
|
|
pkt_len = readw(buf);
|
995 |
|
|
buf+=3;
|
996 |
|
|
}
|
997 |
|
|
|
998 |
|
|
if (!(rx_status & R_ROK)) { /* There was an error. */
|
999 |
|
|
lp->stats.rx_errors++; /* Update the error stats. */
|
1000 |
|
|
if (rx_status & R_DBE) lp->stats.rx_frame_errors++;
|
1001 |
|
|
if (rx_status & R_CRC) lp->stats.rx_crc_errors++;
|
1002 |
|
|
if (rx_status & R_PLL) lp->stats.rx_fifo_errors++;
|
1003 |
|
|
} else {
|
1004 |
|
|
struct sk_buff *skb;
|
1005 |
|
|
|
1006 |
|
|
if ((skb = dev_alloc_skb(pkt_len+2)) != NULL) {
|
1007 |
|
|
unsigned char *p;
|
1008 |
|
|
skb->dev = dev;
|
1009 |
|
|
skb_reserve(skb,2); /* Align to 16 bytes */
|
1010 |
|
|
p = skb_put(skb,pkt_len);
|
1011 |
|
|
|
1012 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1013 |
|
|
*p = inb(EWRK3_DATA); /* dummy read */
|
1014 |
|
|
for (i=0; i<pkt_len; i++) {
|
1015 |
|
|
*p++ = inb(EWRK3_DATA);
|
1016 |
|
|
}
|
1017 |
|
|
} else {
|
1018 |
|
|
memcpy_fromio(p, buf, pkt_len);
|
1019 |
|
|
}
|
1020 |
|
|
|
1021 |
|
|
/*
|
1022 |
|
|
** Notify the upper protocol layers that there is another
|
1023 |
|
|
** packet to handle
|
1024 |
|
|
*/
|
1025 |
|
|
skb->protocol=eth_type_trans(skb,dev);
|
1026 |
|
|
netif_rx(skb);
|
1027 |
|
|
|
1028 |
|
|
/*
|
1029 |
|
|
** Update stats
|
1030 |
|
|
*/
|
1031 |
|
|
lp->stats.rx_packets++;
|
1032 |
|
|
for (i=1; i<EWRK3_PKT_STAT_SZ-1; i++) {
|
1033 |
|
|
if (pkt_len < i*EWRK3_PKT_BIN_SZ) {
|
1034 |
|
|
lp->pktStats.bins[i]++;
|
1035 |
|
|
i = EWRK3_PKT_STAT_SZ;
|
1036 |
|
|
}
|
1037 |
|
|
}
|
1038 |
|
|
p = skb->data; /* Look at the dest addr */
|
1039 |
|
|
if (p[0] & 0x01) { /* Multicast/Broadcast */
|
1040 |
|
|
if ((*(s32 *)&p[0] == -1) && (*(s16 *)&p[4] == -1)) {
|
1041 |
|
|
lp->pktStats.broadcast++;
|
1042 |
|
|
} else {
|
1043 |
|
|
lp->pktStats.multicast++;
|
1044 |
|
|
}
|
1045 |
|
|
} else if ((*(s32 *)&p[0] == *(s32 *)&dev->dev_addr[0]) &&
|
1046 |
|
|
(*(s16 *)&p[4] == *(s16 *)&dev->dev_addr[4])) {
|
1047 |
|
|
lp->pktStats.unicast++;
|
1048 |
|
|
}
|
1049 |
|
|
|
1050 |
|
|
lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
|
1051 |
|
|
if (lp->pktStats.bins[0] == 0) { /* Reset counters */
|
1052 |
|
|
memset(&lp->pktStats, 0, sizeof(lp->pktStats));
|
1053 |
|
|
}
|
1054 |
|
|
} else {
|
1055 |
|
|
printk("%s: Insufficient memory; nuking packet.\n", dev->name);
|
1056 |
|
|
lp->stats.rx_dropped++; /* Really, deferred. */
|
1057 |
|
|
break;
|
1058 |
|
|
}
|
1059 |
|
|
}
|
1060 |
|
|
}
|
1061 |
|
|
/*
|
1062 |
|
|
** Return the received buffer to the free memory queue
|
1063 |
|
|
*/
|
1064 |
|
|
outb(page, EWRK3_FMQ);
|
1065 |
|
|
|
1066 |
|
|
if (tmpLock) { /* If a lock was preempted */
|
1067 |
|
|
if (lp->shmem_length == IO_ONLY) { /* Replace old page */
|
1068 |
|
|
outb(tmpPage, EWRK3_IOPR);
|
1069 |
|
|
} else {
|
1070 |
|
|
outb(tmpPage, EWRK3_MPR);
|
1071 |
|
|
}
|
1072 |
|
|
}
|
1073 |
|
|
lp->lock = 0; /* Unlock the page register */
|
1074 |
|
|
} else {
|
1075 |
|
|
printk("ewrk3_rx(): Illegal page number, page %d\n",page);
|
1076 |
|
|
printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
|
1077 |
|
|
}
|
1078 |
|
|
}
|
1079 |
|
|
return status;
|
1080 |
|
|
}
|
1081 |
|
|
|
1082 |
|
|
/*
|
1083 |
|
|
** Buffer sent - check for TX buffer errors.
|
1084 |
|
|
*/
|
1085 |
|
|
static int
|
1086 |
|
|
ewrk3_tx(struct device *dev)
|
1087 |
|
|
{
|
1088 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1089 |
|
|
u_long iobase = dev->base_addr;
|
1090 |
|
|
u_char tx_status;
|
1091 |
|
|
|
1092 |
|
|
while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
|
1093 |
|
|
if (tx_status & T_VSTS) { /* The status is valid */
|
1094 |
|
|
if (tx_status & T_TXE) {
|
1095 |
|
|
lp->stats.tx_errors++;
|
1096 |
|
|
if (tx_status & T_NCL) lp->stats.tx_carrier_errors++;
|
1097 |
|
|
if (tx_status & T_LCL) lp->stats.tx_window_errors++;
|
1098 |
|
|
if (tx_status & T_CTU) {
|
1099 |
|
|
if ((tx_status & T_COLL) ^ T_XUR) {
|
1100 |
|
|
lp->pktStats.tx_underruns++;
|
1101 |
|
|
} else {
|
1102 |
|
|
lp->pktStats.excessive_underruns++;
|
1103 |
|
|
}
|
1104 |
|
|
} else if (tx_status & T_COLL) {
|
1105 |
|
|
if ((tx_status & T_COLL) ^ T_XCOLL) {
|
1106 |
|
|
lp->stats.collisions++;
|
1107 |
|
|
} else {
|
1108 |
|
|
lp->pktStats.excessive_collisions++;
|
1109 |
|
|
}
|
1110 |
|
|
}
|
1111 |
|
|
} else {
|
1112 |
|
|
lp->stats.tx_packets++;
|
1113 |
|
|
}
|
1114 |
|
|
}
|
1115 |
|
|
}
|
1116 |
|
|
|
1117 |
|
|
return 0;
|
1118 |
|
|
}
|
1119 |
|
|
|
1120 |
|
|
static int
|
1121 |
|
|
ewrk3_close(struct device *dev)
|
1122 |
|
|
{
|
1123 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1124 |
|
|
u_long iobase = dev->base_addr;
|
1125 |
|
|
u_char icr, csr;
|
1126 |
|
|
|
1127 |
|
|
dev->start = 0;
|
1128 |
|
|
dev->tbusy = 1;
|
1129 |
|
|
|
1130 |
|
|
if (ewrk3_debug > 1) {
|
1131 |
|
|
printk("%s: Shutting down ethercard, status was %2.2x.\n",
|
1132 |
|
|
dev->name, inb(EWRK3_CSR));
|
1133 |
|
|
}
|
1134 |
|
|
|
1135 |
|
|
/*
|
1136 |
|
|
** We stop the EWRK3 here... mask interrupts and stop TX & RX
|
1137 |
|
|
*/
|
1138 |
|
|
DISABLE_IRQs;
|
1139 |
|
|
|
1140 |
|
|
STOP_EWRK3;
|
1141 |
|
|
|
1142 |
|
|
/*
|
1143 |
|
|
** Clean out the TX and RX queues here (note that one entry
|
1144 |
|
|
** may get added to either the TXD or RX queues if the TX or RX
|
1145 |
|
|
** just starts processing a packet before the STOP_EWRK3 command
|
1146 |
|
|
** is received. This will be flushed in the ewrk3_open() call).
|
1147 |
|
|
*/
|
1148 |
|
|
while (inb(EWRK3_TQ));
|
1149 |
|
|
while (inb(EWRK3_TDQ));
|
1150 |
|
|
while (inb(EWRK3_RQ));
|
1151 |
|
|
|
1152 |
|
|
if (!lp->hard_strapped) {
|
1153 |
|
|
free_irq(dev->irq, NULL);
|
1154 |
|
|
|
1155 |
|
|
irq2dev_map[dev->irq] = 0;
|
1156 |
|
|
}
|
1157 |
|
|
|
1158 |
|
|
MOD_DEC_USE_COUNT;
|
1159 |
|
|
|
1160 |
|
|
return 0;
|
1161 |
|
|
}
|
1162 |
|
|
|
1163 |
|
|
static struct enet_statistics *
|
1164 |
|
|
ewrk3_get_stats(struct device *dev)
|
1165 |
|
|
{
|
1166 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1167 |
|
|
|
1168 |
|
|
/* Null body since there is no framing error counter */
|
1169 |
|
|
|
1170 |
|
|
return &lp->stats;
|
1171 |
|
|
}
|
1172 |
|
|
|
1173 |
|
|
/*
|
1174 |
|
|
** Set or clear the multicast filter for this adapter.
|
1175 |
|
|
*/
|
1176 |
|
|
static void
|
1177 |
|
|
set_multicast_list(struct device *dev)
|
1178 |
|
|
{
|
1179 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1180 |
|
|
u_long iobase = dev->base_addr;
|
1181 |
|
|
u_char csr;
|
1182 |
|
|
|
1183 |
|
|
if (irq2dev_map[dev->irq] != NULL) {
|
1184 |
|
|
csr = inb(EWRK3_CSR);
|
1185 |
|
|
|
1186 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1187 |
|
|
lp->mctbl = (char *) PAGE0_HTE;
|
1188 |
|
|
} else {
|
1189 |
|
|
lp->mctbl = (char *)(lp->shmem_base + PAGE0_HTE);
|
1190 |
|
|
}
|
1191 |
|
|
|
1192 |
|
|
csr &= ~(CSR_PME | CSR_MCE);
|
1193 |
|
|
if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
|
1194 |
|
|
csr |= CSR_PME;
|
1195 |
|
|
outb(csr, EWRK3_CSR);
|
1196 |
|
|
} else {
|
1197 |
|
|
SetMulticastFilter(dev);
|
1198 |
|
|
csr |= CSR_MCE;
|
1199 |
|
|
outb(csr, EWRK3_CSR);
|
1200 |
|
|
}
|
1201 |
|
|
}
|
1202 |
|
|
}
|
1203 |
|
|
|
1204 |
|
|
/*
|
1205 |
|
|
** Calculate the hash code and update the logical address filter
|
1206 |
|
|
** from a list of ethernet multicast addresses.
|
1207 |
|
|
** Little endian crc one liner from Matt Thomas, DEC.
|
1208 |
|
|
**
|
1209 |
|
|
** Note that when clearing the table, the broadcast bit must remain asserted
|
1210 |
|
|
** to receive broadcast messages.
|
1211 |
|
|
*/
|
1212 |
|
|
static void SetMulticastFilter(struct device *dev)
|
1213 |
|
|
{
|
1214 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1215 |
|
|
struct dev_mc_list *dmi=dev->mc_list;
|
1216 |
|
|
u_long iobase = dev->base_addr;
|
1217 |
|
|
int i;
|
1218 |
|
|
char *addrs, j, bit, byte;
|
1219 |
|
|
short *p = (short *) lp->mctbl;
|
1220 |
|
|
u16 hashcode;
|
1221 |
|
|
s32 crc, poly = CRC_POLYNOMIAL_LE;
|
1222 |
|
|
|
1223 |
|
|
while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
|
1224 |
|
|
|
1225 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1226 |
|
|
outb(0, EWRK3_IOPR);
|
1227 |
|
|
outw(EEPROM_OFFSET(lp->mctbl), EWRK3_PIR1);
|
1228 |
|
|
} else {
|
1229 |
|
|
outb(0, EWRK3_MPR);
|
1230 |
|
|
}
|
1231 |
|
|
|
1232 |
|
|
if (dev->flags & IFF_ALLMULTI) {
|
1233 |
|
|
for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
|
1234 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1235 |
|
|
outb(0xff, EWRK3_DATA);
|
1236 |
|
|
} else { /* memset didn't work here */
|
1237 |
|
|
writew(0xffff, p);
|
1238 |
|
|
p++; i++;
|
1239 |
|
|
}
|
1240 |
|
|
}
|
1241 |
|
|
} else {
|
1242 |
|
|
/* Clear table except for broadcast bit */
|
1243 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1244 |
|
|
for (i=0; i<(HASH_TABLE_LEN >> 4) - 1; i++) {
|
1245 |
|
|
outb(0x00, EWRK3_DATA);
|
1246 |
|
|
}
|
1247 |
|
|
outb(0x80, EWRK3_DATA); i++; /* insert the broadcast bit */
|
1248 |
|
|
for (; i<(HASH_TABLE_LEN >> 3); i++) {
|
1249 |
|
|
outb(0x00, EWRK3_DATA);
|
1250 |
|
|
}
|
1251 |
|
|
} else {
|
1252 |
|
|
memset_io(lp->mctbl, 0, (HASH_TABLE_LEN >> 3));
|
1253 |
|
|
writeb(0x80, (char *)(lp->mctbl + (HASH_TABLE_LEN >> 4) - 1));
|
1254 |
|
|
}
|
1255 |
|
|
|
1256 |
|
|
/* Update table */
|
1257 |
|
|
for (i=0;i<dev->mc_count;i++) { /* for each address in the list */
|
1258 |
|
|
addrs=dmi->dmi_addr;
|
1259 |
|
|
dmi=dmi->next;
|
1260 |
|
|
if ((*addrs & 0x01) == 1) { /* multicast address? */
|
1261 |
|
|
crc = 0xffffffff; /* init CRC for each address */
|
1262 |
|
|
for (byte=0;byte<ETH_ALEN;byte++) { /* for each address byte */
|
1263 |
|
|
/* process each address bit */
|
1264 |
|
|
for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
|
1265 |
|
|
crc = (crc >> 1) ^ (((crc ^ bit) & 0x01) ? poly : 0);
|
1266 |
|
|
}
|
1267 |
|
|
}
|
1268 |
|
|
hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
|
1269 |
|
|
|
1270 |
|
|
byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
|
1271 |
|
|
bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
|
1272 |
|
|
|
1273 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1274 |
|
|
u_char tmp;
|
1275 |
|
|
|
1276 |
|
|
outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
|
1277 |
|
|
tmp = inb(EWRK3_DATA);
|
1278 |
|
|
tmp |= bit;
|
1279 |
|
|
outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
|
1280 |
|
|
outb(tmp, EWRK3_DATA);
|
1281 |
|
|
} else {
|
1282 |
|
|
writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
|
1283 |
|
|
}
|
1284 |
|
|
}
|
1285 |
|
|
}
|
1286 |
|
|
}
|
1287 |
|
|
|
1288 |
|
|
lp->lock = 0; /* Unlock the page register */
|
1289 |
|
|
|
1290 |
|
|
return;
|
1291 |
|
|
}
|
1292 |
|
|
|
1293 |
|
|
/*
|
1294 |
|
|
** ISA bus I/O device probe
|
1295 |
|
|
*/
|
1296 |
|
|
static void isa_probe(struct device *dev, u_long ioaddr)
|
1297 |
|
|
{
|
1298 |
|
|
int i = num_ewrk3s, maxSlots;
|
1299 |
|
|
u_long iobase;
|
1300 |
|
|
|
1301 |
|
|
if (!ioaddr && autoprobed) return ; /* Been here before ! */
|
1302 |
|
|
if (ioaddr >= 0x400) return; /* Not ISA */
|
1303 |
|
|
|
1304 |
|
|
if (ioaddr == 0) { /* Autoprobing */
|
1305 |
|
|
iobase = EWRK3_IO_BASE; /* Get the first slot address */
|
1306 |
|
|
maxSlots = 24;
|
1307 |
|
|
} else { /* Probe a specific location */
|
1308 |
|
|
iobase = ioaddr;
|
1309 |
|
|
maxSlots = i + 1;
|
1310 |
|
|
}
|
1311 |
|
|
|
1312 |
|
|
for (; (i<maxSlots) && (dev!=NULL);iobase+=EWRK3_IOP_INC, i++) {
|
1313 |
|
|
if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
|
1314 |
|
|
if (DevicePresent(iobase) == 0) {
|
1315 |
|
|
if ((dev = alloc_device(dev, iobase)) != NULL) {
|
1316 |
|
|
if (ewrk3_hw_init(dev, iobase) == 0) {
|
1317 |
|
|
num_ewrk3s++;
|
1318 |
|
|
}
|
1319 |
|
|
num_eth++;
|
1320 |
|
|
}
|
1321 |
|
|
}
|
1322 |
|
|
} else if (autoprobed) {
|
1323 |
|
|
printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
|
1324 |
|
|
}
|
1325 |
|
|
}
|
1326 |
|
|
|
1327 |
|
|
return;
|
1328 |
|
|
}
|
1329 |
|
|
|
1330 |
|
|
/*
|
1331 |
|
|
** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
|
1332 |
|
|
** the motherboard.
|
1333 |
|
|
*/
|
1334 |
|
|
static void eisa_probe(struct device *dev, u_long ioaddr)
|
1335 |
|
|
{
|
1336 |
|
|
int i, maxSlots;
|
1337 |
|
|
u_long iobase;
|
1338 |
|
|
char name[EWRK3_STRLEN];
|
1339 |
|
|
|
1340 |
|
|
if (!ioaddr && autoprobed) return ; /* Been here before ! */
|
1341 |
|
|
if (ioaddr < 0x1000) return; /* Not EISA */
|
1342 |
|
|
|
1343 |
|
|
if (ioaddr == 0) { /* Autoprobing */
|
1344 |
|
|
iobase = EISA_SLOT_INC; /* Get the first slot address */
|
1345 |
|
|
i = 1;
|
1346 |
|
|
maxSlots = MAX_EISA_SLOTS;
|
1347 |
|
|
} else { /* Probe a specific location */
|
1348 |
|
|
iobase = ioaddr;
|
1349 |
|
|
i = (ioaddr >> 12);
|
1350 |
|
|
maxSlots = i + 1;
|
1351 |
|
|
}
|
1352 |
|
|
|
1353 |
|
|
for (i=1; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
|
1354 |
|
|
if (EISA_signature(name, EISA_ID) == 0) {
|
1355 |
|
|
if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
|
1356 |
|
|
if (DevicePresent(iobase) == 0) {
|
1357 |
|
|
if ((dev = alloc_device(dev, iobase)) != NULL) {
|
1358 |
|
|
if (ewrk3_hw_init(dev, iobase) == 0) {
|
1359 |
|
|
num_ewrk3s++;
|
1360 |
|
|
}
|
1361 |
|
|
num_eth++;
|
1362 |
|
|
}
|
1363 |
|
|
}
|
1364 |
|
|
} else if (autoprobed) {
|
1365 |
|
|
printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
|
1366 |
|
|
}
|
1367 |
|
|
}
|
1368 |
|
|
}
|
1369 |
|
|
|
1370 |
|
|
return;
|
1371 |
|
|
}
|
1372 |
|
|
|
1373 |
|
|
/*
|
1374 |
|
|
** Search the entire 'eth' device list for a fixed probe. If a match isn't
|
1375 |
|
|
** found then check for an autoprobe or unused device location. If they
|
1376 |
|
|
** are not available then insert a new device structure at the end of
|
1377 |
|
|
** the current list.
|
1378 |
|
|
*/
|
1379 |
|
|
static struct device *
|
1380 |
|
|
alloc_device(struct device *dev, u_long iobase)
|
1381 |
|
|
{
|
1382 |
|
|
struct device *adev = NULL;
|
1383 |
|
|
int fixed = 0, new_dev = 0;
|
1384 |
|
|
|
1385 |
|
|
num_eth = ewrk3_dev_index(dev->name);
|
1386 |
|
|
if (loading_module) return dev;
|
1387 |
|
|
|
1388 |
|
|
while (1) {
|
1389 |
|
|
if (((dev->base_addr == EWRK3_NDA) || (dev->base_addr==0)) && !adev) {
|
1390 |
|
|
adev=dev;
|
1391 |
|
|
} else if ((dev->priv == NULL) && (dev->base_addr==iobase)) {
|
1392 |
|
|
fixed = 1;
|
1393 |
|
|
} else {
|
1394 |
|
|
if (dev->next == NULL) {
|
1395 |
|
|
new_dev = 1;
|
1396 |
|
|
} else if (strncmp(dev->next->name, "eth", 3) != 0) {
|
1397 |
|
|
new_dev = 1;
|
1398 |
|
|
}
|
1399 |
|
|
}
|
1400 |
|
|
if ((dev->next == NULL) || new_dev || fixed) break;
|
1401 |
|
|
dev = dev->next;
|
1402 |
|
|
num_eth++;
|
1403 |
|
|
}
|
1404 |
|
|
if (adev && !fixed) {
|
1405 |
|
|
dev = adev;
|
1406 |
|
|
num_eth = ewrk3_dev_index(dev->name);
|
1407 |
|
|
new_dev = 0;
|
1408 |
|
|
}
|
1409 |
|
|
|
1410 |
|
|
if (((dev->next == NULL) &&
|
1411 |
|
|
((dev->base_addr != EWRK3_NDA) && (dev->base_addr != 0)) && !fixed) ||
|
1412 |
|
|
new_dev) {
|
1413 |
|
|
num_eth++; /* New device */
|
1414 |
|
|
dev = insert_device(dev, iobase, ewrk3_probe);
|
1415 |
|
|
}
|
1416 |
|
|
|
1417 |
|
|
return dev;
|
1418 |
|
|
}
|
1419 |
|
|
|
1420 |
|
|
/*
|
1421 |
|
|
** If at end of eth device list and can't use current entry, malloc
|
1422 |
|
|
** one up. If memory could not be allocated, print an error message.
|
1423 |
|
|
*/
|
1424 |
|
|
static struct device *
|
1425 |
|
|
insert_device(struct device *dev, u_long iobase, int (*init)(struct device *))
|
1426 |
|
|
{
|
1427 |
|
|
struct device *new;
|
1428 |
|
|
|
1429 |
|
|
new = (struct device *)kmalloc(sizeof(struct device)+8, GFP_KERNEL);
|
1430 |
|
|
if (new == NULL) {
|
1431 |
|
|
printk("eth%d: Device not initialised, insufficient memory\n",num_eth);
|
1432 |
|
|
return NULL;
|
1433 |
|
|
} else {
|
1434 |
|
|
new->next = dev->next;
|
1435 |
|
|
dev->next = new;
|
1436 |
|
|
dev = dev->next; /* point to the new device */
|
1437 |
|
|
dev->name = (char *)(dev + 1);
|
1438 |
|
|
if (num_eth > 9999) {
|
1439 |
|
|
sprintf(dev->name,"eth????");/* New device name */
|
1440 |
|
|
} else {
|
1441 |
|
|
sprintf(dev->name,"eth%d", num_eth);/* New device name */
|
1442 |
|
|
}
|
1443 |
|
|
dev->base_addr = iobase; /* assign the io address */
|
1444 |
|
|
dev->init = init; /* initialisation routine */
|
1445 |
|
|
}
|
1446 |
|
|
|
1447 |
|
|
return dev;
|
1448 |
|
|
}
|
1449 |
|
|
|
1450 |
|
|
static int
|
1451 |
|
|
ewrk3_dev_index(char *s)
|
1452 |
|
|
{
|
1453 |
|
|
int i=0, j=0;
|
1454 |
|
|
|
1455 |
|
|
for (;*s; s++) {
|
1456 |
|
|
if (isdigit(*s)) {
|
1457 |
|
|
j=1;
|
1458 |
|
|
i = (i * 10) + (*s - '0');
|
1459 |
|
|
} else if (j) break;
|
1460 |
|
|
}
|
1461 |
|
|
|
1462 |
|
|
return i;
|
1463 |
|
|
}
|
1464 |
|
|
|
1465 |
|
|
/*
|
1466 |
|
|
** Read the EWRK3 EEPROM using this routine
|
1467 |
|
|
*/
|
1468 |
|
|
static int Read_EEPROM(u_long iobase, u_char eaddr)
|
1469 |
|
|
{
|
1470 |
|
|
int i;
|
1471 |
|
|
|
1472 |
|
|
outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
|
1473 |
|
|
outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
|
1474 |
|
|
for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
|
1475 |
|
|
|
1476 |
|
|
return inw(EWRK3_EPROM1); /* 16 bits data return */
|
1477 |
|
|
}
|
1478 |
|
|
|
1479 |
|
|
/*
|
1480 |
|
|
** Write the EWRK3 EEPROM using this routine
|
1481 |
|
|
*/
|
1482 |
|
|
static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
|
1483 |
|
|
{
|
1484 |
|
|
int i;
|
1485 |
|
|
|
1486 |
|
|
outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
|
1487 |
|
|
for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
|
1488 |
|
|
outw(data, EWRK3_EPROM1); /* write data to register */
|
1489 |
|
|
outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
|
1490 |
|
|
outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
|
1491 |
|
|
for (i=0;i<75000;i++) inb(EWRK3_CSR); /* wait 15msec */
|
1492 |
|
|
outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
|
1493 |
|
|
for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
|
1494 |
|
|
|
1495 |
|
|
return 0;
|
1496 |
|
|
}
|
1497 |
|
|
|
1498 |
|
|
/*
|
1499 |
|
|
** Look for a particular board name in the on-board EEPROM.
|
1500 |
|
|
*/
|
1501 |
|
|
static void EthwrkSignature(char *name, char *eeprom_image)
|
1502 |
|
|
{
|
1503 |
|
|
u_long i,j,k;
|
1504 |
|
|
char *signatures[] = EWRK3_SIGNATURE;
|
1505 |
|
|
|
1506 |
|
|
strcpy(name, "");
|
1507 |
|
|
for (i=0;*signatures[i] != '\0' && *name == '\0';i++) {
|
1508 |
|
|
for (j=EEPROM_PNAME7,k=0;j<=EEPROM_PNAME0 && k<strlen(signatures[i]);j++) {
|
1509 |
|
|
if (signatures[i][k] == eeprom_image[j]) { /* track signature */
|
1510 |
|
|
k++;
|
1511 |
|
|
} else { /* lost signature; begin search again */
|
1512 |
|
|
k=0;
|
1513 |
|
|
}
|
1514 |
|
|
}
|
1515 |
|
|
if (k == strlen(signatures[i])) {
|
1516 |
|
|
for (k=0; k<EWRK3_STRLEN; k++) {
|
1517 |
|
|
name[k] = eeprom_image[EEPROM_PNAME7 + k];
|
1518 |
|
|
name[EWRK3_STRLEN] = '\0';
|
1519 |
|
|
}
|
1520 |
|
|
}
|
1521 |
|
|
}
|
1522 |
|
|
|
1523 |
|
|
return; /* return the device name string */
|
1524 |
|
|
}
|
1525 |
|
|
|
1526 |
|
|
/*
|
1527 |
|
|
** Look for a special sequence in the Ethernet station address PROM that
|
1528 |
|
|
** is common across all EWRK3 products.
|
1529 |
|
|
**
|
1530 |
|
|
** Search the Ethernet address ROM for the signature. Since the ROM address
|
1531 |
|
|
** counter can start at an arbitrary point, the search must include the entire
|
1532 |
|
|
** probe sequence length plus the (length_of_the_signature - 1).
|
1533 |
|
|
** Stop the search IMMEDIATELY after the signature is found so that the
|
1534 |
|
|
** PROM address counter is correctly positioned at the start of the
|
1535 |
|
|
** ethernet address for later read out.
|
1536 |
|
|
*/
|
1537 |
|
|
|
1538 |
|
|
static int DevicePresent(u_long iobase)
|
1539 |
|
|
{
|
1540 |
|
|
union {
|
1541 |
|
|
struct {
|
1542 |
|
|
u32 a;
|
1543 |
|
|
u32 b;
|
1544 |
|
|
} llsig;
|
1545 |
|
|
char Sig[sizeof(u32) << 1];
|
1546 |
|
|
} dev;
|
1547 |
|
|
short sigLength;
|
1548 |
|
|
char data;
|
1549 |
|
|
int i, j, status = 0;
|
1550 |
|
|
|
1551 |
|
|
dev.llsig.a = ETH_PROM_SIG;
|
1552 |
|
|
dev.llsig.b = ETH_PROM_SIG;
|
1553 |
|
|
sigLength = sizeof(u32) << 1;
|
1554 |
|
|
|
1555 |
|
|
for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
|
1556 |
|
|
data = inb(EWRK3_APROM);
|
1557 |
|
|
if (dev.Sig[j] == data) { /* track signature */
|
1558 |
|
|
j++;
|
1559 |
|
|
} else { /* lost signature; begin search again */
|
1560 |
|
|
if (data == dev.Sig[0]) {
|
1561 |
|
|
j=1;
|
1562 |
|
|
} else {
|
1563 |
|
|
j=0;
|
1564 |
|
|
}
|
1565 |
|
|
}
|
1566 |
|
|
}
|
1567 |
|
|
|
1568 |
|
|
if (j!=sigLength) {
|
1569 |
|
|
status = -ENODEV; /* search failed */
|
1570 |
|
|
}
|
1571 |
|
|
|
1572 |
|
|
return status;
|
1573 |
|
|
}
|
1574 |
|
|
|
1575 |
|
|
static u_char get_hw_addr(struct device *dev, u_char *eeprom_image, char chipType)
|
1576 |
|
|
{
|
1577 |
|
|
int i, j, k;
|
1578 |
|
|
u_short chksum;
|
1579 |
|
|
u_char crc, lfsr, sd, status = 0;
|
1580 |
|
|
u_long iobase = dev->base_addr;
|
1581 |
|
|
u16 tmp;
|
1582 |
|
|
|
1583 |
|
|
if (chipType == LeMAC2) {
|
1584 |
|
|
for (crc=0x6a, j=0; j<ETH_ALEN; j++) {
|
1585 |
|
|
sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
|
1586 |
|
|
outb(dev->dev_addr[j], EWRK3_PAR0 + j);
|
1587 |
|
|
for (k=0; k<8; k++, sd >>= 1) {
|
1588 |
|
|
lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
|
1589 |
|
|
crc = (crc >> 1) + lfsr;
|
1590 |
|
|
}
|
1591 |
|
|
}
|
1592 |
|
|
if (crc != eeprom_image[EEPROM_PA_CRC]) status = -1;
|
1593 |
|
|
} else {
|
1594 |
|
|
for (i=0,k=0;i<ETH_ALEN;) {
|
1595 |
|
|
k <<= 1 ;
|
1596 |
|
|
if (k > 0xffff) k-=0xffff;
|
1597 |
|
|
|
1598 |
|
|
k += (u_char) (tmp = inb(EWRK3_APROM));
|
1599 |
|
|
dev->dev_addr[i] = (u_char) tmp;
|
1600 |
|
|
outb(dev->dev_addr[i], EWRK3_PAR0 + i);
|
1601 |
|
|
i++;
|
1602 |
|
|
k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
|
1603 |
|
|
dev->dev_addr[i] = (u_char) tmp;
|
1604 |
|
|
outb(dev->dev_addr[i], EWRK3_PAR0 + i);
|
1605 |
|
|
i++;
|
1606 |
|
|
|
1607 |
|
|
if (k > 0xffff) k-=0xffff;
|
1608 |
|
|
}
|
1609 |
|
|
if (k == 0xffff) k=0;
|
1610 |
|
|
chksum = inb(EWRK3_APROM);
|
1611 |
|
|
chksum |= (inb(EWRK3_APROM)<<8);
|
1612 |
|
|
if (k != chksum) status = -1;
|
1613 |
|
|
}
|
1614 |
|
|
|
1615 |
|
|
return status;
|
1616 |
|
|
}
|
1617 |
|
|
|
1618 |
|
|
/*
|
1619 |
|
|
** Look for a particular board name in the EISA configuration space
|
1620 |
|
|
*/
|
1621 |
|
|
static int EISA_signature(char *name, s32 eisa_id)
|
1622 |
|
|
{
|
1623 |
|
|
u_long i;
|
1624 |
|
|
char *signatures[] = EWRK3_SIGNATURE;
|
1625 |
|
|
char ManCode[EWRK3_STRLEN];
|
1626 |
|
|
union {
|
1627 |
|
|
s32 ID;
|
1628 |
|
|
char Id[4];
|
1629 |
|
|
} Eisa;
|
1630 |
|
|
int status = 0;
|
1631 |
|
|
|
1632 |
|
|
*name = '\0';
|
1633 |
|
|
for (i=0; i<4; i++) {
|
1634 |
|
|
Eisa.Id[i] = inb(eisa_id + i);
|
1635 |
|
|
}
|
1636 |
|
|
|
1637 |
|
|
ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
|
1638 |
|
|
ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
|
1639 |
|
|
ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
|
1640 |
|
|
ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
|
1641 |
|
|
ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
|
1642 |
|
|
ManCode[5]='\0';
|
1643 |
|
|
|
1644 |
|
|
for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
|
1645 |
|
|
if (strstr(ManCode, signatures[i]) != NULL) {
|
1646 |
|
|
strcpy(name,ManCode);
|
1647 |
|
|
status = 1;
|
1648 |
|
|
}
|
1649 |
|
|
}
|
1650 |
|
|
|
1651 |
|
|
return status; /* return the device name string */
|
1652 |
|
|
}
|
1653 |
|
|
|
1654 |
|
|
/*
|
1655 |
|
|
** Perform IOCTL call functions here. Some are privileged operations and the
|
1656 |
|
|
** effective uid is checked in those cases.
|
1657 |
|
|
*/
|
1658 |
|
|
static int ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd)
|
1659 |
|
|
{
|
1660 |
|
|
struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
|
1661 |
|
|
struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_data;
|
1662 |
|
|
u_long iobase = dev->base_addr;
|
1663 |
|
|
int i, j, status = 0;
|
1664 |
|
|
u_char csr;
|
1665 |
|
|
union {
|
1666 |
|
|
u_char addr[HASH_TABLE_LEN * ETH_ALEN];
|
1667 |
|
|
u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
|
1668 |
|
|
} tmp;
|
1669 |
|
|
|
1670 |
|
|
switch(ioc->cmd) {
|
1671 |
|
|
case EWRK3_GET_HWADDR: /* Get the hardware address */
|
1672 |
|
|
for (i=0; i<ETH_ALEN; i++) {
|
1673 |
|
|
tmp.addr[i] = dev->dev_addr[i];
|
1674 |
|
|
}
|
1675 |
|
|
ioc->len = ETH_ALEN;
|
1676 |
|
|
if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
|
1677 |
|
|
memcpy_tofs(ioc->data, tmp.addr, ioc->len);
|
1678 |
|
|
}
|
1679 |
|
|
|
1680 |
|
|
break;
|
1681 |
|
|
case EWRK3_SET_HWADDR: /* Set the hardware address */
|
1682 |
|
|
if (suser()) {
|
1683 |
|
|
if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
|
1684 |
|
|
csr = inb(EWRK3_CSR);
|
1685 |
|
|
csr |= (CSR_TXD|CSR_RXD);
|
1686 |
|
|
outb(csr, EWRK3_CSR); /* Disable the TX and RX */
|
1687 |
|
|
|
1688 |
|
|
memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
|
1689 |
|
|
for (i=0; i<ETH_ALEN; i++) {
|
1690 |
|
|
dev->dev_addr[i] = tmp.addr[i];
|
1691 |
|
|
outb(tmp.addr[i], EWRK3_PAR0 + i);
|
1692 |
|
|
}
|
1693 |
|
|
|
1694 |
|
|
csr &= ~(CSR_TXD|CSR_RXD); /* Enable the TX and RX */
|
1695 |
|
|
outb(csr, EWRK3_CSR);
|
1696 |
|
|
}
|
1697 |
|
|
} else {
|
1698 |
|
|
status = -EPERM;
|
1699 |
|
|
}
|
1700 |
|
|
|
1701 |
|
|
break;
|
1702 |
|
|
case EWRK3_SET_PROM: /* Set Promiscuous Mode */
|
1703 |
|
|
if (suser()) {
|
1704 |
|
|
csr = inb(EWRK3_CSR);
|
1705 |
|
|
csr |= CSR_PME;
|
1706 |
|
|
csr &= ~CSR_MCE;
|
1707 |
|
|
outb(csr, EWRK3_CSR);
|
1708 |
|
|
} else {
|
1709 |
|
|
status = -EPERM;
|
1710 |
|
|
}
|
1711 |
|
|
|
1712 |
|
|
break;
|
1713 |
|
|
case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
|
1714 |
|
|
if (suser()) {
|
1715 |
|
|
csr = inb(EWRK3_CSR);
|
1716 |
|
|
csr &= ~CSR_PME;
|
1717 |
|
|
outb(csr, EWRK3_CSR);
|
1718 |
|
|
} else {
|
1719 |
|
|
status = -EPERM;
|
1720 |
|
|
}
|
1721 |
|
|
|
1722 |
|
|
break;
|
1723 |
|
|
case EWRK3_SAY_BOO: /* Say "Boo!" to the kernel log file */
|
1724 |
|
|
printk("%s: Boo!\n", dev->name);
|
1725 |
|
|
|
1726 |
|
|
break;
|
1727 |
|
|
case EWRK3_GET_MCA: /* Get the multicast address table */
|
1728 |
|
|
if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
|
1729 |
|
|
while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
|
1730 |
|
|
if (lp->shmem_length == IO_ONLY) {
|
1731 |
|
|
outb(0, EWRK3_IOPR);
|
1732 |
|
|
outw(PAGE0_HTE, EWRK3_PIR1);
|
1733 |
|
|
for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
|
1734 |
|
|
tmp.addr[i] = inb(EWRK3_DATA);
|
1735 |
|
|
}
|
1736 |
|
|
} else {
|
1737 |
|
|
outb(0, EWRK3_MPR);
|
1738 |
|
|
memcpy_fromio(tmp.addr, (char *)(lp->shmem_base + PAGE0_HTE), (HASH_TABLE_LEN >> 3));
|
1739 |
|
|
}
|
1740 |
|
|
ioc->len = (HASH_TABLE_LEN >> 3);
|
1741 |
|
|
memcpy_tofs(ioc->data, tmp.addr, ioc->len);
|
1742 |
|
|
}
|
1743 |
|
|
lp->lock = 0; /* Unlock the page register */
|
1744 |
|
|
|
1745 |
|
|
break;
|
1746 |
|
|
case EWRK3_SET_MCA: /* Set a multicast address */
|
1747 |
|
|
if (suser()) {
|
1748 |
|
|
if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
|
1749 |
|
|
memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
|
1750 |
|
|
set_multicast_list(dev);
|
1751 |
|
|
}
|
1752 |
|
|
} else {
|
1753 |
|
|
status = -EPERM;
|
1754 |
|
|
}
|
1755 |
|
|
|
1756 |
|
|
break;
|
1757 |
|
|
case EWRK3_CLR_MCA: /* Clear all multicast addresses */
|
1758 |
|
|
if (suser()) {
|
1759 |
|
|
set_multicast_list(dev);
|
1760 |
|
|
} else {
|
1761 |
|
|
status = -EPERM;
|
1762 |
|
|
}
|
1763 |
|
|
|
1764 |
|
|
break;
|
1765 |
|
|
case EWRK3_MCA_EN: /* Enable multicast addressing */
|
1766 |
|
|
if (suser()) {
|
1767 |
|
|
csr = inb(EWRK3_CSR);
|
1768 |
|
|
csr |= CSR_MCE;
|
1769 |
|
|
csr &= ~CSR_PME;
|
1770 |
|
|
outb(csr, EWRK3_CSR);
|
1771 |
|
|
} else {
|
1772 |
|
|
status = -EPERM;
|
1773 |
|
|
}
|
1774 |
|
|
|
1775 |
|
|
break;
|
1776 |
|
|
case EWRK3_GET_STATS: /* Get the driver statistics */
|
1777 |
|
|
cli();
|
1778 |
|
|
ioc->len = sizeof(lp->pktStats);
|
1779 |
|
|
if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
|
1780 |
|
|
memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
|
1781 |
|
|
}
|
1782 |
|
|
sti();
|
1783 |
|
|
|
1784 |
|
|
break;
|
1785 |
|
|
case EWRK3_CLR_STATS: /* Zero out the driver statistics */
|
1786 |
|
|
if (suser()) {
|
1787 |
|
|
cli();
|
1788 |
|
|
memset(&lp->pktStats, 0, sizeof(lp->pktStats));
|
1789 |
|
|
sti();
|
1790 |
|
|
} else {
|
1791 |
|
|
status = -EPERM;
|
1792 |
|
|
}
|
1793 |
|
|
|
1794 |
|
|
break;
|
1795 |
|
|
case EWRK3_GET_CSR: /* Get the CSR Register contents */
|
1796 |
|
|
tmp.addr[0] = inb(EWRK3_CSR);
|
1797 |
|
|
ioc->len = 1;
|
1798 |
|
|
if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
|
1799 |
|
|
memcpy_tofs(ioc->data, tmp.addr, ioc->len);
|
1800 |
|
|
}
|
1801 |
|
|
|
1802 |
|
|
break;
|
1803 |
|
|
case EWRK3_SET_CSR: /* Set the CSR Register contents */
|
1804 |
|
|
if (suser()) {
|
1805 |
|
|
if (!(status=verify_area(VERIFY_READ, ioc->data, 1))) {
|
1806 |
|
|
memcpy_fromfs(tmp.addr, ioc->data, 1);
|
1807 |
|
|
outb(tmp.addr[0], EWRK3_CSR);
|
1808 |
|
|
}
|
1809 |
|
|
} else {
|
1810 |
|
|
status = -EPERM;
|
1811 |
|
|
}
|
1812 |
|
|
|
1813 |
|
|
break;
|
1814 |
|
|
case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
|
1815 |
|
|
if (suser()) {
|
1816 |
|
|
for (i=0; i<(EEPROM_MAX>>1); i++) {
|
1817 |
|
|
tmp.val[i] = (short)Read_EEPROM(iobase, i);
|
1818 |
|
|
}
|
1819 |
|
|
i = EEPROM_MAX;
|
1820 |
|
|
tmp.addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
|
1821 |
|
|
for (j=0;j<ETH_ALEN;j++) {
|
1822 |
|
|
tmp.addr[i++] = inb(EWRK3_PAR0 + j);
|
1823 |
|
|
}
|
1824 |
|
|
ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
|
1825 |
|
|
if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
|
1826 |
|
|
memcpy_tofs(ioc->data, tmp.addr, ioc->len);
|
1827 |
|
|
}
|
1828 |
|
|
} else {
|
1829 |
|
|
status = -EPERM;
|
1830 |
|
|
}
|
1831 |
|
|
|
1832 |
|
|
break;
|
1833 |
|
|
case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
|
1834 |
|
|
if (suser()) {
|
1835 |
|
|
if (!(status=verify_area(VERIFY_READ, ioc->data, EEPROM_MAX))) {
|
1836 |
|
|
memcpy_fromfs(tmp.addr, ioc->data, EEPROM_MAX);
|
1837 |
|
|
for (i=0; i<(EEPROM_MAX>>1); i++) {
|
1838 |
|
|
Write_EEPROM(tmp.val[i], iobase, i);
|
1839 |
|
|
}
|
1840 |
|
|
}
|
1841 |
|
|
} else {
|
1842 |
|
|
status = -EPERM;
|
1843 |
|
|
}
|
1844 |
|
|
|
1845 |
|
|
break;
|
1846 |
|
|
case EWRK3_GET_CMR: /* Get the CMR Register contents */
|
1847 |
|
|
tmp.addr[0] = inb(EWRK3_CMR);
|
1848 |
|
|
ioc->len = 1;
|
1849 |
|
|
if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
|
1850 |
|
|
memcpy_tofs(ioc->data, tmp.addr, ioc->len);
|
1851 |
|
|
}
|
1852 |
|
|
|
1853 |
|
|
break;
|
1854 |
|
|
case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
|
1855 |
|
|
if (suser()) {
|
1856 |
|
|
lp->txc = 1;
|
1857 |
|
|
} else {
|
1858 |
|
|
status = -EPERM;
|
1859 |
|
|
}
|
1860 |
|
|
|
1861 |
|
|
break;
|
1862 |
|
|
case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
|
1863 |
|
|
if (suser()) {
|
1864 |
|
|
lp->txc = 0;
|
1865 |
|
|
} else {
|
1866 |
|
|
status = -EPERM;
|
1867 |
|
|
}
|
1868 |
|
|
|
1869 |
|
|
break;
|
1870 |
|
|
default:
|
1871 |
|
|
status = -EOPNOTSUPP;
|
1872 |
|
|
}
|
1873 |
|
|
|
1874 |
|
|
return status;
|
1875 |
|
|
}
|
1876 |
|
|
|
1877 |
|
|
#ifdef MODULE
|
1878 |
|
|
static char devicename[9] = { 0, };
|
1879 |
|
|
static struct device thisEthwrk = {
|
1880 |
|
|
devicename, /* device name is inserted by /linux/drivers/net/net_init.c */
|
1881 |
|
|
0, 0, 0, 0,
|
1882 |
|
|
0x300, 5, /* I/O address, IRQ */
|
1883 |
|
|
0, 0, 0, NULL, ewrk3_probe };
|
1884 |
|
|
|
1885 |
|
|
static int io=0x300; /* <--- EDIT THESE LINES FOR YOUR CONFIGURATION */
|
1886 |
|
|
static int irq=5; /* or use the insmod io= irq= options */
|
1887 |
|
|
|
1888 |
|
|
int
|
1889 |
|
|
init_module(void)
|
1890 |
|
|
{
|
1891 |
|
|
thisEthwrk.base_addr=io;
|
1892 |
|
|
thisEthwrk.irq=irq;
|
1893 |
|
|
if (register_netdev(&thisEthwrk) != 0)
|
1894 |
|
|
return -EIO;
|
1895 |
|
|
return 0;
|
1896 |
|
|
}
|
1897 |
|
|
|
1898 |
|
|
void
|
1899 |
|
|
cleanup_module(void)
|
1900 |
|
|
{
|
1901 |
|
|
if (thisEthwrk.priv) {
|
1902 |
|
|
kfree(thisEthwrk.priv);
|
1903 |
|
|
thisEthwrk.priv = NULL;
|
1904 |
|
|
}
|
1905 |
|
|
thisEthwrk.irq = 0;
|
1906 |
|
|
|
1907 |
|
|
unregister_netdev(&thisEthwrk);
|
1908 |
|
|
release_region(thisEthwrk.base_addr, EWRK3_TOTAL_SIZE);
|
1909 |
|
|
}
|
1910 |
|
|
#endif /* MODULE */
|
1911 |
|
|
|
1912 |
|
|
|
1913 |
|
|
/*
|
1914 |
|
|
* Local variables:
|
1915 |
|
|
* compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
|
1916 |
|
|
*
|
1917 |
|
|
* compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
|
1918 |
|
|
* End:
|
1919 |
|
|
*/
|
1920 |
|
|
|