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1626 |
jcastillo |
/*****************************************************************************/
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/*
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* sm_sbc.c -- soundcard radio modem driver soundblaster hardware driver
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*
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* Copyright (C) 1996 Thomas Sailer (sailer@ife.ee.ethz.ch)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Please note that the GPL allows you to use the driver, NOT the radio.
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* In order to use the radio, you need a license from the communications
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* authority of your country.
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*
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*/
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#include <linux/ptrace.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/ioport.h>
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#include <linux/soundmodem.h>
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#include <linux/delay.h>
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#include "sm.h"
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#include "smdma.h"
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/* --------------------------------------------------------------------- */
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/*
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* currently this module is supposed to support both module styles, i.e.
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* the old one present up to about 2.1.9, and the new one functioning
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* starting with 2.1.21. The reason is I have a kit allowing to compile
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* this module also under 2.0.x which was requested by several people.
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* This will go in 2.2
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*/
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#include <linux/version.h>
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#if LINUX_VERSION_CODE >= 0x20100
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#include <asm/uaccess.h>
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#else
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#include <asm/segment.h>
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#include <linux/mm.h>
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55 |
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#undef put_user
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#undef get_user
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#define put_user(x,ptr) ({ __put_user((unsigned long)(x),(ptr),sizeof(*(ptr))); 0; })
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#define get_user(x,ptr) ({ x = ((__typeof__(*(ptr)))__get_user((ptr),sizeof(*(ptr)))); 0; })
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extern inline int copy_from_user(void *to, const void *from, unsigned long n)
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{
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int i = verify_area(VERIFY_READ, from, n);
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if (i)
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return i;
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memcpy_fromfs(to, from, n);
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return 0;
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}
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extern inline int copy_to_user(void *to, const void *from, unsigned long n)
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{
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int i = verify_area(VERIFY_WRITE, to, n);
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if (i)
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return i;
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memcpy_tofs(to, from, n);
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return 0;
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}
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#endif
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/* --------------------------------------------------------------------- */
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struct sc_state_sbc {
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unsigned char revhi, revlo;
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unsigned char fmt[2];
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unsigned int sr[2];
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};
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#define SCSTATE ((struct sc_state_sbc *)(&sm->hw))
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/* --------------------------------------------------------------------- */
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/*
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* the sbc converter's registers
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*/
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#define DSP_RESET(iobase) (iobase+0x6)
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#define DSP_READ_DATA(iobase) (iobase+0xa)
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#define DSP_WRITE_DATA(iobase) (iobase+0xc)
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#define DSP_WRITE_STATUS(iobase) (iobase+0xc)
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#define DSP_DATA_AVAIL(iobase) (iobase+0xe)
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#define DSP_MIXER_ADDR(iobase) (iobase+0x4)
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#define DSP_MIXER_DATA(iobase) (iobase+0x5)
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#define DSP_INTACK_16BIT(iobase) (iobase+0xf)
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#define SBC_EXTENT 16
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/* --------------------------------------------------------------------- */
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/*
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* SBC commands
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*/
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#define SBC_OUTPUT 0x14
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#define SBC_INPUT 0x24
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#define SBC_BLOCKSIZE 0x48
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#define SBC_HI_OUTPUT 0x91
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#define SBC_HI_INPUT 0x99
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#define SBC_LO_OUTPUT_AUTOINIT 0x1c
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#define SBC_LO_INPUT_AUTOINIT 0x2c
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#define SBC_HI_OUTPUT_AUTOINIT 0x90
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#define SBC_HI_INPUT_AUTOINIT 0x98
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#define SBC_IMMED_INT 0xf2
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#define SBC_GET_REVISION 0xe1
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#define ESS_GET_REVISION 0xe7
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#define SBC_SPEAKER_ON 0xd1
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#define SBC_SPEAKER_OFF 0xd3
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#define SBC_DMA_ON 0xd0
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#define SBC_DMA_OFF 0xd4
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#define SBC_SAMPLE_RATE 0x40
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#define SBC_SAMPLE_RATE_OUT 0x41
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#define SBC_SAMPLE_RATE_IN 0x42
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#define SBC_MONO_8BIT 0xa0
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#define SBC_MONO_16BIT 0xa4
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#define SBC_STEREO_8BIT 0xa8
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#define SBC_STEREO_16BIT 0xac
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#define SBC4_OUT8_AI 0xc6
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#define SBC4_IN8_AI 0xce
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#define SBC4_MODE_UNS_MONO 0x00
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#define SBC4_MODE_SIGN_MONO 0x10
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#define SBC4_OUT16_AI 0xb6
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#define SBC4_IN16_AI 0xbe
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/* --------------------------------------------------------------------- */
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static int inline reset_dsp(struct device *dev)
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{
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int i;
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outb(1, DSP_RESET(dev->base_addr));
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udelay(300);
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outb(0, DSP_RESET(dev->base_addr));
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for (i = 0; i < 0xffff; i++)
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if (inb(DSP_DATA_AVAIL(dev->base_addr)) & 0x80)
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if (inb(DSP_READ_DATA(dev->base_addr)) == 0xaa)
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return 1;
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return 0;
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}
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/* --------------------------------------------------------------------- */
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static void inline write_dsp(struct device *dev, unsigned char data)
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{
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int i;
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for (i = 0; i < 0xffff; i++)
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if (!(inb(DSP_WRITE_STATUS(dev->base_addr)) & 0x80)) {
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outb(data, DSP_WRITE_DATA(dev->base_addr));
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return;
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}
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}
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/* --------------------------------------------------------------------- */
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static int inline read_dsp(struct device *dev, unsigned char *data)
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{
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int i;
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if (!data)
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return 0;
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for (i = 0; i < 0xffff; i++)
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if (inb(DSP_DATA_AVAIL(dev->base_addr)) & 0x80) {
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*data = inb(DSP_READ_DATA(dev->base_addr));
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return 1;
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}
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return 0;
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}
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/* --------------------------------------------------------------------- */
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static int config_resources(struct device *dev, struct sm_state *sm, int fdx)
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{
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unsigned char irqreg = 0, dmareg = 0, realirq, realdma;
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unsigned long flags;
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switch (dev->irq) {
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case 2:
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case 9:
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irqreg |= 0x01;
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break;
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case 5:
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irqreg |= 0x02;
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break;
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case 7:
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irqreg |= 0x04;
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break;
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case 10:
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irqreg |= 0x08;
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break;
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default:
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return -ENODEV;
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}
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switch (dev->dma) {
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case 0:
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dmareg |= 0x01;
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break;
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case 1:
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dmareg |= 0x02;
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break;
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case 3:
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dmareg |= 0x08;
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break;
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default:
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return -ENODEV;
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}
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if (fdx) {
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switch (sm->hdrv.ptt_out.dma2) {
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case 5:
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dmareg |= 0x20;
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break;
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case 6:
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dmareg |= 0x40;
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break;
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case 7:
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dmareg |= 0x80;
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break;
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default:
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return -ENODEV;
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}
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249 |
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}
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save_flags(flags);
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cli();
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outb(0x80, DSP_MIXER_ADDR(dev->base_addr));
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outb(irqreg, DSP_MIXER_DATA(dev->base_addr));
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realirq = inb(DSP_MIXER_DATA(dev->base_addr));
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outb(0x81, DSP_MIXER_ADDR(dev->base_addr));
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256 |
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outb(dmareg, DSP_MIXER_DATA(dev->base_addr));
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257 |
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realdma = inb(DSP_MIXER_DATA(dev->base_addr));
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258 |
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restore_flags(flags);
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259 |
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if ((~realirq) & irqreg || (~realdma) & dmareg) {
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260 |
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printk(KERN_ERR "%s: sbc resource registers cannot be set; PnP device "
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261 |
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"and IRQ/DMA specified wrongly?\n", sm_drvname);
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262 |
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return -EINVAL;
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263 |
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}
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264 |
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return 0;
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265 |
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}
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266 |
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267 |
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/* --------------------------------------------------------------------- */
|
268 |
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|
269 |
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static void inline sbc_int_ack_8bit(struct device *dev)
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270 |
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{
|
271 |
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inb(DSP_DATA_AVAIL(dev->base_addr));
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272 |
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}
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273 |
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274 |
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/* --------------------------------------------------------------------- */
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275 |
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|
276 |
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static void inline sbc_int_ack_16bit(struct device *dev)
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277 |
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{
|
278 |
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inb(DSP_INTACK_16BIT(dev->base_addr));
|
279 |
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}
|
280 |
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|
281 |
|
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/* --------------------------------------------------------------------- */
|
282 |
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|
283 |
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static void setup_dma_dsp(struct device *dev, struct sm_state *sm, int send)
|
284 |
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{
|
285 |
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unsigned long flags;
|
286 |
|
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static const unsigned char sbcmode[2][2] = {
|
287 |
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{ SBC_LO_INPUT_AUTOINIT, SBC_LO_OUTPUT_AUTOINIT },
|
288 |
|
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{ SBC_HI_INPUT_AUTOINIT, SBC_HI_OUTPUT_AUTOINIT }
|
289 |
|
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};
|
290 |
|
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static const unsigned char sbc4mode[2] = { SBC4_IN8_AI, SBC4_OUT8_AI };
|
291 |
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static const unsigned char sbcskr[2] = { SBC_SPEAKER_OFF, SBC_SPEAKER_ON };
|
292 |
|
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unsigned int nsamps;
|
293 |
|
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|
294 |
|
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send = !!send;
|
295 |
|
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if (!reset_dsp(dev)) {
|
296 |
|
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printk(KERN_ERR "%s: sbc: cannot reset sb dsp\n", sm_drvname);
|
297 |
|
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return;
|
298 |
|
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}
|
299 |
|
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save_flags(flags);
|
300 |
|
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cli();
|
301 |
|
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sbc_int_ack_8bit(dev);
|
302 |
|
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write_dsp(dev, SBC_SAMPLE_RATE); /* set sampling rate */
|
303 |
|
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write_dsp(dev, SCSTATE->fmt[send]);
|
304 |
|
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write_dsp(dev, sbcskr[send]);
|
305 |
|
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nsamps = dma_setup(sm, send, dev->dma) - 1;
|
306 |
|
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sbc_int_ack_8bit(dev);
|
307 |
|
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if (SCSTATE->revhi >= 4) {
|
308 |
|
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write_dsp(dev, sbc4mode[send]);
|
309 |
|
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write_dsp(dev, SBC4_MODE_UNS_MONO);
|
310 |
|
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write_dsp(dev, nsamps & 0xff);
|
311 |
|
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write_dsp(dev, nsamps >> 8);
|
312 |
|
|
} else {
|
313 |
|
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write_dsp(dev, SBC_BLOCKSIZE);
|
314 |
|
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write_dsp(dev, nsamps & 0xff);
|
315 |
|
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write_dsp(dev, nsamps >> 8);
|
316 |
|
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write_dsp(dev, sbcmode[SCSTATE->fmt[send] >= 180][send]);
|
317 |
|
|
/* hispeed mode if sample rate > 13kHz */
|
318 |
|
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}
|
319 |
|
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restore_flags(flags);
|
320 |
|
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}
|
321 |
|
|
|
322 |
|
|
/* --------------------------------------------------------------------- */
|
323 |
|
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|
324 |
|
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static void sbc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
325 |
|
|
{
|
326 |
|
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struct device *dev = (struct device *)dev_id;
|
327 |
|
|
struct sm_state *sm = (struct sm_state *)dev->priv;
|
328 |
|
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unsigned int curfrag;
|
329 |
|
|
|
330 |
|
|
if (!dev || !sm || sm->hdrv.magic != HDLCDRV_MAGIC)
|
331 |
|
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return;
|
332 |
|
|
cli();
|
333 |
|
|
sbc_int_ack_8bit(dev);
|
334 |
|
|
disable_dma(dev->dma);
|
335 |
|
|
clear_dma_ff(dev->dma);
|
336 |
|
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dma_ptr(sm, sm->dma.ptt_cnt > 0, dev->dma, &curfrag);
|
337 |
|
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enable_dma(dev->dma);
|
338 |
|
|
sm_int_freq(sm);
|
339 |
|
|
sti();
|
340 |
|
|
if (sm->dma.ptt_cnt <= 0) {
|
341 |
|
|
dma_receive(sm, curfrag);
|
342 |
|
|
hdlcdrv_arbitrate(dev, &sm->hdrv);
|
343 |
|
|
if (hdlcdrv_ptt(&sm->hdrv)) {
|
344 |
|
|
/* starting to transmit */
|
345 |
|
|
disable_dma(dev->dma);
|
346 |
|
|
hdlcdrv_transmitter(dev, &sm->hdrv); /* prefill HDLC buffer */
|
347 |
|
|
dma_start_transmit(sm);
|
348 |
|
|
setup_dma_dsp(dev, sm, 1);
|
349 |
|
|
dma_transmit(sm);
|
350 |
|
|
}
|
351 |
|
|
} else if (dma_end_transmit(sm, curfrag)) {
|
352 |
|
|
/* stopping transmission */
|
353 |
|
|
disable_dma(dev->dma);
|
354 |
|
|
sti();
|
355 |
|
|
dma_init_receive(sm);
|
356 |
|
|
setup_dma_dsp(dev, sm, 0);
|
357 |
|
|
} else
|
358 |
|
|
dma_transmit(sm);
|
359 |
|
|
sm_output_status(sm);
|
360 |
|
|
hdlcdrv_transmitter(dev, &sm->hdrv);
|
361 |
|
|
hdlcdrv_receiver(dev, &sm->hdrv);
|
362 |
|
|
|
363 |
|
|
}
|
364 |
|
|
|
365 |
|
|
/* --------------------------------------------------------------------- */
|
366 |
|
|
|
367 |
|
|
static int sbc_open(struct device *dev, struct sm_state *sm)
|
368 |
|
|
{
|
369 |
|
|
int err;
|
370 |
|
|
unsigned int dmasz, u;
|
371 |
|
|
|
372 |
|
|
if (sizeof(sm->m) < sizeof(struct sc_state_sbc)) {
|
373 |
|
|
printk(KERN_ERR "sm sbc: sbc state too big: %d > %d\n",
|
374 |
|
|
sizeof(struct sc_state_sbc), sizeof(sm->m));
|
375 |
|
|
return -ENODEV;
|
376 |
|
|
}
|
377 |
|
|
if (!dev || !sm)
|
378 |
|
|
return -ENXIO;
|
379 |
|
|
if (dev->base_addr <= 0 || dev->base_addr > 0x1000-SBC_EXTENT ||
|
380 |
|
|
dev->irq < 2 || dev->irq > 15 || dev->dma > 3)
|
381 |
|
|
return -ENXIO;
|
382 |
|
|
if (check_region(dev->base_addr, SBC_EXTENT))
|
383 |
|
|
return -EACCES;
|
384 |
|
|
/*
|
385 |
|
|
* check if a card is available
|
386 |
|
|
*/
|
387 |
|
|
if (!reset_dsp(dev)) {
|
388 |
|
|
printk(KERN_ERR "%s: sbc: no card at io address 0x%lx\n",
|
389 |
|
|
sm_drvname, dev->base_addr);
|
390 |
|
|
return -ENODEV;
|
391 |
|
|
}
|
392 |
|
|
write_dsp(dev, SBC_GET_REVISION);
|
393 |
|
|
if (!read_dsp(dev, &SCSTATE->revhi) ||
|
394 |
|
|
!read_dsp(dev, &SCSTATE->revlo))
|
395 |
|
|
return -ENODEV;
|
396 |
|
|
printk(KERN_INFO "%s: SoundBlaster DSP revision %d.%d\n", sm_drvname,
|
397 |
|
|
SCSTATE->revhi, SCSTATE->revlo);
|
398 |
|
|
if (SCSTATE->revhi < 2) {
|
399 |
|
|
printk(KERN_ERR "%s: your card is an antiquity, at least DSP "
|
400 |
|
|
"rev 2.00 required\n", sm_drvname);
|
401 |
|
|
return -ENODEV;
|
402 |
|
|
}
|
403 |
|
|
if (SCSTATE->revhi < 3 &&
|
404 |
|
|
(SCSTATE->fmt[0] >= 180 || SCSTATE->fmt[1] >= 180)) {
|
405 |
|
|
printk(KERN_ERR "%s: sbc io 0x%lx: DSP rev %d.%02d too "
|
406 |
|
|
"old, at least 3.00 required\n", sm_drvname,
|
407 |
|
|
dev->base_addr, SCSTATE->revhi, SCSTATE->revlo);
|
408 |
|
|
return -ENODEV;
|
409 |
|
|
}
|
410 |
|
|
if (SCSTATE->revhi >= 4 &&
|
411 |
|
|
(err = config_resources(dev, sm, 0))) {
|
412 |
|
|
printk(KERN_ERR "%s: invalid IRQ and/or DMA specified\n", sm_drvname);
|
413 |
|
|
return err;
|
414 |
|
|
}
|
415 |
|
|
/*
|
416 |
|
|
* initialize some variables
|
417 |
|
|
*/
|
418 |
|
|
dma_init_receive(sm);
|
419 |
|
|
dmasz = (NUM_FRAGMENTS + 1) * sm->dma.ifragsz;
|
420 |
|
|
u = NUM_FRAGMENTS * sm->dma.ofragsz;
|
421 |
|
|
if (u > dmasz)
|
422 |
|
|
dmasz = u;
|
423 |
|
|
if (!(sm->dma.ibuf = sm->dma.obuf = kmalloc(dmasz, GFP_KERNEL | GFP_DMA)))
|
424 |
|
|
return -ENOMEM;
|
425 |
|
|
dma_init_transmit(sm);
|
426 |
|
|
dma_init_receive(sm);
|
427 |
|
|
|
428 |
|
|
memset(&sm->m, 0, sizeof(sm->m));
|
429 |
|
|
memset(&sm->d, 0, sizeof(sm->d));
|
430 |
|
|
if (sm->mode_tx->init)
|
431 |
|
|
sm->mode_tx->init(sm);
|
432 |
|
|
if (sm->mode_rx->init)
|
433 |
|
|
sm->mode_rx->init(sm);
|
434 |
|
|
|
435 |
|
|
if (request_dma(dev->dma, sm->hwdrv->hw_name)) {
|
436 |
|
|
kfree_s(sm->dma.obuf, dmasz);
|
437 |
|
|
return -EBUSY;
|
438 |
|
|
}
|
439 |
|
|
if (request_irq(dev->irq, sbc_interrupt, SA_INTERRUPT,
|
440 |
|
|
sm->hwdrv->hw_name, dev)) {
|
441 |
|
|
free_dma(dev->dma);
|
442 |
|
|
kfree_s(sm->dma.obuf, dmasz);
|
443 |
|
|
return -EBUSY;
|
444 |
|
|
}
|
445 |
|
|
request_region(dev->base_addr, SBC_EXTENT, sm->hwdrv->hw_name);
|
446 |
|
|
setup_dma_dsp(dev, sm, 0);
|
447 |
|
|
return 0;
|
448 |
|
|
}
|
449 |
|
|
|
450 |
|
|
/* --------------------------------------------------------------------- */
|
451 |
|
|
|
452 |
|
|
static int sbc_close(struct device *dev, struct sm_state *sm)
|
453 |
|
|
{
|
454 |
|
|
if (!dev || !sm)
|
455 |
|
|
return -EINVAL;
|
456 |
|
|
/*
|
457 |
|
|
* disable interrupts
|
458 |
|
|
*/
|
459 |
|
|
disable_dma(dev->dma);
|
460 |
|
|
reset_dsp(dev);
|
461 |
|
|
free_irq(dev->irq, dev);
|
462 |
|
|
free_dma(dev->dma);
|
463 |
|
|
release_region(dev->base_addr, SBC_EXTENT);
|
464 |
|
|
kfree(sm->dma.obuf);
|
465 |
|
|
return 0;
|
466 |
|
|
}
|
467 |
|
|
|
468 |
|
|
/* --------------------------------------------------------------------- */
|
469 |
|
|
|
470 |
|
|
static int sbc_sethw(struct device *dev, struct sm_state *sm, char *mode)
|
471 |
|
|
{
|
472 |
|
|
char *cp = strchr(mode, '.');
|
473 |
|
|
const struct modem_tx_info **mtp = sm_modem_tx_table;
|
474 |
|
|
const struct modem_rx_info **mrp;
|
475 |
|
|
|
476 |
|
|
if (!strcmp(mode, "off")) {
|
477 |
|
|
sm->mode_tx = NULL;
|
478 |
|
|
sm->mode_rx = NULL;
|
479 |
|
|
return 0;
|
480 |
|
|
}
|
481 |
|
|
if (cp)
|
482 |
|
|
*cp++ = '\0';
|
483 |
|
|
else
|
484 |
|
|
cp = mode;
|
485 |
|
|
for (; *mtp; mtp++) {
|
486 |
|
|
if ((*mtp)->loc_storage > sizeof(sm->m)) {
|
487 |
|
|
printk(KERN_ERR "%s: insufficient storage for modulator %s (%d)\n",
|
488 |
|
|
sm_drvname, (*mtp)->name, (*mtp)->loc_storage);
|
489 |
|
|
continue;
|
490 |
|
|
}
|
491 |
|
|
if (!(*mtp)->name || strcmp((*mtp)->name, mode))
|
492 |
|
|
continue;
|
493 |
|
|
if ((*mtp)->srate < 5000 || (*mtp)->srate > 44100)
|
494 |
|
|
continue;
|
495 |
|
|
if (!(*mtp)->modulator_u8)
|
496 |
|
|
continue;
|
497 |
|
|
for (mrp = sm_modem_rx_table; *mrp; mrp++) {
|
498 |
|
|
if ((*mrp)->loc_storage > sizeof(sm->d)) {
|
499 |
|
|
printk(KERN_ERR "%s: insufficient storage for demodulator %s (%d)\n",
|
500 |
|
|
sm_drvname, (*mrp)->name, (*mrp)->loc_storage);
|
501 |
|
|
continue;
|
502 |
|
|
}
|
503 |
|
|
if (!(*mrp)->demodulator_u8)
|
504 |
|
|
continue;
|
505 |
|
|
if ((*mrp)->name && !strcmp((*mrp)->name, cp) &&
|
506 |
|
|
(*mrp)->srate >= 5000 && (*mrp)->srate <= 44100) {
|
507 |
|
|
sm->mode_tx = *mtp;
|
508 |
|
|
sm->mode_rx = *mrp;
|
509 |
|
|
SCSTATE->fmt[0] = 256-((1000000L+sm->mode_rx->srate/2)/
|
510 |
|
|
sm->mode_rx->srate);
|
511 |
|
|
SCSTATE->fmt[1] = 256-((1000000L+sm->mode_tx->srate/2)/
|
512 |
|
|
sm->mode_tx->srate);
|
513 |
|
|
sm->dma.ifragsz = (sm->mode_rx->srate + 50)/100;
|
514 |
|
|
sm->dma.ofragsz = (sm->mode_tx->srate + 50)/100;
|
515 |
|
|
if (sm->dma.ifragsz < sm->mode_rx->overlap)
|
516 |
|
|
sm->dma.ifragsz = sm->mode_rx->overlap;
|
517 |
|
|
sm->dma.i16bit = sm->dma.o16bit = 0;
|
518 |
|
|
return 0;
|
519 |
|
|
}
|
520 |
|
|
}
|
521 |
|
|
}
|
522 |
|
|
return -EINVAL;
|
523 |
|
|
}
|
524 |
|
|
|
525 |
|
|
/* --------------------------------------------------------------------- */
|
526 |
|
|
|
527 |
|
|
static int sbc_ioctl(struct device *dev, struct sm_state *sm, struct ifreq *ifr,
|
528 |
|
|
struct hdlcdrv_ioctl *hi, int cmd)
|
529 |
|
|
{
|
530 |
|
|
struct sm_ioctl bi;
|
531 |
|
|
unsigned long flags;
|
532 |
|
|
int i;
|
533 |
|
|
|
534 |
|
|
if (cmd != SIOCDEVPRIVATE)
|
535 |
|
|
return -ENOIOCTLCMD;
|
536 |
|
|
|
537 |
|
|
if (hi->cmd == HDLCDRVCTL_MODEMPARMASK)
|
538 |
|
|
return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ |
|
539 |
|
|
HDLCDRV_PARMASK_DMA | HDLCDRV_PARMASK_SERIOBASE |
|
540 |
|
|
HDLCDRV_PARMASK_PARIOBASE | HDLCDRV_PARMASK_MIDIIOBASE;
|
541 |
|
|
|
542 |
|
|
if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
|
543 |
|
|
return -EFAULT;
|
544 |
|
|
|
545 |
|
|
switch (bi.cmd) {
|
546 |
|
|
default:
|
547 |
|
|
return -ENOIOCTLCMD;
|
548 |
|
|
|
549 |
|
|
case SMCTL_GETMIXER:
|
550 |
|
|
i = 0;
|
551 |
|
|
bi.data.mix.sample_rate = sm->mode_rx->srate;
|
552 |
|
|
bi.data.mix.bit_rate = sm->hdrv.par.bitrate;
|
553 |
|
|
bi.data.mix.mixer_type = SM_MIXER_INVALID;
|
554 |
|
|
switch (SCSTATE->revhi) {
|
555 |
|
|
case 2:
|
556 |
|
|
bi.data.mix.mixer_type = SM_MIXER_CT1335;
|
557 |
|
|
break;
|
558 |
|
|
case 3:
|
559 |
|
|
bi.data.mix.mixer_type = SM_MIXER_CT1345;
|
560 |
|
|
break;
|
561 |
|
|
case 4:
|
562 |
|
|
bi.data.mix.mixer_type = SM_MIXER_CT1745;
|
563 |
|
|
break;
|
564 |
|
|
}
|
565 |
|
|
if (bi.data.mix.mixer_type != SM_MIXER_INVALID &&
|
566 |
|
|
bi.data.mix.reg < 0x80) {
|
567 |
|
|
save_flags(flags);
|
568 |
|
|
cli();
|
569 |
|
|
outb(bi.data.mix.reg, DSP_MIXER_ADDR(dev->base_addr));
|
570 |
|
|
bi.data.mix.data = inb(DSP_MIXER_DATA(dev->base_addr));
|
571 |
|
|
restore_flags(flags);
|
572 |
|
|
i = 1;
|
573 |
|
|
}
|
574 |
|
|
if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
|
575 |
|
|
return -EFAULT;
|
576 |
|
|
return i;
|
577 |
|
|
|
578 |
|
|
case SMCTL_SETMIXER:
|
579 |
|
|
if (!suser())
|
580 |
|
|
return -EACCES;
|
581 |
|
|
switch (SCSTATE->revhi) {
|
582 |
|
|
case 2:
|
583 |
|
|
if (bi.data.mix.mixer_type != SM_MIXER_CT1335)
|
584 |
|
|
return -EINVAL;
|
585 |
|
|
break;
|
586 |
|
|
case 3:
|
587 |
|
|
if (bi.data.mix.mixer_type != SM_MIXER_CT1345)
|
588 |
|
|
return -EINVAL;
|
589 |
|
|
break;
|
590 |
|
|
case 4:
|
591 |
|
|
if (bi.data.mix.mixer_type != SM_MIXER_CT1745)
|
592 |
|
|
return -EINVAL;
|
593 |
|
|
break;
|
594 |
|
|
default:
|
595 |
|
|
return -ENODEV;
|
596 |
|
|
}
|
597 |
|
|
if (bi.data.mix.reg >= 0x80)
|
598 |
|
|
return -EACCES;
|
599 |
|
|
save_flags(flags);
|
600 |
|
|
cli();
|
601 |
|
|
outb(bi.data.mix.reg, DSP_MIXER_ADDR(dev->base_addr));
|
602 |
|
|
outb(bi.data.mix.data, DSP_MIXER_DATA(dev->base_addr));
|
603 |
|
|
restore_flags(flags);
|
604 |
|
|
return 0;
|
605 |
|
|
|
606 |
|
|
}
|
607 |
|
|
if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
|
608 |
|
|
return -EFAULT;
|
609 |
|
|
return 0;
|
610 |
|
|
|
611 |
|
|
}
|
612 |
|
|
|
613 |
|
|
/* --------------------------------------------------------------------- */
|
614 |
|
|
|
615 |
|
|
const struct hardware_info sm_hw_sbc = {
|
616 |
|
|
"sbc", sizeof(struct sc_state_sbc),
|
617 |
|
|
sbc_open, sbc_close, sbc_ioctl, sbc_sethw
|
618 |
|
|
};
|
619 |
|
|
|
620 |
|
|
/* --------------------------------------------------------------------- */
|
621 |
|
|
|
622 |
|
|
static void setup_dma_fdx_dsp(struct device *dev, struct sm_state *sm)
|
623 |
|
|
{
|
624 |
|
|
unsigned long flags;
|
625 |
|
|
unsigned int isamps, osamps;
|
626 |
|
|
|
627 |
|
|
if (!reset_dsp(dev)) {
|
628 |
|
|
printk(KERN_ERR "%s: sbc: cannot reset sb dsp\n", sm_drvname);
|
629 |
|
|
return;
|
630 |
|
|
}
|
631 |
|
|
save_flags(flags);
|
632 |
|
|
cli();
|
633 |
|
|
sbc_int_ack_8bit(dev);
|
634 |
|
|
sbc_int_ack_16bit(dev);
|
635 |
|
|
/* should eventually change to set rates individually by SBC_SAMPLE_RATE_{IN/OUT} */
|
636 |
|
|
write_dsp(dev, SBC_SAMPLE_RATE_IN);
|
637 |
|
|
write_dsp(dev, SCSTATE->sr[0] >> 8);
|
638 |
|
|
write_dsp(dev, SCSTATE->sr[0] & 0xff);
|
639 |
|
|
write_dsp(dev, SBC_SAMPLE_RATE_OUT);
|
640 |
|
|
write_dsp(dev, SCSTATE->sr[1] >> 8);
|
641 |
|
|
write_dsp(dev, SCSTATE->sr[1] & 0xff);
|
642 |
|
|
write_dsp(dev, SBC_SPEAKER_ON);
|
643 |
|
|
if (sm->dma.o16bit) {
|
644 |
|
|
/*
|
645 |
|
|
* DMA channel 1 (8bit) does input (capture),
|
646 |
|
|
* DMA channel 2 (16bit) does output (playback)
|
647 |
|
|
*/
|
648 |
|
|
isamps = dma_setup(sm, 0, dev->dma) - 1;
|
649 |
|
|
osamps = dma_setup(sm, 1, sm->hdrv.ptt_out.dma2) - 1;
|
650 |
|
|
sbc_int_ack_8bit(dev);
|
651 |
|
|
sbc_int_ack_16bit(dev);
|
652 |
|
|
write_dsp(dev, SBC4_IN8_AI);
|
653 |
|
|
write_dsp(dev, SBC4_MODE_UNS_MONO);
|
654 |
|
|
write_dsp(dev, isamps & 0xff);
|
655 |
|
|
write_dsp(dev, isamps >> 8);
|
656 |
|
|
write_dsp(dev, SBC4_OUT16_AI);
|
657 |
|
|
write_dsp(dev, SBC4_MODE_SIGN_MONO);
|
658 |
|
|
write_dsp(dev, osamps & 0xff);
|
659 |
|
|
write_dsp(dev, osamps >> 8);
|
660 |
|
|
} else {
|
661 |
|
|
/*
|
662 |
|
|
* DMA channel 1 (8bit) does output (playback),
|
663 |
|
|
* DMA channel 2 (16bit) does input (capture)
|
664 |
|
|
*/
|
665 |
|
|
isamps = dma_setup(sm, 0, sm->hdrv.ptt_out.dma2) - 1;
|
666 |
|
|
osamps = dma_setup(sm, 1, dev->dma) - 1;
|
667 |
|
|
sbc_int_ack_8bit(dev);
|
668 |
|
|
sbc_int_ack_16bit(dev);
|
669 |
|
|
write_dsp(dev, SBC4_OUT8_AI);
|
670 |
|
|
write_dsp(dev, SBC4_MODE_UNS_MONO);
|
671 |
|
|
write_dsp(dev, osamps & 0xff);
|
672 |
|
|
write_dsp(dev, osamps >> 8);
|
673 |
|
|
write_dsp(dev, SBC4_IN16_AI);
|
674 |
|
|
write_dsp(dev, SBC4_MODE_SIGN_MONO);
|
675 |
|
|
write_dsp(dev, isamps & 0xff);
|
676 |
|
|
write_dsp(dev, isamps >> 8);
|
677 |
|
|
}
|
678 |
|
|
dma_init_receive(sm);
|
679 |
|
|
dma_init_transmit(sm);
|
680 |
|
|
restore_flags(flags);
|
681 |
|
|
}
|
682 |
|
|
|
683 |
|
|
/* --------------------------------------------------------------------- */
|
684 |
|
|
|
685 |
|
|
static void sbcfdx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
686 |
|
|
{
|
687 |
|
|
struct device *dev = (struct device *)dev_id;
|
688 |
|
|
struct sm_state *sm = (struct sm_state *)dev->priv;
|
689 |
|
|
unsigned char intsrc, pbint = 0, captint = 0;
|
690 |
|
|
unsigned int ocfrag, icfrag;
|
691 |
|
|
unsigned long flags;
|
692 |
|
|
|
693 |
|
|
if (!dev || !sm || sm->hdrv.magic != HDLCDRV_MAGIC)
|
694 |
|
|
return;
|
695 |
|
|
save_flags(flags);
|
696 |
|
|
cli();
|
697 |
|
|
outb(0x82, DSP_MIXER_ADDR(dev->base_addr));
|
698 |
|
|
intsrc = inb(DSP_MIXER_DATA(dev->base_addr));
|
699 |
|
|
if (intsrc & 0x01) {
|
700 |
|
|
sbc_int_ack_8bit(dev);
|
701 |
|
|
if (sm->dma.o16bit) {
|
702 |
|
|
captint = 1;
|
703 |
|
|
disable_dma(dev->dma);
|
704 |
|
|
clear_dma_ff(dev->dma);
|
705 |
|
|
dma_ptr(sm, 0, dev->dma, &icfrag);
|
706 |
|
|
enable_dma(dev->dma);
|
707 |
|
|
} else {
|
708 |
|
|
pbint = 1;
|
709 |
|
|
disable_dma(dev->dma);
|
710 |
|
|
clear_dma_ff(dev->dma);
|
711 |
|
|
dma_ptr(sm, 1, dev->dma, &ocfrag);
|
712 |
|
|
enable_dma(dev->dma);
|
713 |
|
|
}
|
714 |
|
|
}
|
715 |
|
|
if (intsrc & 0x02) {
|
716 |
|
|
sbc_int_ack_16bit(dev);
|
717 |
|
|
if (sm->dma.o16bit) {
|
718 |
|
|
pbint = 1;
|
719 |
|
|
disable_dma(sm->hdrv.ptt_out.dma2);
|
720 |
|
|
clear_dma_ff(sm->hdrv.ptt_out.dma2);
|
721 |
|
|
dma_ptr(sm, 1, sm->hdrv.ptt_out.dma2, &ocfrag);
|
722 |
|
|
enable_dma(sm->hdrv.ptt_out.dma2);
|
723 |
|
|
} else {
|
724 |
|
|
captint = 1;
|
725 |
|
|
disable_dma(sm->hdrv.ptt_out.dma2);
|
726 |
|
|
clear_dma_ff(sm->hdrv.ptt_out.dma2);
|
727 |
|
|
dma_ptr(sm, 0, sm->hdrv.ptt_out.dma2, &icfrag);
|
728 |
|
|
enable_dma(sm->hdrv.ptt_out.dma2);
|
729 |
|
|
}
|
730 |
|
|
}
|
731 |
|
|
restore_flags(flags);
|
732 |
|
|
sm_int_freq(sm);
|
733 |
|
|
sti();
|
734 |
|
|
if (pbint) {
|
735 |
|
|
if (dma_end_transmit(sm, ocfrag))
|
736 |
|
|
dma_clear_transmit(sm);
|
737 |
|
|
dma_transmit(sm);
|
738 |
|
|
}
|
739 |
|
|
if (captint) {
|
740 |
|
|
dma_receive(sm, icfrag);
|
741 |
|
|
hdlcdrv_arbitrate(dev, &sm->hdrv);
|
742 |
|
|
}
|
743 |
|
|
sm_output_status(sm);
|
744 |
|
|
hdlcdrv_transmitter(dev, &sm->hdrv);
|
745 |
|
|
hdlcdrv_receiver(dev, &sm->hdrv);
|
746 |
|
|
}
|
747 |
|
|
|
748 |
|
|
/* --------------------------------------------------------------------- */
|
749 |
|
|
|
750 |
|
|
static int sbcfdx_open(struct device *dev, struct sm_state *sm)
|
751 |
|
|
{
|
752 |
|
|
int err;
|
753 |
|
|
|
754 |
|
|
if (sizeof(sm->m) < sizeof(struct sc_state_sbc)) {
|
755 |
|
|
printk(KERN_ERR "sm sbc: sbc state too big: %d > %d\n",
|
756 |
|
|
sizeof(struct sc_state_sbc), sizeof(sm->m));
|
757 |
|
|
return -ENODEV;
|
758 |
|
|
}
|
759 |
|
|
if (!dev || !sm)
|
760 |
|
|
return -ENXIO;
|
761 |
|
|
if (dev->base_addr <= 0 || dev->base_addr > 0x1000-SBC_EXTENT ||
|
762 |
|
|
dev->irq < 2 || dev->irq > 15 || dev->dma > 3)
|
763 |
|
|
return -ENXIO;
|
764 |
|
|
if (check_region(dev->base_addr, SBC_EXTENT))
|
765 |
|
|
return -EACCES;
|
766 |
|
|
/*
|
767 |
|
|
* check if a card is available
|
768 |
|
|
*/
|
769 |
|
|
if (!reset_dsp(dev)) {
|
770 |
|
|
printk(KERN_ERR "%s: sbc: no card at io address 0x%lx\n",
|
771 |
|
|
sm_drvname, dev->base_addr);
|
772 |
|
|
return -ENODEV;
|
773 |
|
|
}
|
774 |
|
|
write_dsp(dev, SBC_GET_REVISION);
|
775 |
|
|
if (!read_dsp(dev, &SCSTATE->revhi) ||
|
776 |
|
|
!read_dsp(dev, &SCSTATE->revlo))
|
777 |
|
|
return -ENODEV;
|
778 |
|
|
printk(KERN_INFO "%s: SoundBlaster DSP revision %d.%d\n", sm_drvname,
|
779 |
|
|
SCSTATE->revhi, SCSTATE->revlo);
|
780 |
|
|
if (SCSTATE->revhi < 4) {
|
781 |
|
|
printk(KERN_ERR "%s: at least DSP rev 4.00 required\n", sm_drvname);
|
782 |
|
|
return -ENODEV;
|
783 |
|
|
}
|
784 |
|
|
if ((err = config_resources(dev, sm, 1))) {
|
785 |
|
|
printk(KERN_ERR "%s: invalid IRQ and/or DMA specified\n", sm_drvname);
|
786 |
|
|
return err;
|
787 |
|
|
}
|
788 |
|
|
/*
|
789 |
|
|
* initialize some variables
|
790 |
|
|
*/
|
791 |
|
|
if (!(sm->dma.ibuf = kmalloc(sm->dma.ifragsz * (NUM_FRAGMENTS+1), GFP_KERNEL | GFP_DMA)))
|
792 |
|
|
return -ENOMEM;
|
793 |
|
|
if (!(sm->dma.obuf = kmalloc(sm->dma.ofragsz * NUM_FRAGMENTS, GFP_KERNEL | GFP_DMA))) {
|
794 |
|
|
kfree(sm->dma.ibuf);
|
795 |
|
|
return -ENOMEM;
|
796 |
|
|
}
|
797 |
|
|
dma_init_transmit(sm);
|
798 |
|
|
dma_init_receive(sm);
|
799 |
|
|
|
800 |
|
|
memset(&sm->m, 0, sizeof(sm->m));
|
801 |
|
|
memset(&sm->d, 0, sizeof(sm->d));
|
802 |
|
|
if (sm->mode_tx->init)
|
803 |
|
|
sm->mode_tx->init(sm);
|
804 |
|
|
if (sm->mode_rx->init)
|
805 |
|
|
sm->mode_rx->init(sm);
|
806 |
|
|
|
807 |
|
|
if (request_dma(dev->dma, sm->hwdrv->hw_name)) {
|
808 |
|
|
kfree(sm->dma.ibuf);
|
809 |
|
|
kfree(sm->dma.obuf);
|
810 |
|
|
return -EBUSY;
|
811 |
|
|
}
|
812 |
|
|
if (request_dma(sm->hdrv.ptt_out.dma2, sm->hwdrv->hw_name)) {
|
813 |
|
|
kfree(sm->dma.ibuf);
|
814 |
|
|
kfree(sm->dma.obuf);
|
815 |
|
|
free_dma(dev->dma);
|
816 |
|
|
return -EBUSY;
|
817 |
|
|
}
|
818 |
|
|
if (request_irq(dev->irq, sbcfdx_interrupt, SA_INTERRUPT,
|
819 |
|
|
sm->hwdrv->hw_name, dev)) {
|
820 |
|
|
kfree(sm->dma.ibuf);
|
821 |
|
|
kfree(sm->dma.obuf);
|
822 |
|
|
free_dma(dev->dma);
|
823 |
|
|
free_dma(sm->hdrv.ptt_out.dma2);
|
824 |
|
|
return -EBUSY;
|
825 |
|
|
}
|
826 |
|
|
request_region(dev->base_addr, SBC_EXTENT, sm->hwdrv->hw_name);
|
827 |
|
|
setup_dma_fdx_dsp(dev, sm);
|
828 |
|
|
return 0;
|
829 |
|
|
}
|
830 |
|
|
|
831 |
|
|
/* --------------------------------------------------------------------- */
|
832 |
|
|
|
833 |
|
|
static int sbcfdx_close(struct device *dev, struct sm_state *sm)
|
834 |
|
|
{
|
835 |
|
|
if (!dev || !sm)
|
836 |
|
|
return -EINVAL;
|
837 |
|
|
/*
|
838 |
|
|
* disable interrupts
|
839 |
|
|
*/
|
840 |
|
|
disable_dma(dev->dma);
|
841 |
|
|
disable_dma(sm->hdrv.ptt_out.dma2);
|
842 |
|
|
reset_dsp(dev);
|
843 |
|
|
free_irq(dev->irq, dev);
|
844 |
|
|
free_dma(dev->dma);
|
845 |
|
|
free_dma(sm->hdrv.ptt_out.dma2);
|
846 |
|
|
release_region(dev->base_addr, SBC_EXTENT);
|
847 |
|
|
kfree(sm->dma.ibuf);
|
848 |
|
|
kfree(sm->dma.obuf);
|
849 |
|
|
return 0;
|
850 |
|
|
}
|
851 |
|
|
|
852 |
|
|
/* --------------------------------------------------------------------- */
|
853 |
|
|
|
854 |
|
|
static int sbcfdx_sethw(struct device *dev, struct sm_state *sm, char *mode)
|
855 |
|
|
{
|
856 |
|
|
char *cp = strchr(mode, '.');
|
857 |
|
|
const struct modem_tx_info **mtp = sm_modem_tx_table;
|
858 |
|
|
const struct modem_rx_info **mrp;
|
859 |
|
|
|
860 |
|
|
if (!strcmp(mode, "off")) {
|
861 |
|
|
sm->mode_tx = NULL;
|
862 |
|
|
sm->mode_rx = NULL;
|
863 |
|
|
return 0;
|
864 |
|
|
}
|
865 |
|
|
if (cp)
|
866 |
|
|
*cp++ = '\0';
|
867 |
|
|
else
|
868 |
|
|
cp = mode;
|
869 |
|
|
for (; *mtp; mtp++) {
|
870 |
|
|
if ((*mtp)->loc_storage > sizeof(sm->m)) {
|
871 |
|
|
printk(KERN_ERR "%s: insufficient storage for modulator %s (%d)\n",
|
872 |
|
|
sm_drvname, (*mtp)->name, (*mtp)->loc_storage);
|
873 |
|
|
continue;
|
874 |
|
|
}
|
875 |
|
|
if (!(*mtp)->name || strcmp((*mtp)->name, mode))
|
876 |
|
|
continue;
|
877 |
|
|
if ((*mtp)->srate < 5000 || (*mtp)->srate > 44100)
|
878 |
|
|
continue;
|
879 |
|
|
for (mrp = sm_modem_rx_table; *mrp; mrp++) {
|
880 |
|
|
if ((*mrp)->loc_storage > sizeof(sm->d)) {
|
881 |
|
|
printk(KERN_ERR "%s: insufficient storage for demodulator %s (%d)\n",
|
882 |
|
|
sm_drvname, (*mrp)->name, (*mrp)->loc_storage);
|
883 |
|
|
continue;
|
884 |
|
|
}
|
885 |
|
|
if ((*mrp)->name && !strcmp((*mrp)->name, cp) &&
|
886 |
|
|
(*mtp)->srate >= 5000 && (*mtp)->srate <= 44100 &&
|
887 |
|
|
(*mrp)->srate == (*mtp)->srate) {
|
888 |
|
|
sm->mode_tx = *mtp;
|
889 |
|
|
sm->mode_rx = *mrp;
|
890 |
|
|
SCSTATE->sr[0] = sm->mode_rx->srate;
|
891 |
|
|
SCSTATE->sr[1] = sm->mode_tx->srate;
|
892 |
|
|
sm->dma.ifragsz = (sm->mode_rx->srate + 50)/100;
|
893 |
|
|
sm->dma.ofragsz = (sm->mode_tx->srate + 50)/100;
|
894 |
|
|
if (sm->dma.ifragsz < sm->mode_rx->overlap)
|
895 |
|
|
sm->dma.ifragsz = sm->mode_rx->overlap;
|
896 |
|
|
if (sm->mode_rx->demodulator_s16 && sm->mode_tx->modulator_u8) {
|
897 |
|
|
sm->dma.i16bit = 1;
|
898 |
|
|
sm->dma.o16bit = 0;
|
899 |
|
|
sm->dma.ifragsz <<= 1;
|
900 |
|
|
} else if (sm->mode_rx->demodulator_u8 && sm->mode_tx->modulator_s16) {
|
901 |
|
|
sm->dma.i16bit = 0;
|
902 |
|
|
sm->dma.o16bit = 1;
|
903 |
|
|
sm->dma.ofragsz <<= 1;
|
904 |
|
|
} else {
|
905 |
|
|
printk(KERN_INFO "%s: mode %s or %s unusable\n", sm_drvname,
|
906 |
|
|
sm->mode_rx->name, sm->mode_tx->name);
|
907 |
|
|
sm->mode_tx = NULL;
|
908 |
|
|
sm->mode_rx = NULL;
|
909 |
|
|
return -EINVAL;
|
910 |
|
|
}
|
911 |
|
|
return 0;
|
912 |
|
|
}
|
913 |
|
|
}
|
914 |
|
|
}
|
915 |
|
|
return -EINVAL;
|
916 |
|
|
}
|
917 |
|
|
|
918 |
|
|
/* --------------------------------------------------------------------- */
|
919 |
|
|
|
920 |
|
|
static int sbcfdx_ioctl(struct device *dev, struct sm_state *sm, struct ifreq *ifr,
|
921 |
|
|
struct hdlcdrv_ioctl *hi, int cmd)
|
922 |
|
|
{
|
923 |
|
|
if (cmd != SIOCDEVPRIVATE)
|
924 |
|
|
return -ENOIOCTLCMD;
|
925 |
|
|
|
926 |
|
|
if (hi->cmd == HDLCDRVCTL_MODEMPARMASK)
|
927 |
|
|
return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ |
|
928 |
|
|
HDLCDRV_PARMASK_DMA | HDLCDRV_PARMASK_DMA2 | HDLCDRV_PARMASK_SERIOBASE |
|
929 |
|
|
HDLCDRV_PARMASK_PARIOBASE | HDLCDRV_PARMASK_MIDIIOBASE;
|
930 |
|
|
|
931 |
|
|
return sbc_ioctl(dev, sm, ifr, hi, cmd);
|
932 |
|
|
}
|
933 |
|
|
|
934 |
|
|
/* --------------------------------------------------------------------- */
|
935 |
|
|
|
936 |
|
|
const struct hardware_info sm_hw_sbcfdx = {
|
937 |
|
|
"sbcfdx", sizeof(struct sc_state_sbc),
|
938 |
|
|
sbcfdx_open, sbcfdx_close, sbcfdx_ioctl, sbcfdx_sethw
|
939 |
|
|
};
|
940 |
|
|
|
941 |
|
|
/* --------------------------------------------------------------------- */
|