| 1 |
1626 |
jcastillo |
/*+M*************************************************************************
|
| 2 |
|
|
* Perceptive Solutions, Inc. PCI-2000 device driver proc support for Linux.
|
| 3 |
|
|
*
|
| 4 |
|
|
* Copyright (c) 1997 Perceptive Solutions, Inc.
|
| 5 |
|
|
*
|
| 6 |
|
|
* This program is free software; you can redistribute it and/or modify
|
| 7 |
|
|
* it under the terms of the GNU General Public License as published by
|
| 8 |
|
|
* the Free Software Foundation; either version 2, or (at your option)
|
| 9 |
|
|
* any later version.
|
| 10 |
|
|
*
|
| 11 |
|
|
* This program is distributed in the hope that it will be useful,
|
| 12 |
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 13 |
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
| 14 |
|
|
* GNU General Public License for more details.
|
| 15 |
|
|
*
|
| 16 |
|
|
* You should have received a copy of the GNU General Public License
|
| 17 |
|
|
* along with this program; see the file COPYING. If not, write to
|
| 18 |
|
|
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
|
| 19 |
|
|
*
|
| 20 |
|
|
*
|
| 21 |
|
|
* File Name: psi_dale.h
|
| 22 |
|
|
*
|
| 23 |
|
|
* Description: This file contains the interface defines and
|
| 24 |
|
|
* error codes.
|
| 25 |
|
|
*
|
| 26 |
|
|
*-M*************************************************************************/
|
| 27 |
|
|
|
| 28 |
|
|
#ifndef PSI_DALE
|
| 29 |
|
|
#define PSI_DALE
|
| 30 |
|
|
|
| 31 |
|
|
/************************************************/
|
| 32 |
|
|
/* Dale PCI setup */
|
| 33 |
|
|
/************************************************/
|
| 34 |
|
|
#define VENDOR_PSI 0x1256
|
| 35 |
|
|
#define DEVICE_DALE_1 0x4401 /* 'D1' */
|
| 36 |
|
|
|
| 37 |
|
|
/************************************************/
|
| 38 |
|
|
/* Misc konstants */
|
| 39 |
|
|
/************************************************/
|
| 40 |
|
|
#define DALE_MAXDRIVES 4
|
| 41 |
|
|
#define SECTORSXFER 8
|
| 42 |
|
|
#define BYTES_PER_SECTOR 512
|
| 43 |
|
|
#define DEFAULT_TIMING_MODE 5
|
| 44 |
|
|
|
| 45 |
|
|
/************************************************/
|
| 46 |
|
|
/* EEPROM locations */
|
| 47 |
|
|
/************************************************/
|
| 48 |
|
|
#define DALE_FLASH_PAGE_SIZE 128 // number of bytes per page
|
| 49 |
|
|
#define DALE_FLASH_SIZE 65536L
|
| 50 |
|
|
|
| 51 |
|
|
#define DALE_FLASH_BIOS 0x00080000L // BIOS base address
|
| 52 |
|
|
#define DALE_FLASH_SETUP 0x00088000L // SETUP PROGRAM base address offset from BIOS
|
| 53 |
|
|
#define DALE_FLASH_RAID 0x00088400L // RAID signature storage
|
| 54 |
|
|
#define DALE_FLASH_FACTORY 0x00089000L // FACTORY data base address offset from BIOS
|
| 55 |
|
|
|
| 56 |
|
|
#define DALE_FLASH_BIOS_SIZE 32768U // size of FLASH BIOS REGION
|
| 57 |
|
|
|
| 58 |
|
|
/************************************************/
|
| 59 |
|
|
/* DALE Register address offsets */
|
| 60 |
|
|
/************************************************/
|
| 61 |
|
|
#define REG_DATA 0x80
|
| 62 |
|
|
#define REG_ERROR 0x84
|
| 63 |
|
|
#define REG_SECTOR_COUNT 0x88
|
| 64 |
|
|
#define REG_LBA_0 0x8C
|
| 65 |
|
|
#define REG_LBA_8 0x90
|
| 66 |
|
|
#define REG_LBA_16 0x94
|
| 67 |
|
|
#define REG_LBA_24 0x98
|
| 68 |
|
|
#define REG_STAT_CMD 0x9C
|
| 69 |
|
|
#define REG_STAT_SEL 0xA0
|
| 70 |
|
|
#define REG_FAIL 0xB0
|
| 71 |
|
|
#define REG_ALT_STAT 0xB8
|
| 72 |
|
|
#define REG_DRIVE_ADRS 0xBC
|
| 73 |
|
|
|
| 74 |
|
|
#define DALE_DATA_SLOW 0x00040000L
|
| 75 |
|
|
#define DALE_DATA_MODE2 0x00040000L
|
| 76 |
|
|
#define DALE_DATA_MODE3 0x00050000L
|
| 77 |
|
|
#define DALE_DATA_MODE4 0x00060000L
|
| 78 |
|
|
#define DALE_DATA_MODE4P 0x00070000L
|
| 79 |
|
|
|
| 80 |
|
|
#define RTR_LOCAL_RANGE 0x000
|
| 81 |
|
|
#define RTR_LOCAL_REMAP 0x004
|
| 82 |
|
|
#define RTR_EXP_RANGE 0x010
|
| 83 |
|
|
#define RTR_EXP_REMAP 0x014
|
| 84 |
|
|
#define RTR_REGIONS 0x018
|
| 85 |
|
|
#define RTR_DM_MASK 0x01C
|
| 86 |
|
|
#define RTR_DM_LOCAL_BASE 0x020
|
| 87 |
|
|
#define RTR_DM_IO_BASE 0x024
|
| 88 |
|
|
#define RTR_DM_PCI_REMAP 0x028
|
| 89 |
|
|
#define RTR_DM_IO_CONFIG 0x02C
|
| 90 |
|
|
#define RTR_MAILBOX 0x040
|
| 91 |
|
|
#define RTR_LOCAL_DOORBELL 0x060
|
| 92 |
|
|
#define RTR_PCI_DOORBELL 0x064
|
| 93 |
|
|
#define RTR_INT_CONTROL_STATUS 0x068
|
| 94 |
|
|
#define RTR_EEPROM_CONTROL_STATUS 0x06C
|
| 95 |
|
|
|
| 96 |
|
|
#define RTL_DMA0_MODE 0x00
|
| 97 |
|
|
#define RTL_DMA0_PCI_ADDR 0x04
|
| 98 |
|
|
#define RTL_DMA0_LOCAL_ADDR 0x08
|
| 99 |
|
|
#define RTL_DMA0_COUNT 0x0C
|
| 100 |
|
|
#define RTL_DMA0_DESC_PTR 0x10
|
| 101 |
|
|
#define RTL_DMA1_MODE 0x14
|
| 102 |
|
|
#define RTL_DMA1_PCI_ADDR 0x18
|
| 103 |
|
|
#define RTL_DMA1_LOCAL_ADDR 0x1C
|
| 104 |
|
|
#define RTL_DMA1_COUNT 0x20
|
| 105 |
|
|
#define RTL_DMA1_DESC_PTR 0x24
|
| 106 |
|
|
#define RTL_DMA_COMMAND_STATUS 0x28
|
| 107 |
|
|
#define RTL_DMA_ARB0 0x2C
|
| 108 |
|
|
#define RTL_DMA_ARB1 0x30
|
| 109 |
|
|
|
| 110 |
|
|
/************************************************/
|
| 111 |
|
|
/* Dale Scratchpad locations */
|
| 112 |
|
|
/************************************************/
|
| 113 |
|
|
#define DALE_CHANNEL_DEVICE_0 0 // device channel locations
|
| 114 |
|
|
#define DALE_CHANNEL_DEVICE_1 1
|
| 115 |
|
|
#define DALE_CHANNEL_DEVICE_2 2
|
| 116 |
|
|
#define DALE_CHANNEL_DEVICE_3 3
|
| 117 |
|
|
|
| 118 |
|
|
#define DALE_SCRATH_DEVICE_0 4 // device type codes
|
| 119 |
|
|
#define DALE_SCRATH_DEVICE_1 5
|
| 120 |
|
|
#define DALE_SCRATH_DEVICE_2 6
|
| 121 |
|
|
#define DALE_SCRATH_DEVICE_3 7
|
| 122 |
|
|
|
| 123 |
|
|
#define DALE_RAID_0_STATUS 8
|
| 124 |
|
|
#define DALE_RAID_1_STATUS 9
|
| 125 |
|
|
|
| 126 |
|
|
#define DALE_TIMING_MODE 12 // bus master timing mode (2, 3, 4, 5)
|
| 127 |
|
|
#define DALE_NUM_DRIVES 13 // number of addressable drives on this board
|
| 128 |
|
|
#define DALE_RAID_ON 14 // RAID status On
|
| 129 |
|
|
#define DALE_LAST_ERROR 15 // Last error code from BIOS
|
| 130 |
|
|
|
| 131 |
|
|
/************************************************/
|
| 132 |
|
|
/* Dale cable select bits */
|
| 133 |
|
|
/************************************************/
|
| 134 |
|
|
#define SEL_NONE 0x00
|
| 135 |
|
|
#define SEL_1 0x01
|
| 136 |
|
|
#define SEL_2 0x02
|
| 137 |
|
|
|
| 138 |
|
|
/************************************************/
|
| 139 |
|
|
/* Programmable Interrupt Controller */
|
| 140 |
|
|
/************************************************/
|
| 141 |
|
|
#define PIC1 0x20 // first 8259 base port address
|
| 142 |
|
|
#define PIC2 0xA0 // second 8259 base port address
|
| 143 |
|
|
#define INT_OCW1 1 // Operation Control Word 1: IRQ mask
|
| 144 |
|
|
#define EOI 0x20 // non-specific end-of-interrupt
|
| 145 |
|
|
|
| 146 |
|
|
/************************************************/
|
| 147 |
|
|
/* Device/Geometry controls */
|
| 148 |
|
|
/************************************************/
|
| 149 |
|
|
#define GEOMETRY_NONE 0x0 // No device
|
| 150 |
|
|
#define GEOMETRY_SET 0x1 // Geometry set
|
| 151 |
|
|
#define GEOMETRY_LBA 0x2 // Geometry set in default LBA mode
|
| 152 |
|
|
#define GEOMETRY_PHOENIX 0x3 // Geometry set in Pheonix BIOS compatibility mode
|
| 153 |
|
|
|
| 154 |
|
|
#define DEVICE_NONE 0x0 // No device present
|
| 155 |
|
|
#define DEVICE_INACTIVE 0x1 // device present but not registered active
|
| 156 |
|
|
#define DEVICE_ATAPI 0x2 // ATAPI device (CD_ROM, Tape, Etc...)
|
| 157 |
|
|
#define DEVICE_DASD_NONLBA 0x3 // Non LBA incompatible device
|
| 158 |
|
|
#define DEVICE_DASD_LBA 0x4 // LBA compatible device
|
| 159 |
|
|
|
| 160 |
|
|
/************************************************/
|
| 161 |
|
|
/* Setup Structure Definitions */
|
| 162 |
|
|
/************************************************/
|
| 163 |
|
|
typedef struct // device setup parameters
|
| 164 |
|
|
{
|
| 165 |
|
|
UCHAR geometryControl; // geometry control flags
|
| 166 |
|
|
UCHAR device; // device code
|
| 167 |
|
|
USHORT sectors; // number of sectors per track
|
| 168 |
|
|
USHORT heads; // number of heads
|
| 169 |
|
|
USHORT cylinders; // number of cylinders for this device
|
| 170 |
|
|
ULONG blocks; // number of blocks on device
|
| 171 |
|
|
ULONG realCapacity; // number of real blocks on this device for drive changed testing
|
| 172 |
|
|
} SETUP_DEVICE, *PSETUP_DEVICE;
|
| 173 |
|
|
|
| 174 |
|
|
typedef struct // master setup structure
|
| 175 |
|
|
{
|
| 176 |
|
|
USHORT startupDelay;
|
| 177 |
|
|
BOOL promptBIOS;
|
| 178 |
|
|
BOOL fastFormat;
|
| 179 |
|
|
BOOL shareInterrupt;
|
| 180 |
|
|
BOOL rebootRebuil;
|
| 181 |
|
|
USHORT timingMode;
|
| 182 |
|
|
USHORT spare5;
|
| 183 |
|
|
USHORT spare6;
|
| 184 |
|
|
SETUP_DEVICE setupDevice[4];
|
| 185 |
|
|
} SETUP, *PSETUP;
|
| 186 |
|
|
|
| 187 |
|
|
#endif
|
