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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [sound/] [mad16.c] - Blame information for rev 1765

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/*
 * Copyright (C) by Hannu Savolainen 1993-1996
 *
 * USS/Lite for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
 * Version 2 (June 1991). See the "COPYING" file distributed with this software
 * for more info.
 */
#include <linux/config.h>
 
/*
 * sound/mad16.c
 *
 * Initialization code for OPTi MAD16 compatible audio chips. Including
 *
 *      OPTi 82C928     MAD16           (replaced by C929)
 *      OAK OTI-601D    Mozart
 *      OPTi 82C929     MAD16 Pro
 *      OPTi 82C930
 *
 * These audio interface chips don't produce sound themselves. They just
 * connect some other components (OPL-[234] and a WSS compatible codec)
 * to the PC bus and perform I/O, DMA and IRQ address decoding. There is
 * also a UART for the MPU-401 mode (not 82C928/Mozart).
 * The Mozart chip appears to be compatible with the 82C928 (can anybody
 * confirm this?).
 *
 * NOTE! If you want to set CD-ROM address and/or joystick enable, define
 *       MAD16_CONF in local.h as combination of the following bits:
 *
 *      0x01    - joystick disabled
 *
 *      CD-ROM type selection (select just one):
 *      0x00    - none
 *      0x02    - Sony 31A
 *      0x04    - Mitsumi
 *      0x06    - Panasonic (type "LaserMate", not "Sound Blaster")
 *      0x08    - Secondary IDE (address 0x170)
 *      0x0a    - Primary IDE (address 0x1F0)
 *
 *      For example Mitsumi with joystick disabled = 0x04|0x01 = 0x05
 *      For example LaserMate (for use with sbpcd) plus joystick = 0x06
 *
 *    MAD16_CDSEL:
 *      This defaults to CD I/O 0x340, no IRQ and DMA3
 *      (DMA5 with Mitsumi or IDE). If you like to change these, define
 *      MAD16_CDSEL with the following bits:
 *
 *      CD-ROM port: 0x00=340, 0x40=330, 0x80=360 or 0xc0=320
 *      OPL4 select: 0x20=OPL4, 0x00=OPL3
 *      CD-ROM irq: 0x00=disabled, 0x04=IRQ5, 0x08=IRQ7, 0x0a=IRQ3, 0x10=IRQ9,
 *                  0x14=IRQ10 and 0x18=IRQ11.
 *
 *      CD-ROM DMA (Sony or Panasonic): 0x00=DMA3, 0x01=DMA2, 0x02=DMA1 or 0x03=disabled
 *   or
 *      CD-ROM DMA (Mitsumi or IDE):    0x00=DMA5, 0x01=DMA6, 0x02=DMA7 or 0x03=disabled
 *
 *      For use with sbpcd, address 0x340, set MAD16_CDSEL to 0x03 or 0x23.
 */
 
#include "sound_config.h"
 
#if defined(CONFIG_MAD16)
 
#include "sb.h"
 
static int      already_initialized = 0;
 
#define C928    1
#define MOZART  2
#define C929    3
#define C930    4
 
/*
 *    Registers
 *
 *      The MAD16 occupies I/O ports 0xf8d to 0xf93 (fixed locations).
 *      All ports are inactive by default. They can be activated by
 *      writing 0xE2 or 0xE3 to the password register. The password is valid
 *      only until the next I/O read or write.
 *
 *      82C930 uses 0xE4 as the password and indirect addressing to access
 *      the config registers.
 */
 
#define MC0_PORT        0xf8c   /* Dummy port */
#define MC1_PORT        0xf8d   /* SB address, CD-ROM interface type, joystick */
#define MC2_PORT        0xf8e   /* CD-ROM address, IRQ, DMA, plus OPL4 bit */
#define MC3_PORT        0xf8f
#define PASSWD_REG      0xf8f
#define MC4_PORT        0xf90
#define MC5_PORT        0xf91
#define MC6_PORT        0xf92
#define MC7_PORT        0xf93
#define MC8_PORT        0xf94
#define MC9_PORT        0xf95
#define MC10_PORT       0xf96
#define MC11_PORT       0xf97
#define MC12_PORT       0xf98
 
static int      board_type = C928;
 
static int     *mad16_osp;
 
#ifndef DDB
#define DDB(x)
#endif
 
static unsigned char
mad_read (int port)
{
  unsigned long   flags;
  unsigned char   tmp;
 
  save_flags (flags);
  cli ();
 
  switch (board_type)           /* Output password */
    {
    case C928:
    case MOZART:
      outb (0xE2, PASSWD_REG);
      break;
 
    case C929:
      outb (0xE3, PASSWD_REG);
      break;
 
    case C930:
      /* outb( 0xE4,  PASSWD_REG); */
      break;
    }
 
  if (board_type == C930)
    {
      outb (port - MC0_PORT, 0xe0e);    /* Write to index reg */
      tmp = inb (0xe0f);        /* Read from data reg */
    }
  else
    tmp = inb (port);
  restore_flags (flags);
 
  return tmp;
}
 
static void
mad_write (int port, int value)
{
  unsigned long   flags;
 
  save_flags (flags);
  cli ();
 
  switch (board_type)           /* Output password */
    {
    case C928:
    case MOZART:
      outb (0xE2, PASSWD_REG);
      break;
 
    case C929:
      outb (0xE3, PASSWD_REG);
      break;
 
    case C930:
      /* outb( 0xE4,  PASSWD_REG); */
      break;
    }
 
  if (board_type == C930)
    {
      outb (port - MC0_PORT, 0xe0e);    /* Write to index reg */
      outb ((unsigned char) (value & 0xff), 0xe0f);
    }
  else
    outb ((unsigned char) (value & 0xff), port);
  restore_flags (flags);
}
 
static int
detect_c930 (void)
{
  unsigned char   tmp = mad_read (MC1_PORT);
 
  if ((tmp & 0x06) != 0x06)
    {
      DDB (printk ("Wrong C930 signature (%x)\n", tmp));
      /* return 0; */
    }
 
  mad_write (MC1_PORT, 0);
 
  if (mad_read (MC1_PORT) != 0x06)
    {
      DDB (printk ("Wrong C930 signature2 (%x)\n", tmp));
      /* return 0; */
    }
 
  mad_write (MC1_PORT, tmp);    /* Restore bits */
 
  mad_write (MC7_PORT, 0);
  if ((tmp = mad_read (MC7_PORT)) != 0)
    {
      DDB (printk ("MC7 not writable (%x)\n", tmp));
      return 0;
    }
 
  mad_write (MC7_PORT, 0xcb);
  if ((tmp = mad_read (MC7_PORT)) != 0xcb)
    {
      DDB (printk ("MC7 not writable2 (%x)\n", tmp));
      return 0;
    }
 
  return 1;
}
 
static int
detect_mad16 (void)
{
  unsigned char   tmp, tmp2;
  int             i;
 
/*
 * Check that reading a register doesn't return bus float (0xff)
 * when the card is accessed using password. This may fail in case
 * the card is in low power mode. Normally at least the power saving mode
 * bit should be 0.
 */
  if ((tmp = mad_read (MC1_PORT)) == 0xff)
    {
      DDB (printk ("MC1_PORT returned 0xff\n"));
      return 0;
    }
 
  for (i = 0xf8d; i <= 0xf98; i++)
    DDB (printk ("Port %0x (init value) = %0x\n", i, mad_read (i)));
 
  if (board_type == C930)
    return detect_c930 ();
/*
 * Now check that the gate is closed on first I/O after writing
 * the password. (This is how a MAD16 compatible card works).
 */
 
  if ((tmp2 = inb (MC1_PORT)) == tmp)   /* It didn't close */
    {
      DDB (printk ("MC1_PORT didn't close after read (0x%02x)\n", tmp2));
      return 0;
    }
 
  mad_write (MC1_PORT, tmp ^ 0x80);     /* Toggle a bit */
  if ((tmp2 = mad_read (MC1_PORT)) != (tmp ^ 0x80))     /* Compare the bit */
    {
      mad_write (MC1_PORT, tmp);        /* Restore */
      DDB (printk ("Bit revert test failed (0x%02x, 0x%02x)\n", tmp, tmp2));
      return 0;
    }
 
  mad_write (MC1_PORT, tmp);    /* Restore */
  return 1;                     /* Bingo */
 
}
 
static int
wss_init (struct address_info *hw_config)
{
  int             ad_flags = 0;
 
/*
 *    Verify the WSS parameters
 */
 
  if (check_region (hw_config->io_base, 8))
    {
      printk ("MSS: I/O port conflict\n");
      return 0;
    }
 
  if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))
    return 0;
  /*
     * Check if the IO port returns valid signature. The original MS Sound
     * system returns 0x04 while some cards (AudioTrix Pro for example)
     * return 0x00.
   */
 
  if ((inb (hw_config->io_base + 3) & 0x3f) != 0x04 &&
      (inb (hw_config->io_base + 3) & 0x3f) != 0x00)
    {
      DDB (printk ("No MSS signature detected on port 0x%x (0x%x)\n",
                   hw_config->io_base, inb (hw_config->io_base + 3)));
      return 0;
    }
 
  if (hw_config->irq > 11)
    {
      printk ("MSS: Bad IRQ %d\n", hw_config->irq);
      return 0;
    }
 
  if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)
    {
      printk ("MSS: Bad DMA %d\n", hw_config->dma);
      return 0;
    }
 
  /*
     * Check that DMA0 is not in use with a 8 bit board.
   */
 
  if (hw_config->dma == 0 && inb (hw_config->io_base + 3) & 0x80)
    {
      printk ("MSS: Can't use DMA0 with a 8 bit card/slot\n");
      return 0;
    }
 
  if (hw_config->irq > 7 && hw_config->irq != 9 && inb (hw_config->io_base + 3) & 0x80)
    {
      printk ("MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
    }
 
  return 1;
}
 
static int
init_c930 (struct address_info *hw_config)
{
  unsigned char   cfg;
 
  cfg = (mad_read (MC1_PORT) & ~0x30);
  /* mad_write(MC1_PORT, 0); */
 
  switch (hw_config->io_base)
    {
    case 0x530:
      cfg |= 0x00;
      break;
    case 0xe80:
      cfg |= 0x10;
      break;
    case 0xf40:
      cfg |= 0x20;
      break;
    case 0x604:
      cfg |= 0x30;
      break;
 
    default:
      printk ("MAD16: Invalid codec port %x\n", hw_config->io_base);
      return 0;
    }
  mad_write (MC1_PORT, cfg);
 
  /* MC2 is CD configuration. Don't touch it. */
 
  mad_write (MC3_PORT, 0);       /* Disable SB mode IRQ and DMA */
 
  mad_write (MC4_PORT, 0x52);   /* ??? */
  mad_write (MC5_PORT, 0x3D);   /* Init it into mode2 */
  mad_write (MC6_PORT, 0x02);   /* Enable WSS, Disable MPU and SB */
  mad_write (MC7_PORT, 0xCB);
  mad_write (MC10_PORT, 0x11);
 
  if (!wss_init (hw_config))
    return 0;
 
/*
 * A temporary kludge which drops the device back to mode1.
 * This removes problems with interrupts but disables full duplex.
 * A better solution should be introduced later.
 */
  mad_write (MC5_PORT, 0x1D);   /* Disable mode2 */
  return wss_init (hw_config);
}
 
int
probe_mad16 (struct address_info *hw_config)
{
  int             i;
  static int      valid_ports[] =
  {0x530, 0xe80, 0xf40, 0x604};
  unsigned char   tmp;
  unsigned char   cs4231_mode = 0;
 
  int             ad_flags = 0;
 
  if (already_initialized)
    return 0;
 
  mad16_osp = hw_config->osp;
/*
 *    Check that all ports return 0xff (bus float) when no password
 *      is written to the password register.
 */
 
  DDB (printk ("--- Detecting MAD16 / Mozart ---\n"));
 
 
/*
 *    Then try to detect with the old password
 */
  board_type = C928;
 
  DDB (printk ("Detect using password = 0xE2\n"));
 
  if (!detect_mad16 ())         /* No luck. Try different model */
    {
      board_type = C929;
 
      DDB (printk ("Detect using password = 0xE3\n"));
 
      if (!detect_mad16 ())
        {
          if (inb (PASSWD_REG) != 0xff)
            return 0;
 
/*
 * First relocate MC# registers to 0xe0e/0xe0f, disable password
 */
 
          outb (0xE4, PASSWD_REG);
          outb (0x80, PASSWD_REG);
 
          board_type = C930;
 
          DDB (printk ("Detect using password = 0xE4\n"));
 
          for (i = 0xf8d; i <= 0xf93; i++)
            DDB (printk ("port %03x = %02x\n", i, mad_read (i)));
 
          if (!detect_mad16 ())
            return 0;
 
          DDB (printk ("mad16.c: 82C930 detected\n"));
          return init_c930 (hw_config);
        }
      else
        {
          DDB (printk ("mad16.c: 82C929 detected\n"));
        }
    }
  else
    {
      unsigned char   model;
 
      if (((model = mad_read (MC3_PORT)) & 0x03) == 0x03)
        {
          DDB (printk ("mad16.c: Mozart detected\n"));
          board_type = MOZART;
        }
      else
        {
          DDB (printk ("mad16.c: 82C928 detected???\n"));
          board_type = C928;
        }
    }
 
  for (i = 0xf8d; i <= 0xf93; i++)
    DDB (printk ("port %03x = %02x\n", i, mad_read (i)));
 
/*
 * Set the WSS address
 */
 
  tmp = 0x80;                   /* Enable WSS, Disable SB */
 
  for (i = 0; i < 5; i++)
    {
      if (i > 3)                /* Not a valid port */
        {
          printk ("MAD16/Mozart: Bad WSS base address 0x%x\n", hw_config->io_base);
          return 0;
        }
 
      if (valid_ports[i] == hw_config->io_base)
        {
          tmp |= i << 4;        /* WSS port select bits */
          break;
        }
    }
 
/*
 * Set optional CD-ROM and joystick settings.
 */
 
#ifdef MAD16_CONF
  tmp |= ((MAD16_CONF) & 0x0f); /* CD-ROM and joystick bits */
#endif
  mad_write (MC1_PORT, tmp);
 
#if defined(MAD16_CONF) && defined(MAD16_CDSEL)
  tmp = MAD16_CDSEL;
#else
  tmp = 0x03;
#endif
 
#ifdef MAD16_OPL4
  tmp |= 0x20;                  /* Enable OPL4 access */
#endif
 
  mad_write (MC2_PORT, tmp);
  mad_write (MC3_PORT, 0xf0);   /* Disable SB */
 
  if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))
    return 0;
 
  if (ad_flags & (AD_F_CS4231 | AD_F_CS4248))
    cs4231_mode = 0x02;         /* CS4248/CS4231 sync delay switch */
 
  if (board_type == C929)
    {
      mad_write (MC4_PORT, 0xa2);
      mad_write (MC5_PORT, 0xA5 | cs4231_mode);
      mad_write (MC6_PORT, 0x03);       /* Disable MPU401 */
    }
  else
    {
      mad_write (MC4_PORT, 0x02);
      mad_write (MC5_PORT, 0x30 | cs4231_mode);
    }
 
  for (i = 0xf8d; i <= 0xf93; i++)
    DDB (printk ("port %03x after init = %02x\n", i, mad_read (i)));
 
  wss_init (hw_config);
 
  return 1;
}
 
void
attach_mad16 (struct address_info *hw_config)
{
 
  static char     interrupt_bits[12] =
  {
    -1, -1, -1, -1, -1, -1, -1, 0x08, -1, 0x10, 0x18, 0x20
  };
  char            bits;
 
  static char     dma_bits[4] =
  {
    1, 2, 0, 3
  };
 
  int             config_port = hw_config->io_base + 0, version_port = hw_config->io_base + 3;
  int             ad_flags = 0, dma = hw_config->dma, dma2 = hw_config->dma2;
  unsigned char   dma2_bit = 0;
 
  already_initialized = 1;
 
  if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))
    return;
 
  /*
     * Set the IRQ and DMA addresses.
   */
 
  bits = interrupt_bits[hw_config->irq];
  if (bits == -1)
    return;
 
  outb (bits | 0x40, config_port);
  if ((inb (version_port) & 0x40) == 0)
    printk ("[IRQ Conflict?]");
 
/*
 * Handle the capture DMA channel
 */
 
  if (ad_flags & AD_F_CS4231 && dma2 != -1 && dma2 != dma)
    {
      if (!((dma == 0 && dma2 == 1) ||
            (dma == 1 && dma2 == 0) ||
            (dma == 3 && dma2 == 0)))
        {                       /* Unsupported combination. Try to swap channels */
          int             tmp = dma;
 
          dma = dma2;
          dma2 = tmp;
        }
 
      if ((dma == 0 && dma2 == 1) ||
          (dma == 1 && dma2 == 0) ||
          (dma == 3 && dma2 == 0))
        {
          dma2_bit = 0x04;      /* Enable capture DMA */
        }
      else
        {
          printk ("MAD16: Invalid capture DMA\n");
          dma2 = dma;
        }
    }
  else
    dma2 = dma;
 
  outb (bits | dma_bits[dma] | dma2_bit, config_port);  /* Write IRQ+DMA setup */
 
  ad1848_init ("MAD16 WSS", hw_config->io_base + 4,
               hw_config->irq,
               dma,
               dma2, 0,
               hw_config->osp);
  request_region (hw_config->io_base, 4, "MAD16 WSS config");
}
 
void
attach_mad16_mpu (struct address_info *hw_config)
{
  if (board_type < C929)        /* Early chip. No MPU support. Just SB MIDI */
    {
#ifdef CONFIG_MIDI
 
      if (mad_read (MC1_PORT) & 0x20)
        hw_config->io_base = 0x240;
      else
        hw_config->io_base = 0x220;
 
      hw_config->name = "Mad16/Mozart";
      sb_dsp_init (hw_config);
#endif
 
      return;
    }
 
#if defined(CONFIG_UART401) && defined(CONFIG_MIDI)
  if (!already_initialized)
    return;
 
  hw_config->driver_use_1 = SB_MIDI_ONLY;
  hw_config->name = "Mad16/Mozart";
  attach_uart401 (hw_config);
#endif
}
 
int
probe_mad16_mpu (struct address_info *hw_config)
{
#if defined(CONFIG_UART401) && defined(CONFIG_MIDI)
  static int      mpu_attached = 0;
  static int      valid_ports[] =
  {0x330, 0x320, 0x310, 0x300};
  static short    valid_irqs[] =
  {9, 10, 5, 7};
  unsigned char   tmp;
 
  int             i;            /* A variable with secret power */
 
  if (!already_initialized)     /* The MSS port must be initialized first */
    return 0;
 
  if (mpu_attached)             /* Don't let them call this twice */
    return 0;
  mpu_attached = 1;
 
  if (board_type < C929)        /* Early chip. No MPU support. Just SB MIDI */
    {
 
#ifdef CONFIG_MIDI
      unsigned char   tmp;
 
      tmp = mad_read (MC3_PORT);
 
      /*
       * MAD16 SB base is defined by the WSS base. It cannot be changed
       * alone.
       * Ignore configured I/O base. Use the active setting.
       */
 
      if (mad_read (MC1_PORT) & 0x20)
        hw_config->io_base = 0x240;
      else
        hw_config->io_base = 0x220;
 
      switch (hw_config->irq)
        {
        case 5:
          tmp = (tmp & 0x3f) | 0x80;
          break;
        case 7:
          tmp = (tmp & 0x3f);
          break;
        case 11:
          tmp = (tmp & 0x3f) | 0x40;
          break;
        default:
          printk ("mad16/Mozart: Invalid MIDI IRQ\n");
          return 0;
        }
 
      mad_write (MC3_PORT, tmp | 0x04);
      hw_config->driver_use_1 = SB_MIDI_ONLY;
      return sb_dsp_detect (hw_config);
#else
      return 0;
#endif
    }
 
  tmp = mad_read (MC6_PORT) & 0x83;
  tmp |= 0x80;                  /* MPU-401 enable */
 
/*
 * Set the MPU base bits
 */
 
  for (i = 0; i < 5; i++)
    {
      if (i > 3)                /* Out of array bounds */
        {
          printk ("MAD16 / Mozart: Invalid MIDI port 0x%x\n", hw_config->io_base);
          return 0;
        }
 
      if (valid_ports[i] == hw_config->io_base)
        {
          tmp |= i << 5;
          break;
        }
    }
 
/*
 * Set the MPU IRQ bits
 */
 
  for (i = 0; i < 5; i++)
    {
      if (i > 3)                /* Out of array bounds */
        {
          printk ("MAD16 / Mozart: Invalid MIDI IRQ %d\n", hw_config->irq);
          return 0;
        }
 
      if (valid_irqs[i] == hw_config->irq)
        {
          tmp |= i << 3;
          break;
        }
    }
  mad_write (MC6_PORT, tmp);    /* Write MPU401 config */
 
  return probe_uart401 (hw_config);
#else
  return 0;
#endif
}
 
void
unload_mad16 (struct address_info *hw_config)
{
  ad1848_unload (hw_config->io_base + 4,
                 hw_config->irq,
                 hw_config->dma,
                 hw_config->dma2, 0);
  release_region (hw_config->io_base, 4);
 
}
 
void
unload_mad16_mpu (struct address_info *hw_config)
{
#ifdef CONFIG_MIDI
  if (board_type < C929)        /* Early chip. No MPU support. Just SB MIDI */
    {
      sb_dsp_unload (hw_config);
      return;
    }
#endif
 
#if (defined(CONFIG_UART401) || defined(CONFIG_MPU_EMU)) && defined(CONFIG_MIDI)
  unload_uart401 (hw_config);
#endif
}
 
/* That's all folks */
#endif

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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [sound/] [mad16.c] - Blame information for rev 1765

Line No.	Rev	Author	Line
1	1626	jcastillo	`/*`
2			`* Copyright (C) by Hannu Savolainen 1993-1996`
3			`*`
4			`* USS/Lite for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)`
5			`* Version 2 (June 1991). See the "COPYING" file distributed with this software`
6			`* for more info.`
7			`*/`
8			`#include <linux/config.h>`
9
10			`/*`
11			`* sound/mad16.c`
12			`*`
13			`* Initialization code for OPTi MAD16 compatible audio chips. Including`
14			`*`
15			`* OPTi 82C928 MAD16 (replaced by C929)`
16			`* OAK OTI-601D Mozart`
17			`* OPTi 82C929 MAD16 Pro`
18			`* OPTi 82C930`
19			`*`
20			`* These audio interface chips don't produce sound themselves. They just`
21			`* connect some other components (OPL-[234] and a WSS compatible codec)`
22			`* to the PC bus and perform I/O, DMA and IRQ address decoding. There is`
23			`* also a UART for the MPU-401 mode (not 82C928/Mozart).`
24			`* The Mozart chip appears to be compatible with the 82C928 (can anybody`
25			`* confirm this?).`
26			`*`
27			`* NOTE! If you want to set CD-ROM address and/or joystick enable, define`
28			`* MAD16_CONF in local.h as combination of the following bits:`
29			`*`
30			`* 0x01 - joystick disabled`
31			`*`
32			`* CD-ROM type selection (select just one):`
33			`* 0x00 - none`
34			`* 0x02 - Sony 31A`
35			`* 0x04 - Mitsumi`
36			`* 0x06 - Panasonic (type "LaserMate", not "Sound Blaster")`
37			`* 0x08 - Secondary IDE (address 0x170)`
38			`* 0x0a - Primary IDE (address 0x1F0)`
39			`*`
40			`* For example Mitsumi with joystick disabled = 0x04\|0x01 = 0x05`
41			`* For example LaserMate (for use with sbpcd) plus joystick = 0x06`
42			`*`
43			`* MAD16_CDSEL:`
44			`* This defaults to CD I/O 0x340, no IRQ and DMA3`
45			`* (DMA5 with Mitsumi or IDE). If you like to change these, define`
46			`* MAD16_CDSEL with the following bits:`
47			`*`
48			`* CD-ROM port: 0x00=340, 0x40=330, 0x80=360 or 0xc0=320`
49			`* OPL4 select: 0x20=OPL4, 0x00=OPL3`
50			`* CD-ROM irq: 0x00=disabled, 0x04=IRQ5, 0x08=IRQ7, 0x0a=IRQ3, 0x10=IRQ9,`
51			`* 0x14=IRQ10 and 0x18=IRQ11.`
52			`*`
53			`* CD-ROM DMA (Sony or Panasonic): 0x00=DMA3, 0x01=DMA2, 0x02=DMA1 or 0x03=disabled`
54			`* or`
55			`* CD-ROM DMA (Mitsumi or IDE): 0x00=DMA5, 0x01=DMA6, 0x02=DMA7 or 0x03=disabled`
56			`*`
57			`* For use with sbpcd, address 0x340, set MAD16_CDSEL to 0x03 or 0x23.`
58			`*/`
59
60			`#include "sound_config.h"`
61
62			`#if defined(CONFIG_MAD16)`
63
64			`#include "sb.h"`
65
66			`static int already_initialized = 0;`
67
68			`#define C928 1`
69			`#define MOZART 2`
70			`#define C929 3`
71			`#define C930 4`
72
73			`/*`
74			`* Registers`
75			`*`
76			`* The MAD16 occupies I/O ports 0xf8d to 0xf93 (fixed locations).`
77			`* All ports are inactive by default. They can be activated by`
78			`* writing 0xE2 or 0xE3 to the password register. The password is valid`
79			`* only until the next I/O read or write.`
80			`*`
81			`* 82C930 uses 0xE4 as the password and indirect addressing to access`
82			`* the config registers.`
83			`*/`
84
85			`#define MC0_PORT 0xf8c /* Dummy port */`
86			`#define MC1_PORT 0xf8d /* SB address, CD-ROM interface type, joystick */`
87			`#define MC2_PORT 0xf8e /* CD-ROM address, IRQ, DMA, plus OPL4 bit */`
88			`#define MC3_PORT 0xf8f`
89			`#define PASSWD_REG 0xf8f`
90			`#define MC4_PORT 0xf90`
91			`#define MC5_PORT 0xf91`
92			`#define MC6_PORT 0xf92`
93			`#define MC7_PORT 0xf93`
94			`#define MC8_PORT 0xf94`
95			`#define MC9_PORT 0xf95`
96			`#define MC10_PORT 0xf96`
97			`#define MC11_PORT 0xf97`
98			`#define MC12_PORT 0xf98`
99
100			`static int board_type = C928;`
101
102			`static int *mad16_osp;`
103
104			`#ifndef DDB`
105			`#define DDB(x)`
106			`#endif`
107
108			`static unsigned char`
109			`mad_read (int port)`
110			`{`
111			`unsigned long flags;`
112			`unsigned char tmp;`
113
114			`save_flags (flags);`
115			`cli ();`
116
117			`switch (board_type) /* Output password */`
118			`{`
119			`case C928:`
120			`case MOZART:`
121			`outb (0xE2, PASSWD_REG);`
122			`break;`
123
124			`case C929:`
125			`outb (0xE3, PASSWD_REG);`
126			`break;`
127
128			`case C930:`
129			`/* outb( 0xE4, PASSWD_REG); */`
130			`break;`
131			`}`
132
133			`if (board_type == C930)`
134			`{`
135			`outb (port - MC0_PORT, 0xe0e); /* Write to index reg */`
136			`tmp = inb (0xe0f); /* Read from data reg */`
137			`}`
138			`else`
139			`tmp = inb (port);`
140			`restore_flags (flags);`
141
142			`return tmp;`
143			`}`
144
145			`static void`
146			`mad_write (int port, int value)`
147			`{`
148			`unsigned long flags;`
149
150			`save_flags (flags);`
151			`cli ();`
152
153			`switch (board_type) /* Output password */`
154			`{`
155			`case C928:`
156			`case MOZART:`
157			`outb (0xE2, PASSWD_REG);`
158			`break;`
159
160			`case C929:`
161			`outb (0xE3, PASSWD_REG);`
162			`break;`
163
164			`case C930:`
165			`/* outb( 0xE4, PASSWD_REG); */`
166			`break;`
167			`}`
168
169			`if (board_type == C930)`
170			`{`
171			`outb (port - MC0_PORT, 0xe0e); /* Write to index reg */`
172			`outb ((unsigned char) (value & 0xff), 0xe0f);`
173			`}`
174			`else`
175			`outb ((unsigned char) (value & 0xff), port);`
176			`restore_flags (flags);`
177			`}`
178
179			`static int`
180			`detect_c930 (void)`
181			`{`
182			`unsigned char tmp = mad_read (MC1_PORT);`
183
184			`if ((tmp & 0x06) != 0x06)`
185			`{`
186			`DDB (printk ("Wrong C930 signature (%x)\n", tmp));`
187			`/* return 0; */`
188			`}`
189
190			`mad_write (MC1_PORT, 0);`
191
192			`if (mad_read (MC1_PORT) != 0x06)`
193			`{`
194			`DDB (printk ("Wrong C930 signature2 (%x)\n", tmp));`
195			`/* return 0; */`
196			`}`
197
198			`mad_write (MC1_PORT, tmp); /* Restore bits */`
199
200			`mad_write (MC7_PORT, 0);`
201			`if ((tmp = mad_read (MC7_PORT)) != 0)`
202			`{`
203			`DDB (printk ("MC7 not writable (%x)\n", tmp));`
204			`return 0;`
205			`}`
206
207			`mad_write (MC7_PORT, 0xcb);`
208			`if ((tmp = mad_read (MC7_PORT)) != 0xcb)`
209			`{`
210			`DDB (printk ("MC7 not writable2 (%x)\n", tmp));`
211			`return 0;`
212			`}`
213
214			`return 1;`
215			`}`
216
217			`static int`
218			`detect_mad16 (void)`
219			`{`
220			`unsigned char tmp, tmp2;`
221			`int i;`
222
223			`/*`
224			`* Check that reading a register doesn't return bus float (0xff)`
225			`* when the card is accessed using password. This may fail in case`
226			`* the card is in low power mode. Normally at least the power saving mode`
227			`* bit should be 0.`
228			`*/`
229			`if ((tmp = mad_read (MC1_PORT)) == 0xff)`
230			`{`
231			`DDB (printk ("MC1_PORT returned 0xff\n"));`
232			`return 0;`
233			`}`
234
235			`for (i = 0xf8d; i <= 0xf98; i++)`
236			`DDB (printk ("Port %0x (init value) = %0x\n", i, mad_read (i)));`
237
238			`if (board_type == C930)`
239			`return detect_c930 ();`
240			`/*`
241			`* Now check that the gate is closed on first I/O after writing`
242			`* the password. (This is how a MAD16 compatible card works).`
243			`*/`
244
245			`if ((tmp2 = inb (MC1_PORT)) == tmp) /* It didn't close */`
246			`{`
247			`DDB (printk ("MC1_PORT didn't close after read (0x%02x)\n", tmp2));`
248			`return 0;`
249			`}`
250
251			`mad_write (MC1_PORT, tmp ^ 0x80); /* Toggle a bit */`
252			`if ((tmp2 = mad_read (MC1_PORT)) != (tmp ^ 0x80)) /* Compare the bit */`
253			`{`
254			`mad_write (MC1_PORT, tmp); /* Restore */`
255			`DDB (printk ("Bit revert test failed (0x%02x, 0x%02x)\n", tmp, tmp2));`
256			`return 0;`
257			`}`
258
259			`mad_write (MC1_PORT, tmp); /* Restore */`
260			`return 1; /* Bingo */`
261
262			`}`
263
264			`static int`
265			`wss_init (struct address_info *hw_config)`
266			`{`
267			`int ad_flags = 0;`
268
269			`/*`
270			`* Verify the WSS parameters`
271			`*/`
272
273			`if (check_region (hw_config->io_base, 8))`
274			`{`
275			`printk ("MSS: I/O port conflict\n");`
276			`return 0;`
277			`}`
278
279			`if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))`
280			`return 0;`
281			`/*`
282			`* Check if the IO port returns valid signature. The original MS Sound`
283			`* system returns 0x04 while some cards (AudioTrix Pro for example)`
284			`* return 0x00.`
285			`*/`
286
287			`if ((inb (hw_config->io_base + 3) & 0x3f) != 0x04 &&`
288			`(inb (hw_config->io_base + 3) & 0x3f) != 0x00)`
289			`{`
290			`DDB (printk ("No MSS signature detected on port 0x%x (0x%x)\n",`
291			`hw_config->io_base, inb (hw_config->io_base + 3)));`
292			`return 0;`
293			`}`
294
295			`if (hw_config->irq > 11)`
296			`{`
297			`printk ("MSS: Bad IRQ %d\n", hw_config->irq);`
298			`return 0;`
299			`}`
300
301			`if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)`
302			`{`
303			`printk ("MSS: Bad DMA %d\n", hw_config->dma);`
304			`return 0;`
305			`}`
306
307			`/*`
308			`* Check that DMA0 is not in use with a 8 bit board.`
309			`*/`
310
311			`if (hw_config->dma == 0 && inb (hw_config->io_base + 3) & 0x80)`
312			`{`
313			`printk ("MSS: Can't use DMA0 with a 8 bit card/slot\n");`
314			`return 0;`
315			`}`
316
317			`if (hw_config->irq > 7 && hw_config->irq != 9 && inb (hw_config->io_base + 3) & 0x80)`
318			`{`
319			`printk ("MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);`
320			`}`
321
322			`return 1;`
323			`}`
324
325			`static int`
326			`init_c930 (struct address_info *hw_config)`
327			`{`
328			`unsigned char cfg;`
329
330			`cfg = (mad_read (MC1_PORT) & ~0x30);`
331			`/* mad_write(MC1_PORT, 0); */`
332
333			`switch (hw_config->io_base)`
334			`{`
335			`case 0x530:`
336			`cfg \|= 0x00;`
337			`break;`
338			`case 0xe80:`
339			`cfg \|= 0x10;`
340			`break;`
341			`case 0xf40:`
342			`cfg \|= 0x20;`
343			`break;`
344			`case 0x604:`
345			`cfg \|= 0x30;`
346			`break;`
347
348			`default:`
349			`printk ("MAD16: Invalid codec port %x\n", hw_config->io_base);`
350			`return 0;`
351			`}`
352			`mad_write (MC1_PORT, cfg);`
353
354			`/* MC2 is CD configuration. Don't touch it. */`
355
356			`mad_write (MC3_PORT, 0); /* Disable SB mode IRQ and DMA */`
357
358			`mad_write (MC4_PORT, 0x52); /* ??? */`
359			`mad_write (MC5_PORT, 0x3D); /* Init it into mode2 */`
360			`mad_write (MC6_PORT, 0x02); /* Enable WSS, Disable MPU and SB */`
361			`mad_write (MC7_PORT, 0xCB);`
362			`mad_write (MC10_PORT, 0x11);`
363
364			`if (!wss_init (hw_config))`
365			`return 0;`
366
367			`/*`
368			`* A temporary kludge which drops the device back to mode1.`
369			`* This removes problems with interrupts but disables full duplex.`
370			`* A better solution should be introduced later.`
371			`*/`
372			`mad_write (MC5_PORT, 0x1D); /* Disable mode2 */`
373			`return wss_init (hw_config);`
374			`}`
375
376			`int`
377			`probe_mad16 (struct address_info *hw_config)`
378			`{`
379			`int i;`
380			`static int valid_ports[] =`
381			`{0x530, 0xe80, 0xf40, 0x604};`
382			`unsigned char tmp;`
383			`unsigned char cs4231_mode = 0;`
384
385			`int ad_flags = 0;`
386
387			`if (already_initialized)`
388			`return 0;`
389
390			`mad16_osp = hw_config->osp;`
391			`/*`
392			`* Check that all ports return 0xff (bus float) when no password`
393			`* is written to the password register.`
394			`*/`
395
396			`DDB (printk ("--- Detecting MAD16 / Mozart ---\n"));`
397
398
399			`/*`
400			`* Then try to detect with the old password`
401			`*/`
402			`board_type = C928;`
403
404			`DDB (printk ("Detect using password = 0xE2\n"));`
405
406			`if (!detect_mad16 ()) /* No luck. Try different model */`
407			`{`
408			`board_type = C929;`
409
410			`DDB (printk ("Detect using password = 0xE3\n"));`
411
412			`if (!detect_mad16 ())`
413			`{`
414			`if (inb (PASSWD_REG) != 0xff)`
415			`return 0;`
416
417			`/*`
418			`* First relocate MC# registers to 0xe0e/0xe0f, disable password`
419			`*/`
420
421			`outb (0xE4, PASSWD_REG);`
422			`outb (0x80, PASSWD_REG);`
423
424			`board_type = C930;`
425
426			`DDB (printk ("Detect using password = 0xE4\n"));`
427
428			`for (i = 0xf8d; i <= 0xf93; i++)`
429			`DDB (printk ("port %03x = %02x\n", i, mad_read (i)));`
430
431			`if (!detect_mad16 ())`
432			`return 0;`
433
434			`DDB (printk ("mad16.c: 82C930 detected\n"));`
435			`return init_c930 (hw_config);`
436			`}`
437			`else`
438			`{`
439			`DDB (printk ("mad16.c: 82C929 detected\n"));`
440			`}`
441			`}`
442			`else`
443			`{`
444			`unsigned char model;`
445
446			`if (((model = mad_read (MC3_PORT)) & 0x03) == 0x03)`
447			`{`
448			`DDB (printk ("mad16.c: Mozart detected\n"));`
449			`board_type = MOZART;`
450			`}`
451			`else`
452			`{`
453			`DDB (printk ("mad16.c: 82C928 detected???\n"));`
454			`board_type = C928;`
455			`}`
456			`}`
457
458			`for (i = 0xf8d; i <= 0xf93; i++)`
459			`DDB (printk ("port %03x = %02x\n", i, mad_read (i)));`
460
461			`/*`
462			`* Set the WSS address`
463			`*/`
464
465			`tmp = 0x80; /* Enable WSS, Disable SB */`
466
467			`for (i = 0; i < 5; i++)`
468			`{`
469			`if (i > 3) /* Not a valid port */`
470			`{`
471			`printk ("MAD16/Mozart: Bad WSS base address 0x%x\n", hw_config->io_base);`
472			`return 0;`
473			`}`
474
475			`if (valid_ports[i] == hw_config->io_base)`
476			`{`
477			`tmp \|= i << 4; /* WSS port select bits */`
478			`break;`
479			`}`
480			`}`
481
482			`/*`
483			`* Set optional CD-ROM and joystick settings.`
484			`*/`
485
486			`#ifdef MAD16_CONF`
487			`tmp \|= ((MAD16_CONF) & 0x0f); /* CD-ROM and joystick bits */`
488			`#endif`
489			`mad_write (MC1_PORT, tmp);`
490
491			`#if defined(MAD16_CONF) && defined(MAD16_CDSEL)`
492			`tmp = MAD16_CDSEL;`
493			`#else`
494			`tmp = 0x03;`
495			`#endif`
496
497			`#ifdef MAD16_OPL4`
498			`tmp \|= 0x20; /* Enable OPL4 access */`
499			`#endif`
500
501			`mad_write (MC2_PORT, tmp);`
502			`mad_write (MC3_PORT, 0xf0); /* Disable SB */`
503
504			`if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))`
505			`return 0;`
506
507			`if (ad_flags & (AD_F_CS4231 \| AD_F_CS4248))`
508			`cs4231_mode = 0x02; /* CS4248/CS4231 sync delay switch */`
509
510			`if (board_type == C929)`
511			`{`
512			`mad_write (MC4_PORT, 0xa2);`
513			`mad_write (MC5_PORT, 0xA5 \| cs4231_mode);`
514			`mad_write (MC6_PORT, 0x03); /* Disable MPU401 */`
515			`}`
516			`else`
517			`{`
518			`mad_write (MC4_PORT, 0x02);`
519			`mad_write (MC5_PORT, 0x30 \| cs4231_mode);`
520			`}`
521
522			`for (i = 0xf8d; i <= 0xf93; i++)`
523			`DDB (printk ("port %03x after init = %02x\n", i, mad_read (i)));`
524
525			`wss_init (hw_config);`
526
527			`return 1;`
528			`}`
529
530			`void`
531			`attach_mad16 (struct address_info *hw_config)`
532			`{`
533
534			`static char interrupt_bits[12] =`
535			`{`
536			`-1, -1, -1, -1, -1, -1, -1, 0x08, -1, 0x10, 0x18, 0x20`
537			`};`
538			`char bits;`
539
540			`static char dma_bits[4] =`
541			`{`
542			`1, 2, 0, 3`
543			`};`
544
545			`int config_port = hw_config->io_base + 0, version_port = hw_config->io_base + 3;`
546			`int ad_flags = 0, dma = hw_config->dma, dma2 = hw_config->dma2;`
547			`unsigned char dma2_bit = 0;`
548
549			`already_initialized = 1;`
550
551			`if (!ad1848_detect (hw_config->io_base + 4, &ad_flags, mad16_osp))`
552			`return;`
553
554			`/*`
555			`* Set the IRQ and DMA addresses.`
556			`*/`
557
558			`bits = interrupt_bits[hw_config->irq];`
559			`if (bits == -1)`
560			`return;`
561
562			`outb (bits \| 0x40, config_port);`
563			`if ((inb (version_port) & 0x40) == 0)`
564			`printk ("[IRQ Conflict?]");`
565
566			`/*`
567			`* Handle the capture DMA channel`
568			`*/`
569
570			`if (ad_flags & AD_F_CS4231 && dma2 != -1 && dma2 != dma)`
571			`{`
572			`if (!((dma == 0 && dma2 == 1) \|\|`
573			`(dma == 1 && dma2 == 0) \|\|`
574			`(dma == 3 && dma2 == 0)))`
575			`{ /* Unsupported combination. Try to swap channels */`
576			`int tmp = dma;`
577
578			`dma = dma2;`
579			`dma2 = tmp;`
580			`}`
581
582			`if ((dma == 0 && dma2 == 1) \|\|`
583			`(dma == 1 && dma2 == 0) \|\|`
584			`(dma == 3 && dma2 == 0))`
585			`{`
586			`dma2_bit = 0x04; /* Enable capture DMA */`
587			`}`
588			`else`
589			`{`
590			`printk ("MAD16: Invalid capture DMA\n");`
591			`dma2 = dma;`
592			`}`
593			`}`
594			`else`
595			`dma2 = dma;`
596
597			`outb (bits \| dma_bits[dma] \| dma2_bit, config_port); /* Write IRQ+DMA setup */`
598
599			`ad1848_init ("MAD16 WSS", hw_config->io_base + 4,`
600			`hw_config->irq,`
601			`dma,`
602			`dma2, 0,`
603			`hw_config->osp);`
604			`request_region (hw_config->io_base, 4, "MAD16 WSS config");`
605			`}`
606
607			`void`
608			`attach_mad16_mpu (struct address_info *hw_config)`
609			`{`
610			`if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */`
611			`{`
612			`#ifdef CONFIG_MIDI`
613
614			`if (mad_read (MC1_PORT) & 0x20)`
615			`hw_config->io_base = 0x240;`
616			`else`
617			`hw_config->io_base = 0x220;`
618
619			`hw_config->name = "Mad16/Mozart";`
620			`sb_dsp_init (hw_config);`
621			`#endif`
622
623			`return;`
624			`}`
625
626			`#if defined(CONFIG_UART401) && defined(CONFIG_MIDI)`
627			`if (!already_initialized)`
628			`return;`
629
630			`hw_config->driver_use_1 = SB_MIDI_ONLY;`
631			`hw_config->name = "Mad16/Mozart";`
632			`attach_uart401 (hw_config);`
633			`#endif`
634			`}`
635
636			`int`
637			`probe_mad16_mpu (struct address_info *hw_config)`
638			`{`
639			`#if defined(CONFIG_UART401) && defined(CONFIG_MIDI)`
640			`static int mpu_attached = 0;`
641			`static int valid_ports[] =`
642			`{0x330, 0x320, 0x310, 0x300};`
643			`static short valid_irqs[] =`
644			`{9, 10, 5, 7};`
645			`unsigned char tmp;`
646
647			`int i; /* A variable with secret power */`
648
649			`if (!already_initialized) /* The MSS port must be initialized first */`
650			`return 0;`
651
652			`if (mpu_attached) /* Don't let them call this twice */`
653			`return 0;`
654			`mpu_attached = 1;`
655
656			`if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */`
657			`{`
658
659			`#ifdef CONFIG_MIDI`
660			`unsigned char tmp;`
661
662			`tmp = mad_read (MC3_PORT);`
663
664			`/*`
665			`* MAD16 SB base is defined by the WSS base. It cannot be changed`
666			`* alone.`
667			`* Ignore configured I/O base. Use the active setting.`
668			`*/`
669
670			`if (mad_read (MC1_PORT) & 0x20)`
671			`hw_config->io_base = 0x240;`
672			`else`
673			`hw_config->io_base = 0x220;`
674
675			`switch (hw_config->irq)`
676			`{`
677			`case 5:`
678			`tmp = (tmp & 0x3f) \| 0x80;`
679			`break;`
680			`case 7:`
681			`tmp = (tmp & 0x3f);`
682			`break;`
683			`case 11:`
684			`tmp = (tmp & 0x3f) \| 0x40;`
685			`break;`
686			`default:`
687			`printk ("mad16/Mozart: Invalid MIDI IRQ\n");`
688			`return 0;`
689			`}`
690
691			`mad_write (MC3_PORT, tmp \| 0x04);`
692			`hw_config->driver_use_1 = SB_MIDI_ONLY;`
693			`return sb_dsp_detect (hw_config);`
694			`#else`
695			`return 0;`
696			`#endif`
697			`}`
698
699			`tmp = mad_read (MC6_PORT) & 0x83;`
700			`tmp \|= 0x80; /* MPU-401 enable */`
701
702			`/*`
703			`* Set the MPU base bits`
704			`*/`
705
706			`for (i = 0; i < 5; i++)`
707			`{`
708			`if (i > 3) /* Out of array bounds */`
709			`{`
710			`printk ("MAD16 / Mozart: Invalid MIDI port 0x%x\n", hw_config->io_base);`
711			`return 0;`
712			`}`
713
714			`if (valid_ports[i] == hw_config->io_base)`
715			`{`
716			`tmp \|= i << 5;`
717			`break;`
718			`}`
719			`}`
720
721			`/*`
722			`* Set the MPU IRQ bits`
723			`*/`
724
725			`for (i = 0; i < 5; i++)`
726			`{`
727			`if (i > 3) /* Out of array bounds */`
728			`{`
729			`printk ("MAD16 / Mozart: Invalid MIDI IRQ %d\n", hw_config->irq);`
730			`return 0;`
731			`}`
732
733			`if (valid_irqs[i] == hw_config->irq)`
734			`{`
735			`tmp \|= i << 3;`
736			`break;`
737			`}`
738			`}`
739			`mad_write (MC6_PORT, tmp); /* Write MPU401 config */`
740
741			`return probe_uart401 (hw_config);`
742			`#else`
743			`return 0;`
744			`#endif`
745			`}`
746
747			`void`
748			`unload_mad16 (struct address_info *hw_config)`
749			`{`
750			`ad1848_unload (hw_config->io_base + 4,`
751			`hw_config->irq,`
752			`hw_config->dma,`
753			`hw_config->dma2, 0);`
754			`release_region (hw_config->io_base, 4);`
755
756			`}`
757
758			`void`
759			`unload_mad16_mpu (struct address_info *hw_config)`
760			`{`
761			`#ifdef CONFIG_MIDI`
762			`if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */`
763			`{`
764			`sb_dsp_unload (hw_config);`
765			`return;`
766			`}`
767			`#endif`
768
769			`#if (defined(CONFIG_UART401) \|\| defined(CONFIG_MPU_EMU)) && defined(CONFIG_MIDI)`
770			`unload_uart401 (hw_config);`
771			`#endif`
772			`}`
773
774			`/* That's all folks */`
775			`#endif`