OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [drivers/] [sound/] [opl3.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1626 jcastillo
/*
2
 *      opl3.h  - Definitions of the OPL-3 registers
3
 */
4
/*
5
 * Copyright (C) by Hannu Savolainen 1993-1996
6
 *
7
 * USS/Lite for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
8
 * Version 2 (June 1991). See the "COPYING" file distributed with this software
9
 * for more info.
10
 */
11
 
12
/*
13
 *      The OPL-3 mode is switched on by writing 0x01, to the offset 5
14
 *      of the right side.
15
 *
16
 *      Another special register at the right side is at offset 4. It contains
17
 *      a bit mask defining which voices are used as 4 OP voices.
18
 *
19
 *      The percussive mode is implemented in the left side only.
20
 *
21
 *      With the above exceptions the both sides can be operated independently.
22
 *
23
 *      A 4 OP voice can be created by setting the corresponding
24
 *      bit at offset 4 of the right side.
25
 *
26
 *      For example setting the rightmost bit (0x01) changes the
27
 *      first voice on the right side to the 4 OP mode. The fourth
28
 *      voice is made inaccessible.
29
 *
30
 *      If a voice is set to the 2 OP mode, it works like 2 OP modes
31
 *      of the original YM3812 (AdLib). In addition the voice can
32
 *      be connected the left, right or both stereo channels. It can
33
 *      even be left unconnected. This works with 4 OP voices also.
34
 *
35
 *      The stereo connection bits are located in the FEEDBACK_CONNECTION
36
 *      register of the voice (0xC0-0xC8). In 4 OP voices these bits are
37
 *      in the second half of the voice.
38
 */
39
 
40
/*
41
 *      Register numbers for the global registers
42
 */
43
 
44
#define TEST_REGISTER                           0x01
45
#define   ENABLE_WAVE_SELECT            0x20
46
 
47
#define TIMER1_REGISTER                         0x02
48
#define TIMER2_REGISTER                         0x03
49
#define TIMER_CONTROL_REGISTER                  0x04    /* Left side */
50
#define   IRQ_RESET                     0x80
51
#define   TIMER1_MASK                   0x40
52
#define   TIMER2_MASK                   0x20
53
#define   TIMER1_START                  0x01
54
#define   TIMER2_START                  0x02
55
 
56
#define CONNECTION_SELECT_REGISTER              0x04    /* Right side */
57
#define   RIGHT_4OP_0                   0x01
58
#define   RIGHT_4OP_1                   0x02
59
#define   RIGHT_4OP_2                   0x04
60
#define   LEFT_4OP_0                    0x08
61
#define   LEFT_4OP_1                    0x10
62
#define   LEFT_4OP_2                    0x20
63
 
64
#define OPL3_MODE_REGISTER                      0x05    /* Right side */
65
#define   OPL3_ENABLE                   0x01
66
#define   OPL4_ENABLE                   0x02
67
 
68
#define KBD_SPLIT_REGISTER                      0x08    /* Left side */
69
#define   COMPOSITE_SINE_WAVE_MODE      0x80            /* Don't use with OPL-3? */
70
#define   KEYBOARD_SPLIT                0x40
71
 
72
#define PERCUSSION_REGISTER                     0xbd    /* Left side only */
73
#define   TREMOLO_DEPTH                 0x80
74
#define   VIBRATO_DEPTH                 0x40
75
#define   PERCUSSION_ENABLE             0x20
76
#define   BASSDRUM_ON                   0x10
77
#define   SNAREDRUM_ON                  0x08
78
#define   TOMTOM_ON                     0x04
79
#define   CYMBAL_ON                     0x02
80
#define   HIHAT_ON                      0x01
81
 
82
/*
83
 *      Offsets to the register banks for operators. To get the
84
 *      register number just add the operator offset to the bank offset
85
 *
86
 *      AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
87
 */
88
#define AM_VIB                                  0x20
89
#define   TREMOLO_ON                    0x80
90
#define   VIBRATO_ON                    0x40
91
#define   SUSTAIN_ON                    0x20
92
#define   KSR                           0x10    /* Key scaling rate */
93
#define   MULTIPLE_MASK         0x0f    /* Frequency multiplier */
94
 
95
 /*
96
  *     KSL/Total level (0x40 to 0x55)
97
  */
98
#define KSL_LEVEL                               0x40
99
#define   KSL_MASK                      0xc0    /* Envelope scaling bits */
100
#define   TOTAL_LEVEL_MASK              0x3f    /* Strength (volume) of OP */
101
 
102
/*
103
 *      Attack / Decay rate (0x60 to 0x75)
104
 */
105
#define ATTACK_DECAY                            0x60
106
#define   ATTACK_MASK                   0xf0
107
#define   DECAY_MASK                    0x0f
108
 
109
/*
110
 * Sustain level / Release rate (0x80 to 0x95)
111
 */
112
#define SUSTAIN_RELEASE                         0x80
113
#define   SUSTAIN_MASK                  0xf0
114
#define   RELEASE_MASK                  0x0f
115
 
116
/*
117
 * Wave select (0xE0 to 0xF5)
118
 */
119
#define WAVE_SELECT                     0xe0
120
 
121
/*
122
 *      Offsets to the register banks for voices. Just add to the
123
 *      voice number to get the register number.
124
 *
125
 *      F-Number low bits (0xA0 to 0xA8).
126
 */
127
#define FNUM_LOW                                0xa0
128
 
129
/*
130
 *      F-number high bits / Key on / Block (octave) (0xB0 to 0xB8)
131
 */
132
#define KEYON_BLOCK                                     0xb0
133
#define   KEYON_BIT                             0x20
134
#define   BLOCKNUM_MASK                         0x1c
135
#define   FNUM_HIGH_MASK                        0x03
136
 
137
/*
138
 *      Feedback / Connection (0xc0 to 0xc8)
139
 *
140
 *      These registers have two new bits when the OPL-3 mode
141
 *      is selected. These bits controls connecting the voice
142
 *      to the stereo channels. For 4 OP voices this bit is
143
 *      defined in the second half of the voice (add 3 to the
144
 *      register offset).
145
 *
146
 *      For 4 OP voices the connection bit is used in the
147
 *      both halves (gives 4 ways to connect the operators).
148
 */
149
#define FEEDBACK_CONNECTION                             0xc0
150
#define   FEEDBACK_MASK                         0x0e    /* Valid just for 1st OP of a voice */
151
#define   CONNECTION_BIT                        0x01
152
/*
153
 *      In the 4 OP mode there is four possible configurations how the
154
 *      operators can be connected together (in 2 OP modes there is just
155
 *      AM or FM). The 4 OP connection mode is defined by the rightmost
156
 *      bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halves.
157
 *
158
 *      First half      Second half     Mode
159
 *
160
 *                                       +---+
161
 *                                       v   |
162
 *      0                0                >+-1-+--2--3--4-->
163
 *
164
 *
165
 *
166
 *                                       +---+
167
 *                                       |   |
168
 *      0                1               >+-1-+--2-+
169
 *                                                |->
170
 *                                      >--3----4-+
171
 *
172
 *                                       +---+
173
 *                                       |   |
174
 *      1               0                >+-1-+-----+
175
 *                                                 |->
176
 *                                      >--2--3--4-+
177
 *
178
 *                                       +---+
179
 *                                       |   |
180
 *      1               1               >+-1-+--+
181
 *                                              |
182
 *                                      >--2--3-+->
183
 *                                              |
184
 *                                      >--4----+
185
 */
186
#define   STEREO_BITS                           0x30    /* OPL-3 only */
187
#define     VOICE_TO_LEFT               0x10
188
#define     VOICE_TO_RIGHT              0x20
189
 
190
/*
191
 *      Definition table for the physical voices
192
 */
193
 
194
struct physical_voice_info {
195
                unsigned char voice_num;
196
                unsigned char voice_mode; /* 0=unavailable, 2=2 OP, 4=4 OP */
197
                unsigned short ioaddr; /* I/O port (left or right side) */
198
                unsigned char op[4]; /* Operator offsets */
199
        };
200
 
201
/*
202
 *      There is 18 possible 2 OP voices
203
 *      (9 in the left and 9 in the right).
204
 *      The first OP is the modulator and 2nd is the carrier.
205
 *
206
 *      The first three voices in the both sides may be connected
207
 *      with another voice to a 4 OP voice. For example voice 0
208
 *      can be connected with voice 3. The operators of voice 3 are
209
 *      used as operators 3 and 4 of the new 4 OP voice.
210
 *      In this case the 2 OP voice number 0 is the 'first half' and
211
 *      voice 3 is the second.
212
 */
213
 
214
#define USE_LEFT        0
215
#define USE_RIGHT       1
216
 
217
static struct physical_voice_info pv_map[18] =
218
{
219
/*       No Mode Side           OP1     OP2     OP3   OP4       */
220
/*      ---------------------------------------------------     */
221
        { 0,  2, USE_LEFT,       {0x00,  0x03,   0x08, 0x0b}},
222
        { 1,  2, USE_LEFT,      {0x01,  0x04,   0x09, 0x0c}},
223
        { 2,  2, USE_LEFT,      {0x02,  0x05,   0x0a, 0x0d}},
224
 
225
        { 3,  2, USE_LEFT,      {0x08,  0x0b,   0x00, 0x00}},
226
        { 4,  2, USE_LEFT,      {0x09,  0x0c,   0x00, 0x00}},
227
        { 5,  2, USE_LEFT,      {0x0a,  0x0d,   0x00, 0x00}},
228
 
229
        { 6,  2, USE_LEFT,      {0x10,  0x13,   0x00, 0x00}}, /* Used by percussive voices */
230
        { 7,  2, USE_LEFT,      {0x11,  0x14,   0x00, 0x00}}, /* if the percussive mode */
231
        { 8,  2, USE_LEFT,      {0x12,  0x15,   0x00, 0x00}}, /* is selected */
232
 
233
        { 0,  2, USE_RIGHT,      {0x00,  0x03,   0x08, 0x0b}},
234
        { 1,  2, USE_RIGHT,     {0x01,  0x04,   0x09, 0x0c}},
235
        { 2,  2, USE_RIGHT,     {0x02,  0x05,   0x0a, 0x0d}},
236
 
237
        { 3,  2, USE_RIGHT,     {0x08,  0x0b,   0x00, 0x00}},
238
        { 4,  2, USE_RIGHT,     {0x09,  0x0c,   0x00, 0x00}},
239
        { 5,  2, USE_RIGHT,     {0x0a,  0x0d,   0x00, 0x00}},
240
 
241
        { 6,  2, USE_RIGHT,     {0x10,  0x13,   0x00, 0x00}},
242
        { 7,  2, USE_RIGHT,     {0x11,  0x14,   0x00, 0x00}},
243
        { 8,  2, USE_RIGHT,     {0x12,  0x15,   0x00, 0x00}}
244
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.