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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [arch-trio/] [io.h] - Blame information for rev 1765

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/*
 * linux/include/asm-arm/arch-a5k/io.h
 *
 * Copyright (C) 1997 Russell King
 * Copyright (C) 1999 Aplio SA
 *
 * Modifications:
 *  06-Dec-1997 RMK     Created.
 */
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
 
/*
 * This architecture does not require any delayed IO, and
 * has the constant-optimised IO
 */
#undef  ARCH_IO_DELAY
 
 
#if 0
/*
 * We use two different types of addressing - PC style addresses, and ARM
 * addresses.  PC style accesses the PC hardware with the normal PC IO
 * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
 * and are translated to the start of IO.  Note that all addresses are
 * shifted left!
 */
#define __PORT_PCIO(x)  (!((x) & 0x80000000))
 
/*
 * Dynamic IO functions - let the compiler
 * optimize the expressions
 */
extern __inline__ void __outb (unsigned int value, unsigned int port)
{
        unsigned long temp;
        __asm__ __volatile__(
        "tst    %2, #0x80000000\n\t"
        "mov    %0, %4\n\t"
        "addeq  %0, %0, %3\n\t"
        "strb   %1, [%0, %2, lsl #2]"
        : "=&r" (temp)
        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
        : "cc");
}
 
extern __inline__ void __outw (unsigned int value, unsigned int port)
{
        unsigned long temp;
        __asm__ __volatile__(
        "tst    %2, #0x80000000\n\t"
        "mov    %0, %4\n\t"
        "addeq  %0, %0, %3\n\t"
        "str    %1, [%0, %2, lsl #2]"
        : "=&r" (temp)
        : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
        : "cc");
}
 
extern __inline__ void __outl (unsigned int value, unsigned int port)
{
        unsigned long temp;
        __asm__ __volatile__(
        "tst    %2, #0x80000000\n\t"
        "mov    %0, %4\n\t"
        "addeq  %0, %0, %3\n\t"
        "str    %1, [%0, %2, lsl #2]"
        : "=&r" (temp)
        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
        : "cc");
}
 
#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
extern __inline__ unsigned sz __in##fnsuffix (unsigned int port)                \
{                                                                               \
        unsigned long temp, value;                                              \
        __asm__ __volatile__(                                                   \
        "tst    %2, #0x80000000\n\t"                                            \
        "mov    %0, %4\n\t"                                                     \
        "addeq  %0, %0, %3\n\t"                                                 \
        "ldr" ##instr## "       %1, [%0, %2, lsl #2]"                           \
        : "=&r" (temp), "=r" (value)                                            \
        : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)                \
        : "cc");                                                                \
        return (unsigned sz)value;                                              \
}
 
extern __inline__ unsigned int __ioaddr (unsigned int port)                     \
{                                                                               \
        if (__PORT_PCIO(port))                                                  \
                return (unsigned int)(PCIO_BASE + (port << 2));                 \
        else                                                                    \
                return (unsigned int)(IO_BASE + (port << 2));                   \
}
 
 
 
#undef DECLARE_DYN_IN
 
/*
 * Constant address IO functions
 *
 * These have to be macros for the 'J' constraint to work -
 * +/-4096 immediate operand.
 */
#define __outbc(value,port)                                                     \
({                                                                              \
        if (__PORT_PCIO((port)))                                                \
                __asm__ __volatile__(                                           \
                "strb   %0, [%1, %2]"                                           \
                : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));          \
        else                                                                    \
                __asm__ __volatile__(                                           \
                "strb   %0, [%1, %2]"                                           \
                : : "r" (value), "r" (IO_BASE), "r" ((port) << 2));             \
})
 
#define __inbc(port)                                                            \
({                                                                              \
        unsigned char result;                                                   \
        if (__PORT_PCIO((port)))                                                \
                __asm__ __volatile__(                                           \
                "ldrb   %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
        else                                                                    \
                __asm__ __volatile__(                                           \
                "ldrb   %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
        result;                                                                 \
})
 
#define __outwc(value,port)                                                     \
({                                                                              \
        unsigned long v = value;                                                \
        if (__PORT_PCIO((port)))                                                \
                __asm__ __volatile__(                                           \
                "str    %0, [%1, %2]"                                           \
                : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));        \
        else                                                                    \
                __asm__ __volatile__(                                           \
                "str    %0, [%1, %2]"                                           \
                : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2));           \
})
 
#define __inwc(port)                                                            \
({                                                                              \
        unsigned short result;                                                  \
        if (__PORT_PCIO((port)))                                                \
                __asm__ __volatile__(                                           \
                "ldr    %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
        else                                                                    \
                __asm__ __volatile__(                                           \
                "ldr    %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
        result & 0xffff;                                                        \
})
 
#define __outlc(v,p) __outwc((v),(p))
 
#define __inlc(port)                                                            \
({                                                                              \
        unsigned long result;                                                   \
        if (__PORT_PCIO((port)))                                                \
                __asm__ __volatile__(                                           \
                "ldr    %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
        else                                                                    \
                __asm__ __volatile__(                                           \
                "ldr    %0, [%1, %2]"                                           \
                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
        result;                                                                 \
})
 
#define __ioaddrc(port)                                                         \
({                                                                              \
        unsigned long addr;                                                     \
        if (__PORT_PCIO((port)))                                                \
                addr = PCIO_BASE + ((port) << 2);                               \
        else                                                                    \
                addr = IO_BASE + ((port) << 2);                                 \
        addr;                                                                   \
})
 
 
#else
 
/*
 * Translated address IO functions
 *
 * IO address has already been translated to a virtual address
 */
#define outb_t(v,p)     (*(volatile unsigned char *)(p) = (v))
 
 
#define outw_t(v,p)     (*(volatile unsigned short *)(p) = (v))
 
#define outl_t(v,p)     (*(volatile unsigned long *)(p) = (v))
 
#define inb_t(p)         (*(volatile unsigned char *)(p))
 
#define inw_t(p)        (*(volatile unsigned short *)(p))
 
#define inl_t(p)        (*(volatile unsigned long *)(p))
 
 
extern __inline__ void __outb (unsigned int value, unsigned int port) { outb_t(value,port); }
extern __inline__ void __outw (unsigned int value, unsigned int port) { outw_t(value,port); }
extern __inline__ void __outl (unsigned int value, unsigned int port) { outl_t(value,port); }
 
 
#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) { return in##fnsuffix##_t(port); }
 
 
DECLARE_DYN_IN(char,b,"b")
DECLARE_DYN_IN(short,w,"")
DECLARE_DYN_IN(long,l,"")
 
#undef DECLARE_DYN_IN
 
#define __outbc(value,port)     outb_t(value,port)
#define __outwc(value,port)     outw_t(value,port)
#define __outlc(value,port)     outl_t(value,port)
 
#endif
 
 
#endif

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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [arch-trio/] [io.h] - Blame information for rev 1765

Line No.	Rev	Author	Line
1	1633	jcastillo	`/*`
2			`* linux/include/asm-arm/arch-a5k/io.h`
3			`*`
4			`* Copyright (C) 1997 Russell King`
5			`* Copyright (C) 1999 Aplio SA`
6			`*`
7			`* Modifications:`
8			`* 06-Dec-1997 RMK Created.`
9			`*/`
10			`#ifndef __ASM_ARM_ARCH_IO_H`
11			`#define __ASM_ARM_ARCH_IO_H`
12
13			`/*`
14			`* This architecture does not require any delayed IO, and`
15			`* has the constant-optimised IO`
16			`*/`
17			`#undef ARCH_IO_DELAY`
18
19
20			`#if 0`
21			`/*`
22			`* We use two different types of addressing - PC style addresses, and ARM`
23			`* addresses. PC style accesses the PC hardware with the normal PC IO`
24			`* addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+`
25			`* and are translated to the start of IO. Note that all addresses are`
26			`* shifted left!`
27			`*/`
28			`#define __PORT_PCIO(x) (!((x) & 0x80000000))`
29
30			`/*`
31			`* Dynamic IO functions - let the compiler`
32			`* optimize the expressions`
33			`*/`
34			`extern __inline__ void __outb (unsigned int value, unsigned int port)`
35			`{`
36			`unsigned long temp;`
37			`__asm__ __volatile__(`
38			`"tst %2, #0x80000000\n\t"`
39			`"mov %0, %4\n\t"`
40			`"addeq %0, %0, %3\n\t"`
41			`"strb %1, [%0, %2, lsl #2]"`
42			`: "=&r" (temp)`
43			`: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)`
44			`: "cc");`
45			`}`
46
47			`extern __inline__ void __outw (unsigned int value, unsigned int port)`
48			`{`
49			`unsigned long temp;`
50			`__asm__ __volatile__(`
51			`"tst %2, #0x80000000\n\t"`
52			`"mov %0, %4\n\t"`
53			`"addeq %0, %0, %3\n\t"`
54			`"str %1, [%0, %2, lsl #2]"`
55			`: "=&r" (temp)`
56			`: "r" (value\|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)`
57			`: "cc");`
58			`}`
59
60			`extern __inline__ void __outl (unsigned int value, unsigned int port)`
61			`{`
62			`unsigned long temp;`
63			`__asm__ __volatile__(`
64			`"tst %2, #0x80000000\n\t"`
65			`"mov %0, %4\n\t"`
66			`"addeq %0, %0, %3\n\t"`
67			`"str %1, [%0, %2, lsl #2]"`
68			`: "=&r" (temp)`
69			`: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)`
70			`: "cc");`
71			`}`
72
73			`#define DECLARE_DYN_IN(sz,fnsuffix,instr) \`
74			`extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \`
75			`{ \`
76			`unsigned long temp, value; \`
77			`__asm__ __volatile__( \`
78			`"tst %2, #0x80000000\n\t" \`
79			`"mov %0, %4\n\t" \`
80			`"addeq %0, %0, %3\n\t" \`
81			`"ldr" ##instr## " %1, [%0, %2, lsl #2]" \`
82			`: "=&r" (temp), "=r" (value) \`
83			`: "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \`
84			`: "cc"); \`
85			`return (unsigned sz)value; \`
86			`}`
87
88			`extern __inline__ unsigned int __ioaddr (unsigned int port) \`
89			`{ \`
90			`if (__PORT_PCIO(port)) \`
91			`return (unsigned int)(PCIO_BASE + (port << 2)); \`
92			`else \`
93			`return (unsigned int)(IO_BASE + (port << 2)); \`
94			`}`
95
96
97
98			`#undef DECLARE_DYN_IN`
99
100			`/*`
101			`* Constant address IO functions`
102			`*`
103			`* These have to be macros for the 'J' constraint to work -`
104			`* +/-4096 immediate operand.`
105			`*/`
106			`#define __outbc(value,port) \`
107			`({ \`
108			`if (__PORT_PCIO((port))) \`
109			`__asm__ __volatile__( \`
110			`"strb %0, [%1, %2]" \`
111			`: : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \`
112			`else \`
113			`__asm__ __volatile__( \`
114			`"strb %0, [%1, %2]" \`
115			`: : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \`
116			`})`
117
118			`#define __inbc(port) \`
119			`({ \`
120			`unsigned char result; \`
121			`if (__PORT_PCIO((port))) \`
122			`__asm__ __volatile__( \`
123			`"ldrb %0, [%1, %2]" \`
124			`: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \`
125			`else \`
126			`__asm__ __volatile__( \`
127			`"ldrb %0, [%1, %2]" \`
128			`: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \`
129			`result; \`
130			`})`
131
132			`#define __outwc(value,port) \`
133			`({ \`
134			`unsigned long v = value; \`
135			`if (__PORT_PCIO((port))) \`
136			`__asm__ __volatile__( \`
137			`"str %0, [%1, %2]" \`
138			`: : "r" (v\|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \`
139			`else \`
140			`__asm__ __volatile__( \`
141			`"str %0, [%1, %2]" \`
142			`: : "r" (v\|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \`
143			`})`
144
145			`#define __inwc(port) \`
146			`({ \`
147			`unsigned short result; \`
148			`if (__PORT_PCIO((port))) \`
149			`__asm__ __volatile__( \`
150			`"ldr %0, [%1, %2]" \`
151			`: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \`
152			`else \`
153			`__asm__ __volatile__( \`
154			`"ldr %0, [%1, %2]" \`
155			`: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \`
156			`result & 0xffff; \`
157			`})`
158
159			`#define __outlc(v,p) __outwc((v),(p))`
160
161			`#define __inlc(port) \`
162			`({ \`
163			`unsigned long result; \`
164			`if (__PORT_PCIO((port))) \`
165			`__asm__ __volatile__( \`
166			`"ldr %0, [%1, %2]" \`
167			`: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \`
168			`else \`
169			`__asm__ __volatile__( \`
170			`"ldr %0, [%1, %2]" \`
171			`: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \`
172			`result; \`
173			`})`
174
175			`#define __ioaddrc(port) \`
176			`({ \`
177			`unsigned long addr; \`
178			`if (__PORT_PCIO((port))) \`
179			`addr = PCIO_BASE + ((port) << 2); \`
180			`else \`
181			`addr = IO_BASE + ((port) << 2); \`
182			`addr; \`
183			`})`
184
185
186			`#else`
187
188			`/*`
189			`* Translated address IO functions`
190			`*`
191			`* IO address has already been translated to a virtual address`
192			`*/`
193			`#define outb_t(v,p) ((volatile unsigned char )(p) = (v))`
194
195
196			`#define outw_t(v,p) ((volatile unsigned short )(p) = (v))`
197
198			`#define outl_t(v,p) ((volatile unsigned long )(p) = (v))`
199
200			`#define inb_t(p) ((volatile unsigned char )(p))`
201
202			`#define inw_t(p) ((volatile unsigned short )(p))`
203
204			`#define inl_t(p) ((volatile unsigned long )(p))`
205
206
207			`extern __inline__ void __outb (unsigned int value, unsigned int port) { outb_t(value,port); }`
208			`extern __inline__ void __outw (unsigned int value, unsigned int port) { outw_t(value,port); }`
209			`extern __inline__ void __outl (unsigned int value, unsigned int port) { outl_t(value,port); }`
210
211
212			`#define DECLARE_DYN_IN(sz,fnsuffix,instr) \`
213			`extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) { return in##fnsuffix##_t(port); }`
214
215
216			`DECLARE_DYN_IN(char,b,"b")`
217			`DECLARE_DYN_IN(short,w,"")`
218			`DECLARE_DYN_IN(long,l,"")`
219
220			`#undef DECLARE_DYN_IN`
221
222			`#define __outbc(value,port) outb_t(value,port)`
223			`#define __outwc(value,port) outw_t(value,port)`
224			`#define __outlc(value,port) outl_t(value,port)`
225
226			`#endif`
227
228
229			`#endif`