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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [proc-armo/] [assembler.h] - Blame information for rev 1777

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Line No. Rev Author Line
1 1633 jcastillo
/*
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 * linux/asm-arm/proc-armo/assembler.h
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 *
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 * Copyright (C) 1996 Russell King
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 *
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 * This file contains arm architecture specific defines
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 * for the different processors
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 */
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/*
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 * LOADREGS: multiple register load (ldm) with pc in register list
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 *              (takes account of ARM6 not using ^)
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 *
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 * RETINSTR: return instruction: adds the 's' in at the end of the
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 *              instruction if this is not an ARM6
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 *
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 * SAVEIRQS: save IRQ state (not required on ARM2/ARM3 - done
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 *              implicitly
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 *
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 * RESTOREIRQS: restore IRQ state (not required on ARM2/ARM3 - done
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 *              implicitly with ldm ... ^ or movs.
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 *
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 * These next two need thinking about - can't easily use stack... (see system.S)
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 * DISABLEIRQS: disable IRQS in SVC mode
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 *
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 * ENABLEIRQS: enable IRQS in SVC mode
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 *
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 * USERMODE: switch to USER mode
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 *
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 * SVCMODE: switch to SVC mode
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 */
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#define N_BIT   (1 << 31)
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#define Z_BIT   (1 << 30)
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#define C_BIT   (1 << 29)
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#define V_BIT   (1 << 28)
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#define PCMASK  0xfc000003
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#ifdef __ASSEMBLER__
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#define I_BIT   (1 << 27)
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#define F_BIT   (1 << 26)
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#define MODE_USR        0
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#define MODE_FIQ        1
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#define MODE_IRQ        2
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#define MODE_SVC        3
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#define DEFAULT_FIQ     MODE_FIQ
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#define LOADREGS(cond, base, reglist...)\
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        ldm##cond       base,reglist^
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#define RETINSTR(instr, regs...)\
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        instr##s        regs
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#define MODENOP\
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        mov     r0, r0
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#define MODE(savereg,tmpreg,mode) \
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        mov     savereg, pc; \
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        bic     tmpreg, savereg, $0x0c000003; \
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        orr     tmpreg, tmpreg, $mode; \
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        teqp    tmpreg, $0
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#define RESTOREMODE(savereg) \
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        teqp    savereg, $0
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#define SAVEIRQS(tmpreg)
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#define RESTOREIRQS(tmpreg)
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#define DISABLEIRQS(tmpreg)\
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        teqp    pc, $0x08000003
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#define ENABLEIRQS(tmpreg)\
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        teqp    pc, $0x00000003
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#define USERMODE(tmpreg)\
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        teqp    pc, $0x00000000;\
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        mov     r0, r0
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#define SVCMODE(tmpreg)\
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        teqp    pc, $0x00000003;\
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        mov     r0, r0
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#endif

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