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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-i386/] [system.h] - Blame information for rev 1777

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1 1633 jcastillo
#ifndef __ASM_SYSTEM_H
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#define __ASM_SYSTEM_H
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#include <asm/segment.h>
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/*
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 * Entry into gdt where to find first TSS. GDT layout:
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 *   0 - null
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 *   1 - not used
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 *   2 - kernel code segment
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 *   3 - kernel data segment
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 *   4 - user code segment
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 *   5 - user data segment
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 * ...
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 *   8 - TSS #0
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 *   9 - LDT #0
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 *  10 - TSS #1
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 *  11 - LDT #1
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 */
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#define FIRST_TSS_ENTRY 8
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#define FIRST_LDT_ENTRY (FIRST_TSS_ENTRY+1)
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#define _TSS(n) ((((unsigned long) n)<<4)+(FIRST_TSS_ENTRY<<3))
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#define _LDT(n) ((((unsigned long) n)<<4)+(FIRST_LDT_ENTRY<<3))
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#define load_TR(n) __asm__("ltr %%ax": /* no output */ :"a" (_TSS(n)))
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#define load_ldt(n) __asm__("lldt %%ax": /* no output */ :"a" (_LDT(n)))
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#define store_TR(n) \
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__asm__("str %%ax\n\t" \
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        "subl %2,%%eax\n\t" \
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        "shrl $4,%%eax" \
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        :"=a" (n) \
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        :"0" (0),"i" (FIRST_TSS_ENTRY<<3))
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/* This special macro can be used to load a debugging register */
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#define loaddebug(tsk,register) \
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                __asm__("movl %0,%%edx\n\t" \
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                        "movl %%edx,%%db" #register "\n\t" \
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                        : /* no output */ \
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                        :"m" (tsk->debugreg[register]) \
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                        :"dx");
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42
 
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/*
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 *      switch_to(n) should switch tasks to task nr n, first
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 * checking that n isn't the current task, in which case it does nothing.
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 * This also clears the TS-flag if the task we switched to has used
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 * the math co-processor latest.
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 *
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 * It also reloads the debug regs if necessary..
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 */
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#ifdef __SMP__
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        /*
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         *      Keep the lock depth straight. If we switch on an interrupt from
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         *      kernel->user task we need to lose a depth, and if we switch the
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         *      other way we need to gain a depth. Same layer switches come out
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         *      the same.
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         *
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         *      We spot a switch in user mode because the kernel counter is the
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         *      same as the interrupt counter depth. (We never switch during the
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         *      message/invalidate IPI).
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         *
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         *      We fsave/fwait so that an exception goes off at the right time
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         *      (as a call from the fsave or fwait in effect) rather than to
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         *      the wrong process.
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         */
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#define switch_to(prev,next) do { \
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        cli();\
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        if(prev->flags&PF_USEDFPU) \
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        { \
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                __asm__ __volatile__("fnsave %0":"=m" (prev->tss.i387.hard)); \
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                __asm__ __volatile__("fwait"); \
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                prev->flags&=~PF_USEDFPU;        \
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        } \
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        prev->lock_depth=syscall_count; \
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        kernel_counter+=next->lock_depth-prev->lock_depth; \
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        syscall_count=next->lock_depth; \
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__asm__("pushl %%edx\n\t" \
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        "movl "SYMBOL_NAME_STR(apic_reg)",%%edx\n\t" \
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        "movl 0x20(%%edx), %%edx\n\t" \
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        "shrl $22,%%edx\n\t" \
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        "and  $0x3C,%%edx\n\t" \
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        "movl %%ecx,"SYMBOL_NAME_STR(current_set)"(,%%edx)\n\t" \
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        "popl %%edx\n\t" \
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        "ljmp %0\n\t" \
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        "sti\n\t" \
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        : /* no output */ \
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        :"m" (*(((char *)&next->tss.tr)-4)), \
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         "c" (next)); \
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        /* Now maybe reload the debug registers */ \
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        if(prev->debugreg[7]){ \
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                loaddebug(prev,0); \
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                loaddebug(prev,1); \
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                loaddebug(prev,2); \
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                loaddebug(prev,3); \
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                loaddebug(prev,6); \
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        } \
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} while (0)
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#else
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#define switch_to(prev,next) do { \
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__asm__("movl %2,"SYMBOL_NAME_STR(current_set)"\n\t" \
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        "ljmp %0\n\t" \
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        "cmpl %1,"SYMBOL_NAME_STR(last_task_used_math)"\n\t" \
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        "jne 1f\n\t" \
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        "clts\n" \
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        "1:" \
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        : /* no outputs */ \
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        :"m" (*(((char *)&next->tss.tr)-4)), \
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         "r" (prev), "r" (next)); \
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        /* Now maybe reload the debug registers */ \
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        if(prev->debugreg[7]){ \
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                loaddebug(prev,0); \
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                loaddebug(prev,1); \
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                loaddebug(prev,2); \
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                loaddebug(prev,3); \
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                loaddebug(prev,6); \
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        } \
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} while (0)
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#endif
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#define _set_base(addr,base) \
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__asm__("movw %%dx,%0\n\t" \
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        "rorl $16,%%edx\n\t" \
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        "movb %%dl,%1\n\t" \
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        "movb %%dh,%2" \
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        : /* no output */ \
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        :"m" (*((addr)+2)), \
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         "m" (*((addr)+4)), \
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         "m" (*((addr)+7)), \
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         "d" (base) \
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        :"dx")
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136
#define _set_limit(addr,limit) \
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__asm__("movw %%dx,%0\n\t" \
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        "rorl $16,%%edx\n\t" \
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        "movb %1,%%dh\n\t" \
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        "andb $0xf0,%%dh\n\t" \
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        "orb %%dh,%%dl\n\t" \
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        "movb %%dl,%1" \
143
        : /* no output */ \
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        :"m" (*(addr)), \
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         "m" (*((addr)+6)), \
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         "d" (limit) \
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        :"dx")
148
 
149
#define set_base(ldt,base) _set_base( ((char *)&(ldt)) , base )
150
#define set_limit(ldt,limit) _set_limit( ((char *)&(ldt)) , (limit-1)>>12 )
151
 
152
static inline unsigned long _get_base(char * addr)
153
{
154
        unsigned long __base;
155
        __asm__("movb %3,%%dh\n\t"
156
                "movb %2,%%dl\n\t"
157
                "shll $16,%%edx\n\t"
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                "movw %1,%%dx"
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                :"=&d" (__base)
160
                :"m" (*((addr)+2)),
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                 "m" (*((addr)+4)),
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                 "m" (*((addr)+7)));
163
        return __base;
164
}
165
 
166
#define get_base(ldt) _get_base( ((char *)&(ldt)) )
167
 
168
static inline unsigned long get_limit(unsigned long segment)
169
{
170
        unsigned long __limit;
171
        __asm__("lsll %1,%0"
172
                :"=r" (__limit):"r" (segment));
173
        return __limit+1;
174
}
175
 
176
#define nop() __asm__ __volatile__ ("nop")
177
 
178
/*
179
 * Clear and set 'TS' bit respectively
180
 */
181
#define clts() __asm__ __volatile__ ("clts")
182
#define stts() \
183
__asm__ __volatile__ ( \
184
        "movl %%cr0,%%eax\n\t" \
185
        "orl $8,%%eax\n\t" \
186
        "movl %%eax,%%cr0" \
187
        : /* no outputs */ \
188
        : /* no inputs */ \
189
        :"ax")
190
 
191
 
192
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
193
#define tas(ptr) (xchg((ptr),1))
194
 
195
struct __xchg_dummy { unsigned long a[100]; };
196
#define __xg(x) ((struct __xchg_dummy *)(x))
197
 
198
static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
199
{
200
        switch (size) {
201
                case 1:
202
                        __asm__("xchgb %b0,%1"
203
                                :"=q" (x)
204
                                :"m" (*__xg(ptr)), "0" (x)
205
                                :"memory");
206
                        break;
207
                case 2:
208
                        __asm__("xchgw %w0,%1"
209
                                :"=r" (x)
210
                                :"m" (*__xg(ptr)), "0" (x)
211
                                :"memory");
212
                        break;
213
                case 4:
214
                        __asm__("xchgl %0,%1"
215
                                :"=r" (x)
216
                                :"m" (*__xg(ptr)), "0" (x)
217
                                :"memory");
218
                        break;
219
        }
220
        return x;
221
}
222
 
223
#define mb()  __asm__ __volatile__ (""   : : :"memory")
224
#define sti() __asm__ __volatile__ ("sti": : :"memory")
225
#define cli() __asm__ __volatile__ ("cli": : :"memory")
226
 
227
#define save_flags(x) \
228
__asm__ __volatile__("pushfl ; popl %0":"=g" (x): /* no input */ :"memory")
229
 
230
#define restore_flags(x) \
231
__asm__ __volatile__("pushl %0 ; popfl": /* no output */ :"g" (x):"memory")
232
 
233
#define iret() __asm__ __volatile__ ("iret": : :"memory")
234
 
235
#define _set_gate(gate_addr,type,dpl,addr) \
236
__asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
237
        "movw %2,%%dx\n\t" \
238
        "movl %%eax,%0\n\t" \
239
        "movl %%edx,%1" \
240
        :"=m" (*((long *) (gate_addr))), \
241
         "=m" (*(1+(long *) (gate_addr))) \
242
        :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
243
         "d" ((char *) (addr)),"a" (KERNEL_CS << 16) \
244
        :"ax","dx")
245
 
246
#define set_intr_gate(n,addr) \
247
        _set_gate(&idt[n],14,0,addr)
248
 
249
#define set_trap_gate(n,addr) \
250
        _set_gate(&idt[n],15,0,addr)
251
 
252
#define set_system_gate(n,addr) \
253
        _set_gate(&idt[n],15,3,addr)
254
 
255
#define set_call_gate(a,addr) \
256
        _set_gate(a,12,3,addr)
257
 
258
#define _set_seg_desc(gate_addr,type,dpl,base,limit) {\
259
        *((gate_addr)+1) = ((base) & 0xff000000) | \
260
                (((base) & 0x00ff0000)>>16) | \
261
                ((limit) & 0xf0000) | \
262
                ((dpl)<<13) | \
263
                (0x00408000) | \
264
                ((type)<<8); \
265
        *(gate_addr) = (((base) & 0x0000ffff)<<16) | \
266
                ((limit) & 0x0ffff); }
267
 
268
#define _set_tssldt_desc(n,addr,limit,type) \
269
__asm__ __volatile__ ("movw $" #limit ",%1\n\t" \
270
        "movw %%ax,%2\n\t" \
271
        "rorl $16,%%eax\n\t" \
272
        "movb %%al,%3\n\t" \
273
        "movb $" type ",%4\n\t" \
274
        "movb $0x00,%5\n\t" \
275
        "movb %%ah,%6\n\t" \
276
        "rorl $16,%%eax" \
277
        : /* no output */ \
278
        :"a" (addr+__PAGE_OFFSET), "m" (*(n)), "m" (*(n+2)), "m" (*(n+4)), \
279
         "m" (*(n+5)), "m" (*(n+6)), "m" (*(n+7)) \
280
        )
281
 
282
#define set_tss_desc(n,addr) _set_tssldt_desc(((char *) (n)),((int)(addr)),235,"0x89")
283
#define set_ldt_desc(n,addr,size) \
284
        _set_tssldt_desc(((char *) (n)),((int)(addr)),((size << 3) - 1),"0x82")
285
 
286
/*
287
 * This is the ldt that every process will get unless we need
288
 * something other than this.
289
 */
290
extern struct desc_struct default_ldt;
291
 
292
/*
293
 * disable hlt during certain critical i/o operations
294
 */
295
#define HAVE_DISABLE_HLT
296
void disable_hlt(void);
297
void enable_hlt(void);
298
 
299
static __inline__ unsigned long long rdmsr(unsigned int msr)
300
{
301
        unsigned long long ret;
302
        __asm__ __volatile__("rdmsr"
303
                            : "=A" (ret)
304
                            : "c" (msr));
305
        return ret;
306
}
307
 
308
static __inline__ void wrmsr(unsigned int msr,unsigned long long val)
309
{
310
        __asm__ __volatile__("wrmsr"
311
                            : /* no Outputs */
312
                            : "c" (msr), "A" (val));
313
}
314
 
315
 
316
static __inline__ unsigned long long rdtsc(void)
317
{
318
        unsigned long long ret;
319
        __asm__ __volatile__("rdtsc"
320
                            : "=A" (ret)
321
                            : /* no inputs */);
322
        return ret;
323
}
324
 
325
static __inline__ unsigned long long rdpmc(unsigned int counter)
326
{
327
        unsigned long long ret;
328
        __asm__ __volatile__("rdpmc"
329
                            : "=A" (ret)
330
                            : "c" (counter));
331
        return ret;
332
}
333
 
334
#endif

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