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[/] [or1k/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-i960/] [bitops.h] - Blame information for rev 1765

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1 1633 jcastillo
#ifndef _ASM_GENERIC_BITOPS_H_
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#define _ASM_GENERIC_BITOPS_H_
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#include <asm/system.h>
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/*
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 * N.B.: we shouldn't assume addresses are long*'s; nr can be > 31.
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 */
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static __inline__ long set_bit(long nr, void *a)
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{
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        long*   addr = a;
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        int     mask, oldval;
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        addr += nr >> 5;
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        mask = 1 << (nr & 0x1f);
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        __asm__ __volatile__
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                ("atmod %3, %2, %2"
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                 : "=m" (*addr), "=r" (oldval)
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                 : "1" (mask), "r" (addr), "m"(*addr));
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        return (oldval & mask) != 0;
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}
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static __inline__ long clear_bit(long nr, void *a)
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{
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        long*   addr = a;
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        int     mask, oldval;
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        addr += nr >> 5;
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        mask = 1 << (nr & 0x1f);
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        __asm__ __volatile__
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                ("atmod %4, %3, %2"
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                 : "=m" (*addr), "=r"(oldval)
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                 : "1" (0), "r" (mask), "r"(addr), "m"(*addr));
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        return (oldval & mask) != 0;
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}
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static __inline__ long change_bit(long nr, void *a)
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{
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        long*   addr = a;
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        long    flags;
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        int     bitpos, retval;
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        addr += nr >> 5;
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        bitpos = (nr & 0x1f);
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        save_flags(flags);
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        cli();
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#if 1
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        retval = (*addr & (1 << bitpos));
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        *addr ^= (1 << bitpos);
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#else
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        __asm__
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                ("ld            (%2), r3\n\t"
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                 "notbit        %1, r3, r4\n\t"
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                 "st            r4, (%2)\n\t"
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                 "ldconst       1, r4\n\t"
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                 "shlo          %1, r4, r4\n\t"
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                 "and           r4, r3, %0\n\t"
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                 : "=&r" (retval)
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                 : "r" (bitpos), "r" (addr)
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                 : "r3", "r4", "memory");
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#endif
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        restore_flags(flags);
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        return retval != 0;
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}
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static __inline__ long test_bit(long nr, void *a)
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{
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        int     * addr = a;
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        int     mask;
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        addr += nr >> 5;
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        mask = 1 << (nr & 0x1f);
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        return ((mask & *addr) != 0);
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}
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/* The easy/cheese version for now. */
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extern __inline__ unsigned long ffz(unsigned long word)
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{
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        unsigned long result = 0;
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        while(word & 1) {
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                result++;
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                word >>= 1;
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        }
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        return result;
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}
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/* find_next_zero_bit() finds the first zero bit in a bit string of length
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 * 'size' bits, starting the search at bit 'offset'. This is largely based
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 * on Linus's ALPHA routines, which are pretty portable BTW.
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 */
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extern __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
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{
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        unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
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        unsigned long result = offset & ~31UL;
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        unsigned long tmp;
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        if (offset >= size)
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                return size;
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        size -= result;
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        offset &= 31UL;
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        if (offset) {
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                tmp = *(p++);
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                tmp |= ~0UL >> (32-offset);
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                if (size < 32)
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                        goto found_first;
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                if (~tmp)
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                        goto found_middle;
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                size -= 32;
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                result += 32;
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        }
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        while (size & ~31UL) {
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                if (~(tmp = *(p++)))
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                        goto found_middle;
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                result += 32;
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                size -= 32;
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        }
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        if (!size)
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                return result;
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        tmp = *p;
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found_first:
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        tmp |= ~0UL >> size;
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found_middle:
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        return result + ffz(tmp);
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}
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/* Linus sez that gcc can optimize the following correctly, we'll see if this
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 * holds on the Sparc as it does for the ALPHA.
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 */
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#define find_first_zero_bit(addr, size) \
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        find_next_zero_bit((addr), (size), 0)
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#endif /* _ASM_I960_BITOPS_H */

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