OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [powerpc/] [new_exception_processing/] [c_isr.inl] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 158 chris
RTEMS_INLINE_ROUTINE boolean _ISR_Is_in_progress( void )
2
{
3
        register unsigned int isr_nesting_level;
4
        /*
5
         * Move from special purpose register 0 (mfspr SPRG0, r3)
6
         */
7
        asm volatile ("mfspr    %0, 272" : "=r" (isr_nesting_level));
8
        return isr_nesting_level;
9
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.