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[/] [or1k/] [trunk/] [rtems/] [c/] [src/] [lib/] [include/] [zilog/] [z8036.h] - Blame information for rev 158

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1 158 chris
/*  z8036.h
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 *
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 *  This include file defines information related to a Zilog Z8036
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 *  Counter/Timer/IO Chip.  It is a memory mapped part.
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 *
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 *  Input parameters:  NONE
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 *
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 *  Output parameters:  NONE
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 *
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 *  NOTE: This file shares as much as possible with the include
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 *        file for the Z8536 via z8x36.h.
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: z8036.h,v 1.1.1.1 2001-07-10 09:46:49 chris Exp $
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 */
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#ifndef __Z8036_h
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#define __Z8036_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* macros */
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#define Z8036( ptr ) ((volatile struct z8036_map *)(ptr))
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#define Z8x36_STATE0 ( z8036 ) \
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  { /*char *garbage = *(Z8036(z8036))->???; */ }
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#define Z8x36_WRITE( z8036, reg, data ) \
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   (Z8036(z8036))->reg = (data)
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#define Z8x36_READ( z8036, reg, data ) \
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   (Z8036(z8036))->reg = (data)
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/* structures */
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struct z8036_map {
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/* MAIN CONTROL REGISTERS (0x00-0x07) */
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  rtems_unsigned8 MASTER_INTR;           /* Master Interrupt Ctl Reg */
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  rtems_unsigned8 MASTER_CFG;            /* Master Configuration Ctl Reg */
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  rtems_unsigned8 PORTA_VECTOR;          /* Port A - Interrupt Vector */
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  rtems_unsigned8 PORTB_VECTOR;          /* Port B - Interrupt Vector */
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  rtems_unsigned8 CNT_TMR_VECTOR;        /* Counter/Timer Interrupt Vector */
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  rtems_unsigned8 PORTC_DATA_POLARITY;   /* Port C - Data Path Polarity */
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  rtems_unsigned8 PORTC_DIRECTION;       /* Port C - Data Direction */
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  rtems_unsigned8 PORTC_SPECIAL_IO_CTL;  /* Port C - Special IO Control */
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/* MOST OFTEN ACCESSED REGISTERS (0x08 - 0x0f) */
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  rtems_unsigned8 PORTA_CMD_STATUS;      /* Port A - Command Status Reg */
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  rtems_unsigned8 PORTB_CMD_STATUS;      /* Port B - Command Status Reg */
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  rtems_unsigned8 CT1_CMD_STATUS;        /* Ctr/Timer 1 - Command Status Reg */
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  rtems_unsigned8 CT2_CMD_STATUS;        /* Ctr/Timer 2 - Command Status Reg */
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  rtems_unsigned8 CT3_CMD_STATUS;        /* Ctr/Timer 3 - Command Status Reg */
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  rtems_unsigned8 PORTA_DATA;            /* Port A - Data */
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  rtems_unsigned8 PORTB_DATA;            /* Port B - Data */
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  rtems_unsigned8 PORTC_DATA;            /* Port C - Data */
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/* COUNTER/TIMER RELATED REGISTERS (0x10-0x1f) */
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  rtems_unsigned8 CT1_CUR_CNT_MSB;       /* Ctr/Timer 1 - Current Count (MSB) */
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  rtems_unsigned8 CT1_CUR_CNT_LSB;       /* Ctr/Timer 1 - Current Count (LSB) */
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  rtems_unsigned8 CT2_CUR_CNT_MSB;       /* Ctr/Timer 2 - Current Count (MSB) */
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  rtems_unsigned8 CT2_CUR_CNT_LSB;       /* Ctr/Timer 2 - Current Count (LSB) */
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  rtems_unsigned8 CT3_CUR_CNT_MSB;       /* Ctr/Timer 3 - Current Count (MSB) */
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  rtems_unsigned8 CT3_CUR_CNT_LSB;       /* Ctr/Timer 3 - Current Count (LSB) */
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  rtems_unsigned8 CT1_TIME_CONST_MSB;    /* Ctr/Timer 1 - Time Constant (MSB) */
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  rtems_unsigned8 CT1_TIME_CONST_LSB;    /* Ctr/Timer 1 - Time Constant (LSB) */
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  rtems_unsigned8 CT2_TIME_CONST_MSB;    /* Ctr/Timer 2 - Time Constant (MSB) */
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  rtems_unsigned8 CT2_TIME_CONST_LSB;    /* Ctr/Timer 2 - Time Constant (LSB) */
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  rtems_unsigned8 CT3_TIME_CONST_MSB;    /* Ctr/Timer 3 - Time Constant (MSB) */
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  rtems_unsigned8 CT3_TIME_CONST_LSB;    /* Ctr/Timer 3 - Time Constant (LSB) */
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  rtems_unsigned8 CT1_MODE_SPEC;         /* Ctr/Timer 1 - Mode Specification  */
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  rtems_unsigned8 CT2_MODE_SPEC;         /* Ctr/Timer 2 - Mode Specification  */
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  rtems_unsigned8 CT3_MODE_SPEC;         /* Ctr/Timer 3 - Mode Specification  */
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  rtems_unsigned8 CURRENT_VECTOR;        /* Current Vector */
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/* PORT A SPECIFICATION REGISTERS (0x20 -0x27) */
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  rtems_unsigned8 PORTA_MODE;            /* Port A - Mode Specification  */
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  rtems_unsigned8 PORTA_HANDSHAKE;       /* Port A - Handshake Specification  */
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  rtems_unsigned8 PORTA_DATA_POLARITY;   /* Port A - Data Path Polarity */
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  rtems_unsigned8 PORTA_DIRECTION;       /* Port A - Data Direction */
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  rtems_unsigned8 PORTA_SPECIAL_IO_CTL;  /* Port A - Special IO Control */
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  rtems_unsigned8 PORTA_PATT_POLARITY;   /* Port A - Pattern Polarity */
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  rtems_unsigned8 PORTA_PATT_TRANS;      /* Port A - Pattern Transition */
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  rtems_unsigned8 PORTA_PATT_MASK;       /* Port A - Pattern Mask */
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/* PORT B SPECIFICATION REGISTERS (0x28-0x2f) */
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  rtems_unsigned8 PORTB_MODE;            /* Port B - Mode Specification  */
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  rtems_unsigned8 PORTB_HANDSHAKE;       /* Port B - Handshake Specification  */
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  rtems_unsigned8 PORTB_DATA_POLARITY;   /* Port B - Data Path Polarity */
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  rtems_unsigned8 PORTB_DIRECTION;       /* Port B - Data Direction */
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  rtems_unsigned8 PORTB_SPECIAL_IO_CTL;  /* Port B - Special IO Control */
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  rtems_unsigned8 PORTB_PATT_POLARITY;   /* Port B - Pattern Polarity */
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  rtems_unsigned8 PORTB_PATT_TRANS;      /* Port B - Pattern Transition */
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  rtems_unsigned8 PORTB_PATT_MASK;       /* Port B - Pattern Mask */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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