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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [lib/] [libbsp/] [i960/] [cvme961/] [include/] [bsp.h] - Blame information for rev 1765

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1 1026 ivang
/*  bsp.h
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 *
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 *  This include file contains some definitions specific to the
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 *  Cyclone CVME960 and CVME961 boards.  These boards are the
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 *  same except the 960 uses SRAM and the 961 DRAM.
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  bsp.h,v 1.15 2001/09/28 13:21:33 joel Exp
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 */
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#ifndef __CVME961_h
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#define __CVME961_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <bspopts.h>
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#include <rtems.h>
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#include <libcpu/i960CA.h>
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#include <iosupp.h>
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#include <console.h>
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#include <clockdrv.h>
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/*
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 *  confdefs.h overrides for this BSP:
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 *   - number of termios serial ports (defaults to 1)
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 *   - Interrupt stack space is not minimum if defined.
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 */
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/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
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#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
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/*
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 *  Define the time limits for RTEMS Test Suite test durations.
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 *  Long test and short test duration limits are provided.  These
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 *  values are in seconds and need to be converted to ticks for the
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 *  application.
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 *
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 */
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#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
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#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
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/*
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 *  Define the interrupt mechanism for Time Test 27
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 *
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 *  NOTE: Following are for i960CA and are board independent
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 *
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 */
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#define MUST_WAIT_FOR_INTERRUPT 0
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#define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 )
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#define Cause_tm27_intr()  i960_cause_intr( 0x62 )
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#define Clear_tm27_intr()  i960_clear_intr( 6 )
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#define Lower_tm27_intr()
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/*
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 *  Simple spin delay in microsecond units for device drivers.
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 *  This is very dependent on the clock speed of the target.
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 */
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#define rtems_bsp_delay( microseconds ) \
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  { register rtems_unsigned32 _delay=(microseconds); \
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    register rtems_unsigned32 _tmp = 0; /* initialized to avoid warning */ \
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    asm volatile( "0: \
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                     remo      3,31,%0 ; \
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                     cmpo      0,%0 ; \
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                     subo      1,%1,%1 ; \
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                     cmpobne.t 0,%1,0b " \
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                  : "=d" (_tmp), "=d" (_delay) \
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                  : "0"  (_tmp), "1"  (_delay) ); \
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  }
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/* Constants */
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#define RAM_START 0
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#define RAM_END   0x100000
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/* NINDY console I/O requests:
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 *   CO sends a single character to stdout,
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 *   CI reads one.
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 */
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#define NINDY_INPUT   0
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#define NINDY_OUTPUT  1
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/*
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 *  get_prcb
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 *
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 *  Returns the PRCB pointer.
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 */
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static inline i960ca_PRCB *get_prcb( void )
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{
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  register i960ca_PRCB *_prcb = 0;
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  asm volatile( "calls 5; \
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                 mov   g0,%0" \
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                 : "=d" (_prcb) \
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                 : "0" (_prcb) );
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  return ( _prcb );
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}
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#ifdef C961_INIT
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#undef BSP_EXTERN
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#define BSP_EXTERN
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#else
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#undef BSP_EXTERN
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#define BSP_EXTERN extern
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#endif
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/* miscellaneous stuff assumed to exist */
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extern rtems_configuration_table BSP_Configuration;
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BSP_EXTERN i960ca_PRCB           *Prcb;
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BSP_EXTERN i960ca_control_table  *Ctl_tbl;
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/*
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 *  Device Driver Table Entries
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 */
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/*
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 * NOTE: Use the standard Console driver entry
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 */
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/*
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 * NOTE: Use the standard Clock driver entry
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 */
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/* functions */
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void bsp_cleanup( void );
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i960_isr_entry set_vector( rtems_isr_entry, unsigned int, unsigned int );
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* end of include file */

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