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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [lib/] [libbsp/] [m68k/] [dmv152/] [include/] [bsp.h] - Blame information for rev 1765

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1 1026 ivang
/*  bsp.h
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 *
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 *  This include file contains all DMV152 board IO definitions.
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  bsp.h,v 1.18 2001/09/28 13:24:29 joel Exp
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 */
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#ifndef __DMV152_h
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#define __DMV152_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <bspopts.h>
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#include <rtems.h>
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#include <console.h>
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#include <clockdrv.h>
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#include <iosupp.h>
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#include <vmeintr.h>
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#include <zilog/z8530.h>
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#include <zilog/z8536.h>
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/*
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 *  confdefs.h overrides for this BSP:
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 *   - number of termios serial ports (defaults to 1)
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 *   - Interrupt stack space is not minimum if defined.
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 */
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/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
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#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
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/*
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 *  confdefs.h overrides for this BSP:
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 *   - termios serial ports (defaults to 1)
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 *   - Interrupt stack space is not minimum if defined.
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 */
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#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
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/* #define CONFIGURE_INTERRUPT_STACK_MEMORY  (TBD * 1024) */
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/*
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 *  Define the time limits for RTEMS Test Suite test durations.
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 *  Long test and short test duration limits are provided.  These
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 *  values are in seconds and need to be converted to ticks for the
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 *  application.
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 *
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 */
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#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
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#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
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/*
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 *  Define the interrupt mechanism for Time Test 27
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 */
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/* use a VMEbus interrupt */
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#define MUST_WAIT_FOR_INTERRUPT 1
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#define Install_tm27_vector( handler ) \
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  { \
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    set_vector( (handler), 0x50, 1 );  \
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    (*(volatile rtems_unsigned32 *)0x0d800024) = 0x50; /* set IVECT reg */ \
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    (*(volatile rtems_unsigned8  *)0x0d00000c) = 0x40; /* set VIE reg */ \
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  }
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#define Cause_tm27_intr()  \
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  (*(volatile rtems_unsigned8 *)0x0d000003) = 0x0f  /* set VINT */
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#define Clear_tm27_intr()  /* no operation necessary */
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#define Lower_tm27_intr()
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/*
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 *  Simple spin delay in microsecond units for device drivers.
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 *  This is very dependent on the clock speed of the target.
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 */
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#define rtems_bsp_delay( microseconds ) \
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  { register rtems_unsigned32 _delay=(microseconds); \
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    register rtems_unsigned32 _tmp=123; \
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    asm volatile( "0: \
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                     nbcd      %0 ; \
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                     nbcd      %0 ; \
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                     dbf       %1,0b" \
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                  : "=d" (_tmp), "=d" (_delay) \
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                  : "0"  (_tmp), "1"  (_delay) ); \
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  }
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/* macros */
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#undef Z8x36_STATE0
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#undef Z8x36_WRITE
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#undef Z8x36_READ
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#define Z8x36_STATE0 ( z8536 ) \
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  { char *garbage; \
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    (garbage) = *(VOL8(z8536+0x7)) \
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  }
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#define Z8x36_WRITE( z8536, reg, data ) \
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   *(VOL8(z8536+0x7)) = (reg); \
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   *(VOL8(z8536+0x7)) = (data)
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#define Z8x36_READ( z8536, reg, data ) \
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   *(VOL8(z8536+0x7)) = (reg); \
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   (data) = *(VOL8(z8536+0x7))
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/*
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 *  ACC Register Addresses
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 */
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#define ACC_BASE    0x0D000000
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#define ACC_STAT0   ((volatile rtems_unsigned8 *) (ACC_BASE + 0x00))
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#define ACC_STAT1   ((volatile rtems_unsigned8 *) (ACC_BASE + 0x01))
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#define ACC_GENCTL  ((volatile rtems_unsigned8 *) (ACC_BASE + 0x02))
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#define ACC_VINT    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x03))
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#define ACC_VREQ    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x04))
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#define ACC_VARB    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x05))
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#define ACC_ID      ((volatile rtems_unsigned8 *) (ACC_BASE + 0x06))
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#define ACC_CTL2    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x07))
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#define ACC_7IS     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x08))
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#define ACC_LIS     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x09))
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#define ACC_7IE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0A))
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#define ACC_LIE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0B))
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#define ACC_VIE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0C))
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#define ACC_IC10    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0D))
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#define ACC_IC32    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0E))
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#define ACC_IC54    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0F))
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/* constants */
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#define TIMER 0x0c000000
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#define TIMER_VECTOR 0x4D
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#define CONSOLE_CONTROL_A  0x0C800005
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#define CONSOLE_DATA_A     0x0C800007
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#define CONSOLE_CONTROL_B  0x0C800001
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#define CONSOLE_DATA_B     0x0C800003
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/* Structures */
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   /* none */
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/* miscellaneous stuff assumed to exist */
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extern rtems_configuration_table BSP_Configuration;
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extern m68k_isr_entry M68Kvec[];   /* vector table address */
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/*
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 *  Device Driver Table Entries
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 */
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/*
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 * NOTE: Use the standard Console driver entry
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 */
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/*
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 * NOTE: Use the standard Clock driver entry
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 */
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/* functions */
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void bsp_cleanup( void );
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m68k_isr_entry set_vector(
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  rtems_isr_entry     handler,
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  rtems_vector_number vector,
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  int                 type
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);
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* end of include file */

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