OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [lib/] [libbsp/] [m68k/] [gen68340/] [startup/] [dumpanic.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1026 ivang
/*
2
 *  M68340/349 registers and stack dump if an exception is raised
3
 *
4
 *  Author:
5
 *  Pascal Cadic
6
 *  France Telecom - CNET/DSM/TAM/CAT
7
 *  4, rue du Clos Courtel
8
 *  35512 CESSON-SEVIGNE
9
 *  FRANCE
10
 *
11
 *  COPYRIGHT (c) 1989-1999.
12
 *  On-Line Applications Research Corporation (OAR).
13
 *
14
 *  The license and distribution terms for this file may be
15
 *  found in the file LICENSE in this distribution or at
16
 *
17
 *  http://www.OARcorp.com/rtems/license.html.
18
 *
19
 *  dumpanic.c,v 1.2 1999/11/17 17:50:56 joel Exp
20
 */
21
 
22
#include <stdio.h>
23
 
24
const char *exceptionName[] =
25
        {
26
        "INITIAL STACK POINTER",
27
        "INITIAL PROGRAM COUNTER",
28
        "BUS ERROR",
29
        "ADDRESS ERROR",
30
        "ILLEGAL INSTRUCTION",
31
        "DIVISION BY ZERO",
32
        "CHK, CHK2",
33
        "TRAPcc, TRAPv",
34
        "PRIVILEGE VIOLATION",
35
        "TRACE",
36
        "LINE A EMULATOR",
37
        "LINE F EMULATOR",
38
        "HARDWARE BREAK",
39
        "COPROCESSOR PROTOCOL VIOLATION",
40
        "FORMAT ERROR",
41
        "UNINITIALIZED INTERRUPT",
42
        "RESERVED 16",
43
        "RESERVED 17",
44
        "RESERVED 18",
45
        "RESERVED 19",
46
        "RESERVED 20",
47
        "RESERVED 21",
48
        "RESERVED 22",
49
        "RESERVED 23",
50
        "SPURIOUS INTERRUPT",
51
        "LEVEL 1 AUTOVECTOR",
52
        "LEVEL 2 AUTOVECTOR",
53
        "LEVEL 3 AUTOVECTOR",
54
        "LEVEL 4 AUTOVECTOR",
55
        "LEVEL 5 AUTOVECTOR",
56
        "LEVEL 6 AUTOVECTOR",
57
        "LEVEL 7 AUTOVECTOR",
58
        "TRAP 1",
59
        "TRAP 2",
60
        "TRAP 3",
61
        "TRAP 4",
62
        "TRAP 5",
63
        "TRAP 6",
64
        "TRAP 7",
65
        "TRAP 8",
66
        "TRAP 9",
67
        "TRAP 10",
68
        "TRAP 11",
69
        "TRAP 12",
70
        "TRAP 13",
71
        "TRAP 14",
72
        "TRAP 15",
73
        "VECTOR 48",
74
        "VECTOR 49",
75
        "VECTOR 50",
76
        "VECTOR 51",
77
        "VECTOR 52",
78
        "VECTOR 53",
79
        "VECTOR 54",
80
        "VECTOR 55",
81
        "VECTOR 56",
82
        "VECTOR 57",
83
        "VECTOR 58",
84
        "VECTOR 59",
85
        "VECTOR 60",
86
        "VECTOR 61",
87
        "VECTOR 62",
88
        "VECTOR 63",
89
        };
90
 
91
typedef struct {
92
    unsigned long       pc;
93
    unsigned short      sr;
94
    unsigned short      format_id;
95
    unsigned long       d0, d1, d2, d3, d4, d5, d6, d7;
96
    unsigned long       a0, a1, a2, a3, a4, a5, a6, a7;
97
    unsigned long       sfc, dfc, vbr;
98
} boot_panic_registers_t;
99
 
100
boot_panic_registers_t _boot_panic_registers;
101
 
102
extern void RAW_FMT( int minor, const char* fmt, ... );
103
extern char RAW_GETC(int minor);
104
 
105
/******************************************************
106
  Name: _dbug_dump
107
  Input parameters: sr, pc, stack pointer,
108
                    size to display
109
  Output parameters: -
110
  Description: display the supervisor stack
111
 *****************************************************/
112
void _dbug_dump(unsigned short sr, void* pc, unsigned short *stack, int size)
113
{
114
int i;
115
 
116
        RAW_FMT(0,"%x : %x \t%x",0,sr,(unsigned short)(((unsigned)pc)>>16));
117
        for (i=2; i<size; i++) {
118
                if ((i%8)==0) RAW_FMT(0,"\n%x :",i/8);
119
                RAW_FMT(0," %x\t",stack[i-2]);
120
        }
121
        RAW_FMT(0,"\n");
122
}
123
 
124
/******************************************************
125
  Name: _dbug_dump
126
  Input parameters: -
127
  Output parameters: -
128
  Description: display microcontroler state. Registers
129
               values are stored in _boot_panic_registers
130
               which is filled in _uhoh ASM routine
131
 *****************************************************/
132
void _dbug_dumpanic(void)
133
{
134
 int c;
135
 void *faultedAddr, *pc;
136
 unsigned short vector, status;
137
 unsigned char frametype, *stack;
138
 #define ESCAPE 27
139
 
140
        stack = (unsigned char*)(_boot_panic_registers.a7);
141
        do {
142
                status = _boot_panic_registers.sr;
143
                pc = (void*)_boot_panic_registers.pc;
144
                faultedAddr = *(void**)(stack+4);
145
                vector = (_boot_panic_registers.format_id&0x0FFF)>>2;
146
                frametype = (_boot_panic_registers.format_id&0xF000)>>12;
147
 
148
                RAW_FMT(0,"\n---------------------------------------------\n");
149
                if (vector<64)
150
                        RAW_FMT(0,"%s",exceptionName[vector]);
151
                else {
152
                        RAW_FMT(0,"RESERVED USER");
153
                }
154
                RAW_FMT(0," exception (vector %x, type %x)\n",vector,frametype);
155
                RAW_FMT(0,"---------------------------------------------\n");
156
                RAW_FMT(0,"PC : 0x%x  ",pc);
157
                RAW_FMT(0,"A7 : 0x%x  ",_boot_panic_registers.a7);
158
                RAW_FMT(0,"SR : 0x%x\n",status);
159
                if (frametype==0x0c) {
160
                        RAW_FMT(0,"\nfaulted address = 0x%x\n",faultedAddr);
161
                }
162
                RAW_FMT(0,"---------------------------------------------\n");
163
                RAW_FMT(0,"               panic regs\n");
164
                RAW_FMT(0,"---------------------------------------------\n");
165
                RAW_FMT(0,"D[0..3] : %x \t%x \t%x \t%x\n",
166
                                _boot_panic_registers.d0,_boot_panic_registers.d1,
167
                                _boot_panic_registers.d2,_boot_panic_registers.d3);
168
                RAW_FMT(0,"D[4..7] : %x \t%x \t%x \t%x\n",
169
                                _boot_panic_registers.d4,_boot_panic_registers.d5,
170
                                _boot_panic_registers.d6,_boot_panic_registers.d7);
171
                RAW_FMT(0,"A[0..3] : %x \t%x \t%x \t%x\n",
172
                                _boot_panic_registers.a0,_boot_panic_registers.a1,
173
                                _boot_panic_registers.a2,_boot_panic_registers.a3);
174
                RAW_FMT(0,"A[4..7] : %x \t%x \t%x \t%x\n",
175
                                _boot_panic_registers.a4,_boot_panic_registers.a5,
176
                                _boot_panic_registers.a6,_boot_panic_registers.a7);
177
 
178
                RAW_FMT(0,"    SFC : %x",_boot_panic_registers.sfc);
179
                RAW_FMT(0,"    DFC : %x\n",_boot_panic_registers.dfc);
180
                RAW_FMT(0,"    VBR : %x\n",_boot_panic_registers.vbr);
181
                RAW_FMT(0,"---------------------------------------------\n");
182
                RAW_FMT(0,"               panic stack\n");
183
                RAW_FMT(0,"---------------------------------------------\n");
184
                _dbug_dump(status, pc, (unsigned short*)stack,64*2);
185
 
186
                RAW_FMT(0,"---------------------------------------------\n");
187
                RAW_FMT(0,"press escape to reboot\n");
188
        } while ((c=RAW_GETC(0))!=ESCAPE);       /* cgets ne marche pas si les IT sont bloquées */
189
}
190
 
191
 
192
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.