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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [eth_comm/] [irq/] [irq.h] - Blame information for rev 1765

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1 1026 ivang
/* irq.h
2
 *
3
 *  This include file describe the data structure and the functions implemented
4
 *  by rtems to write interrupt handlers.
5
 *
6
 *  CopyRight (C) 1999 valette@crf.canon.fr
7
 *
8
 *  This code is heavilly inspired by the public specification of STREAM V2
9
 *  that can be found at :
10
 *
11
 *      <http://www.chorus.com/Documentation/index.html> by following
12
 *  the STREAM API Specification Document link.
13
 *
14
 *  The license and distribution terms for this file may be
15
 *  found in found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
17
 *
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 *  irq.h,v 1.1 2001/04/16 20:18:03 joel Exp
19
 */
20
 
21
#ifndef LIBBSP_POWERPC_ETH_COMM_IRQ_IRQ_H
22
#define LIBBSP_POWERPC_ETH_COMM_IRQ_IRQ_H
23
 
24
 
25
#define BSP_ASM_IRQ_VECTOR_BASE 0x0
26
 
27
#ifndef ASM
28
 
29
extern volatile unsigned int ppc_cached_irq_mask;
30
 
31
/*
32
 * Symblolic IRQ names and related definitions.
33
 */
34
 
35
typedef enum {
36
  /* Base vector for our SIU IRQ handlers. */
37
  BSP_SIU_VECTOR_BASE   =       BSP_ASM_IRQ_VECTOR_BASE,
38
  /*
39
   * SIU IRQ handler related definitions
40
   */
41
  BSP_SIU_IRQ_NUMBER            =       16, /* 16 reserved but in the future... */
42
  BSP_SIU_IRQ_LOWEST_OFFSET     =       0,
43
  BSP_SIU_IRQ_MAX_OFFSET        =       BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER - 1,
44
  /*
45
   * CPM IRQ handlers related definitions
46
   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
47
   */
48
  BSP_CPM_IRQ_NUMBER            =       32,
49
  BSP_CPM_IRQ_LOWEST_OFFSET     =       BSP_SIU_IRQ_NUMBER + BSP_SIU_VECTOR_BASE,
50
  BSP_CPM_IRQ_MAX_OFFSET        =       BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
51
  /*
52
   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
53
   * handler might be connected
54
   */
55
  BSP_PROCESSOR_IRQ_NUMBER      =       1,
56
  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_CPM_IRQ_MAX_OFFSET + 1,
57
  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
58
  /*
59
   * Summary
60
   */
61
  BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
62
  BSP_LOWEST_OFFSET             =       BSP_SIU_IRQ_LOWEST_OFFSET,
63
  BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
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    /*
65
     * Some SIU IRQ symbolic name definition. Please note that
66
     * INT IRQ are defined but a single one will be used to
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     * redirect all CPM interrupt.
68
     */
69
  BSP_SIU_EXT_IRQ_0             =       0,
70
  BSP_SIU_INT_IRQ_0             =       1,
71
 
72
  BSP_SIU_EXT_IRQ_1             =       2,
73
  BSP_SIU_INT_IRQ_1             =       3,
74
 
75
  BSP_SIU_EXT_IRQ_2             =       4,
76
  BSP_SIU_INT_IRQ_2             =       5,
77
 
78
  BSP_SIU_EXT_IRQ_3             =       6,
79
  BSP_SIU_INT_IRQ_3             =       7,
80
 
81
  BSP_SIU_EXT_IRQ_4             =       8,
82
  BSP_SIU_INT_IRQ_4             =       9,
83
 
84
  BSP_SIU_EXT_IRQ_5             =       10,
85
  BSP_SIU_INT_IRQ_5             =       11,
86
 
87
  BSP_SIU_EXT_IRQ_6             =       12,
88
  BSP_SIU_INT_IRQ_6             =       13,
89
 
90
  BSP_SIU_EXT_IRQ_7             =       14,
91
  BSP_SIU_INT_IRQ_7             =       15,
92
  /*
93
   * Symbolic name for CPM interrupt on SIU Internal level 2
94
   */
95
  BSP_CPM_INTERRUPT             =       BSP_SIU_INT_IRQ_2,
96
  BSP_PERIODIC_TIMER            =       BSP_SIU_INT_IRQ_6,
97
  BSP_FAST_ETHERNET_CTRL        =       BSP_SIU_INT_IRQ_3,
98
  /*
99
     * Some CPM IRQ symbolic name definition
100
     */
101
  BSP_CPM_IRQ_ERROR             =       BSP_CPM_IRQ_LOWEST_OFFSET,
102
  BSP_CPM_IRQ_PARALLEL_IO_PC4   =       BSP_CPM_IRQ_LOWEST_OFFSET + 1,
103
  BSP_CPM_IRQ_PARALLEL_IO_PC5   =       BSP_CPM_IRQ_LOWEST_OFFSET + 2,
104
  BSP_CPM_IRQ_SMC2_OR_PIP       =       BSP_CPM_IRQ_LOWEST_OFFSET + 3,
105
  BSP_CPM_IRQ_SMC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 4,
106
  BSP_CPM_IRQ_SPI               =       BSP_CPM_IRQ_LOWEST_OFFSET + 5,
107
  BSP_CPM_IRQ_PARALLEL_IO_PC6   =       BSP_CPM_IRQ_LOWEST_OFFSET + 6,
108
  BSP_CPM_IRQ_TIMER_4           =       BSP_CPM_IRQ_LOWEST_OFFSET + 7,
109
 
110
  BSP_CPM_IRQ_PARALLEL_IO_PC7   =       BSP_CPM_IRQ_LOWEST_OFFSET + 9,
111
  BSP_CPM_IRQ_PARALLEL_IO_PC8   =       BSP_CPM_IRQ_LOWEST_OFFSET + 10,
112
  BSP_CPM_IRQ_PARALLEL_IO_PC9   =       BSP_CPM_IRQ_LOWEST_OFFSET + 11,
113
  BSP_CPM_IRQ_TIMER_3           =       BSP_CPM_IRQ_LOWEST_OFFSET + 12,
114
 
115
  BSP_CPM_IRQ_PARALLEL_IO_PC10  =       BSP_CPM_IRQ_LOWEST_OFFSET + 14,
116
  BSP_CPM_IRQ_PARALLEL_IO_PC11  =       BSP_CPM_IRQ_LOWEST_OFFSET + 15,
117
  BSP_CPM_I2C                   =       BSP_CPM_IRQ_LOWEST_OFFSET + 16,
118
  BSP_CPM_RISC_TIMER_TABLE      =       BSP_CPM_IRQ_LOWEST_OFFSET + 17,
119
  BSP_CPM_IRQ_TIMER_2           =       BSP_CPM_IRQ_LOWEST_OFFSET + 18,
120
 
121
  BSP_CPM_IDMA2                 =       BSP_CPM_IRQ_LOWEST_OFFSET + 20,
122
  BSP_CPM_IDMA1                 =       BSP_CPM_IRQ_LOWEST_OFFSET + 21,
123
  BSP_CPM_SDMA_CHANNEL_BUS_ERR  =       BSP_CPM_IRQ_LOWEST_OFFSET + 22,
124
  BSP_CPM_IRQ_PARALLEL_IO_PC12  =       BSP_CPM_IRQ_LOWEST_OFFSET + 23,
125
  BSP_CPM_IRQ_PARALLEL_IO_PC13  =       BSP_CPM_IRQ_LOWEST_OFFSET + 24,
126
  BSP_CPM_IRQ_TIMER_1           =       BSP_CPM_IRQ_LOWEST_OFFSET + 25,
127
  BSP_CPM_IRQ_PARALLEL_IO_PC14  =       BSP_CPM_IRQ_LOWEST_OFFSET + 26,
128
  BSP_CPM_IRQ_SCC4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 27,
129
  BSP_CPM_IRQ_SCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 28,
130
  BSP_CPM_IRQ_SCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 29,
131
  BSP_CPM_IRQ_SCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 30,
132
  BSP_CPM_IRQ_PARALLEL_IO_PC15  =       BSP_CPM_IRQ_LOWEST_OFFSET + 31,
133
    /*
134
     * Some Processor exception handled as rtems IRQ symbolic name definition
135
     */
136
  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
137
 
138
}rtems_irq_symbolic_name;
139
 
140
#define CPM_INTERRUPT               
141
 
142
 
143
/*
144
 * Type definition for RTEMS managed interrupts
145
 */
146
typedef unsigned char  rtems_irq_prio;
147
struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
148
 
149
typedef void (*rtems_irq_hdl)           (void);
150
typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
151
typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
152
typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
153
 
154
typedef struct __rtems_irq_connect_data__ {
155
  /*
156
   * IRQ line
157
   */
158
  rtems_irq_symbolic_name       name;
159
  /*
160
   * handler. See comment on handler properties below in function prototype.
161
   */
162
  rtems_irq_hdl                 hdl;
163
  /*
164
   * function for enabling interrupts at device level (ONLY!).
165
   * The BSP code will automatically enable it at SIU level and CPM level.
166
   * RATIONALE : anyway such code has to exist in current driver code.
167
   * It is usually called immediately AFTER connecting the interrupt handler.
168
   * RTEMS may well need such a function when restoring normal interrupt
169
   * processing after a debug session.
170
   *
171
   */
172
    rtems_irq_enable            on;
173
  /*
174
   * function for disabling interrupts at device level (ONLY!).
175
   * The code will disable it at SIU and CPM level. RATIONALE : anyway
176
   * such code has to exist for clean shutdown. It is usually called
177
   * BEFORE disconnecting the interrupt. RTEMS may well need such
178
   * a function when disabling normal interrupt processing for
179
   * a debug session. May well be a NOP function.
180
   */
181
  rtems_irq_disable             off;
182
  /*
183
   * function enabling to know what interrupt may currently occur
184
   * if someone manipulates the i8259s interrupt mask without care...
185
   */
186
    rtems_irq_is_enabled        isOn;
187
}rtems_irq_connect_data;
188
 
189
typedef struct {
190
  /*
191
   * size of all the table fields (*Tbl) described below.
192
   */
193
  unsigned int                  irqNb;
194
  /*
195
   * Default handler used when disconnecting interrupts.
196
   */
197
  rtems_irq_connect_data        defaultEntry;
198
  /*
199
   * Table containing initials/current value.
200
   */
201
  rtems_irq_connect_data*       irqHdlTbl;
202
  /*
203
   * actual value of BSP_SIU_IRQ_VECTOR_BASE...
204
   */
205
  rtems_irq_symbolic_name       irqBase;
206
  /*
207
   * software priorities associated with interrupts.
208
   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
209
   * interrupt handler hdl connected for interrupt name i
210
   * will  not be interrupted by the handler connected for interrupt j
211
   * The interrupt source  will be physically masked at i8259 level.
212
   */
213
    rtems_irq_prio*             irqPrioTbl;
214
}rtems_irq_global_settings;
215
 
216
 
217
 
218
 
219
/*-------------------------------------------------------------------------+
220
| Function Prototypes.
221
+--------------------------------------------------------------------------*/
222
/*
223
 * ------------------------ PPC SIU Mngt Routines -------
224
 */
225
 
226
/*
227
 * function to disable a particular irq at 8259 level. After calling
228
 * this function, even if the device asserts the interrupt line it will
229
 * not be propagated further to the processor
230
 */
231
int BSP_irq_disable_at_siu        (const rtems_irq_symbolic_name irqLine);
232
/*
233
 * function to enable a particular irq at 8259 level. After calling
234
 * this function, if the device asserts the interrupt line it will
235
 * be propagated further to the processor
236
 */
237
int BSP_irq_enable_at_siu               (const rtems_irq_symbolic_name irqLine);
238
/*
239
 * function to acknoledge a particular irq at 8259 level. After calling
240
 * this function, if a device asserts an enabled interrupt line it will
241
 * be propagated further to the processor. Mainly usefull for people
242
 * writting raw handlers as this is automagically done for rtems managed
243
 * handlers.
244
 */
245
int BSP_irq_ack_at_siu                  (const rtems_irq_symbolic_name irqLine);
246
/*
247
 * function to check if a particular irq is enabled at 8259 level. After calling
248
 */
249
int BSP_irq_enabled_at_siu      (const rtems_irq_symbolic_name irqLine);
250
/*
251
 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
252
 */
253
/*
254
 * function to connect a particular irq handler. This hanlder will NOT be called
255
 * directly as the result of the corresponding interrupt. Instead, a RTEMS
256
 * irq prologue will be called that will :
257
 *
258
 *      1) save the C scratch registers,
259
 *      2) switch to a interrupt stack if the interrupt is not nested,
260
 *      4) modify them to disable the current interrupt at  SIU level (and may
261
 *      be others depending on software priorities)
262
 *      5) aknowledge the SIU',
263
 *      6) demask the processor,
264
 *      7) call the application handler
265
 *
266
 * As a result the hdl function provided
267
 *
268
 *      a) can perfectly be written is C,
269
 *      b) may also well directly call the part of the RTEMS API that can be used
270
 *      from interrupt level,
271
 *      c) It only responsible for handling the jobs that need to be done at
272
 *      the device level including (aknowledging/re-enabling the interrupt at device,
273
 *      level, getting the data,...)
274
 *
275
 *      When returning from the function, the following will be performed by
276
 *      the RTEMS irq epilogue :
277
 *
278
 *      1) masks the interrupts again,
279
 *      2) restore the original SIU interrupt masks
280
 *      3) switch back on the orinal stack if needed,
281
 *      4) perform rescheduling when necessary,
282
 *      5) restore the C scratch registers...
283
 *      6) restore initial execution flow
284
 *
285
 */
286
int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
287
/*
288
 * function to get the current RTEMS irq handler for ptr->name. It enables to
289
 * define hanlder chain...
290
 */
291
int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
292
/*
293
 * function to get disconnect the RTEMS irq handler for ptr->name.
294
 * This function checks that the value given is the current one for safety reason.
295
 * The user can use the previous function to get it.
296
 */
297
int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
298
 
299
/*
300
 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
301
 */
302
/*
303
 * (Re) Initialize the RTEMS interrupt management.
304
 *
305
 * The result of calling this function will be the same as if each individual
306
 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
307
 * has been individualy connected via
308
 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
309
 * And each handler currently equal to config->defaultEntry.hdl
310
 * has been previously disconnected via
311
 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
312
 *
313
 * This is to say that all information given will be used and not just
314
 * only the space.
315
 *
316
 * CAUTION : the various table address contained in config will be used
317
 *           directly by the interrupt mangement code in order to save
318
 *           data size so they must stay valid after the call => they should
319
 *           not be modified or declared on a stack.
320
 */
321
 
322
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
323
/*
324
 * (Re) get info on current RTEMS interrupt management.
325
 */
326
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
327
 
328
extern void BSP_rtems_irq_mng_init(unsigned cpuId);
329
#endif
330
 
331
#endif

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